Digital Design and Verilog HDL Fundamentals

1166 Pages·2008·10.07 MB·English

by  Cavanagh

Digital
Design
and
Verilog
HDL
Fundamentals
74156_FM.indd 1 5/12/08 11:18:53 AM

Digital
Design
and
Verilog
HDL
Fundamentals
Joseph Cavanagh
Santa Clara University
California, USA
Boca Raton London New York
CRC Press is an imprint of the
Taylor & Francis Group, an informa business
74156_FM.indd 3 5/12/08 11:18:54 AM
CRC Press
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© 2008 by Taylor and Francis Group, LLC
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Library of Congress Cataloging‑in‑Publication Data
Cavanagh, Joseph J. F.
Digital design and Verilog HDL fundamentals / Joseph Cavanagh.
p. cm.
Includes bibliographical references and index.
ISBN 978-1-4200-7415-4 (hardback : alk. paper) 1. Logic circuits--Computer-aided design. 2. Verilog
(Computer hardware description language) 3. Digital electronics. I. Title.
TK7868.D5C3945 2008
621.39’5--dc22 2008012851
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By the same author:
DIGITAL COMPUTER ARITHMETIC: Design and Implementation
SEQUENTIAL LOGIC: Analysis and Synthesis
VERILOG HDL: Digital Design and Modeling
________________________
The Computer Conspiracy — A novel

To my son, Brad, for his continued help and support.

PREFACE
The field of digital logic consists primarily of the analysis and synthesis of combina-
tional logic circuits and sequential logic circuits, also referred to as finite-state
machines. The principal characteristic of combinational logic is that the outputs are
a function of the present inputs only, whereas the outputs of sequential logic are a
function of the input sequence; that is, the input history. Sequential logic, therefore,
requires storage elements which indicate the present state of the machine relative to a
unique sequence of inputs.
Sequential logic is partitioned into synchronous and asynchronous sequential
machines. Synchronous sequential machines are controlled by a system clock which
provides the triggering mechanism to cause state changes. Asynchronous sequential
machines have no clocking mechanism — the machines change state upon the appli-
cation of input signals. The input signals provide the means to enable the sequential
machines to proceed through a prescribed sequence of states.
The purpose of this book is to provide a thorough exposition of the analysis and
synthesis of combinational and sequential logic circuits, where sequential logic con-
sists of synchronous and asynchronous sequential machines. Emphasis is placed on
structured and rigorous design principles that can be applied to practical applica-
tions. Each step of the analysis and synthesis procedures is clearly delineated. Each
method that is presented is expounded in sufficient detail with several accompanying
examples.
The Verilog hardware description language (HDL) is used extensively through-
out the book for both combinational and sequential logic design. Verilog HDL is an
Institute of Electrical and Electronics Engineers (IEEE) standard: 1364-1995. The
book concentrates on combinational and sequential logic design with emphasis on
the detailed design of various Verilog HDL projects. The examples are designed first
using traditional design techniques, then implemented using Verilog HDL. This
allows the reader to correlate and compare the two design methodologies.
The book is intended to be tutorial, and as such, is comprehensive and self con-
tained. All designs are carried through to completion — nothing is left unfinished or
partially designed. Each chapter includes numerous problems of varying complexity
to be designed by the reader, including both traditional logic design techniques and
Verilog HDL design techniques in appropriate chapters. The Verilog HDL designs
include the design module, the test bench module which tests the design for correct
functionality, the outputs obtained from the test bench, and the waveforms obtained
from the test bench.
Chapter 1 covers the number systems of different radices such as binary, octal,
decimal, and hexadecimal, including conversion between radices. The chapter also