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Write Great Code, Volume 1: Understanding the Machine PDF

461 Pages·2004·5.665 MB·English
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www.it-ebooks.info www.it-ebooks.info WRITE GREAT CODE Volume I: Understanding the Machine by Randall Hyde San Francisco www.it-ebooks.info WRITE GREAT CODE. Copyright © 2004 by Randall Hyde. All rights reserved. No part of this work may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or by any information storage or retrieval system, without the prior written permission of the copyright owner and the publisher. Printed on recycled paper in the United States of America 1 2 3 4 5 6 7 8 9 10 – 07 06 05 04 No Starch Press and the No Starch Press logo are registered trademarks of No Starch Press, Inc. Other product and company names mentioned herein may be the trademarks of their respective owners. Rather than use a trademark symbol with every occurrence of a trademarked name, we are using the names only in an editorial fashion and to the benefit of the trademark owner, with no intention of infringement of the trademark. Publisher: William Pollock Managing Editor: Karol Jurado Cover and Interior Design: Octopod Studios Developmental Editor: Hillel Heinstein Technical Reviewer: Mark de Wever Copyeditor: Andy Carroll Compositor: Riley Hoffman Proofreader: Stephanie Provines For information on book distributors or translations, please contact No Starch Press, Inc. directly: No Starch Press, Inc. 555 De Haro Street, Suite 250, San Francisco, CA 94107 phone: 415-863-9900; fax: 415-863-9950; [email protected]; http://www.nostarch.com The information in this book is distributed on an “As Is” basis, without warranty. While every precaution has been taken in the preparation of this work, neither the author nor No Starch Press, Inc. shall have any liability to any person or entity with respect to any loss or damage caused or alleged to be caused directly or indirectly by the information contained in it. Library of Congress Cataloguing-in-Publication Data Hyde, Randall. Write great code : understanding the machine / Randall Hyde. p. cm. ISBN 1-59327-003-8 1. Computer programming. 2. Computer architecture. I. Title. QA76.6.H94 2004 005.1--dc22 2003017502 No Starch Press, Copyright © 2004 by Randall Hyde www.it-ebooks.info B R I E F C O N T E N T S Chapter 1 Chapter 6 What You Need to Know to Memory Organization Write Great Code and Access 1 133 Chapter 2 Chapter 7 Numeric Representation Composite Data Types 9 and Memory Objects 161 Chapter 3 Binary Arithmetic Chapter 8 and Bit Operations Boolean Logic 39 and Digital Design 191 Chapter 4 Floating-Point Chapter 9 Representation CPU Architecture 65 225 Chapter 5 Chapter 10 Character Representation Instruction Set Architecture 103 259 No Starch Press, Copyright © 2004 by Randall Hyde www.it-ebooks.info Chapter 11 Thinking Low-Level, Memory Architecture Writing High-Level and Organization 405 295 Appendix A Chapter 12 ASCII Character Set Input and Output (I/O) 407 329 Index 411 vi Brief Contents No Starch Press, Copyright © 2004 by Randall Hyde www.it-ebooks.info C O N T E N T S I N D E T A I L 1 WHAT YOU NEED TO KNOW TO WRITE GREAT CODE 1.1 The Write Great Code Series..............................................................................1 1.2 What This Volume Covers...................................................................................3 1.3 Assumptions This Volume Makes..........................................................................5 1.4 Characteristics of Great Code.............................................................................6 1.5 The Environment for This Volume.........................................................................7 1.6 For More Information.........................................................................................7 2 NUMERIC REPRESENTATION 2.1 What Is a Number?.........................................................................................10 2.2 Numbering Systems.........................................................................................11 2.2.1 The Decimal Positional Numbering System..........................................11 2.2.2 Radix (Base)...................................................................................12 2.2.3 The Binary Numbering System..........................................................13 2.2.4 The Hexadecimal Numbering System.................................................15 2.2.5 The Octal (Base-8) Numbering System...............................................18 2.3 Numeric/String Conversions.............................................................................19 2.4 Internal Numeric Representation........................................................................21 2.4.1 Bits................................................................................................21 2.4.2 Bit Strings.......................................................................................22 2.5 Signed and Unsigned Numbers.........................................................................24 2.6 Some Useful Properties of Binary Numbers.........................................................25 2.7 Sign Extension, Zero Extension, and Contraction.................................................27 2.8 Saturation.......................................................................................................30 2.9 Binary-Coded Decimal (BCD) Representation.......................................................31 2.10 Fixed-Point Representation..............................................................................33 2.11 Scaled Numeric Formats.................................................................................35 2.12 Rational Representation..................................................................................38 2.13 For More Information.....................................................................................38 3 BINARY ARITHMETIC AND BIT OPERATIONS 3.1 Arithmetic Operations on Binary and Hexadecimal Numbers................................39 3.1.1 Adding Binary Values......................................................................40 3.1.2 Subtracting Binary Values.................................................................41 3.1.3 Multiplying Binary Values.................................................................42 3.1.4 Dividing Binary Values.....................................................................43 No Starch Press, Copyright © 2004 by Randall Hyde www.it-ebooks.info 3.2 Logical Operations on Bits................................................................................46 3.3 Logical Operations on Binary Numbers and Bit Strings........................................47 3.4 Useful Bit Operations.......................................................................................48 3.4.1 Testing Bits in a Bit String Using AND................................................48 3.4.2 Testing a Set of Bits for Zero/Not Zero Using AND.............................49 3.4.3 Comparing a Set of Bits Within a Binary String...................................49 3.4.4 Creating Modulo-n Counters Using AND............................................51 3.5 Shifts and Rotates............................................................................................52 3.6 Bit Fields and Packed Data...............................................................................55 3.7 Packing and Unpacking Data...........................................................................60 3.8 For More Information.......................................................................................64 4 FLOATING-POINT REPRESENTATION 4.1 Introduction to Floating-Point Arithmetic..............................................................66 4.2 IEEE Floating-Point Formats...............................................................................71 4.2.1 Single-Precision Floating-Point Format................................................72 4.2.2 Double-Precision Floating-Point Format...............................................74 4.2.3 Extended-Precision Floating-Point Format............................................74 4.3 Normalization and Denormalized Values...........................................................75 4.4 Rounding.......................................................................................................77 4.5 Special Floating-Point Values............................................................................78 4.6 Floating-Point Exceptions..................................................................................79 4.7 Floating-Point Operations.................................................................................80 4.7.1 Floating-Point Representation............................................................80 4.7.2 Floating-Point Addition and Subtraction..............................................81 4.7.3 Floating-Point Multiplication and Division...........................................92 4.8 For More Information.....................................................................................100 5 CHARACTER REPRESENTATION 5.1 Character Data.............................................................................................104 5.1.1 The ASCII Character Set................................................................104 5.1.2 The EBCDIC Character Set.............................................................107 5.1.3 Double-Byte Character Sets............................................................108 5.1.4 The Unicode Character Set.............................................................109 5.2 Character Strings..........................................................................................110 5.2.1 Character String Formats................................................................111 5.2.2 Types of Strings: Static, Pseudo-Dynamic, and Dynamic.....................116 5.2.3 Reference Counting for Strings........................................................117 5.2.4 Delphi/Kylix Strings......................................................................118 5.2.5 Creating Your Own String Formats..................................................119 5.3 Character Sets..............................................................................................119 5.3.1 Powerset Representation of Character Sets.......................................120 5.3.2 List Representation of Character Sets................................................120 viii Contents in Detail No Starch Press, Copyright © 2004 by Randall Hyde www.it-ebooks.info 5.4 Designing Your Own Character Set.................................................................121 5.4.1 Designing an Efficient Character Set................................................122 5.4.2 Grouping the Character Codes for Numeric Digits.............................124 5.4.3 Grouping Alphabetic Characters.....................................................124 5.4.4 Comparing Alphabetic Characters...................................................126 5.4.5 Other Character Groupings............................................................128 5.5 For More Information.....................................................................................131 6 MEMORY ORGANIZATION AND ACCESS 6.1 The Basic System Components........................................................................134 6.1.1 The System Bus..............................................................................134 6.1.2 The Address Bus............................................................................135 6.1.3 The Control Bus.............................................................................136 6.2 Physical Organization of Memory...................................................................137 6.2.1 8-Bit Data Buses............................................................................139 6.2.2 16-Bit Data Buses..........................................................................140 6.2.3 32-Bit Data Buses..........................................................................142 6.2.4 64-Bit Buses..................................................................................143 6.2.5 Small Accesses on Non-80x86 Processors........................................143 6.3 Big Endian Versus Little Endian Organization....................................................144 6.4 The System Clock..........................................................................................149 6.4.1 Memory Access and the System Clock.............................................151 6.4.2 Wait States...................................................................................152 6.4.3 Cache Memory.............................................................................153 6.5 CPU Memory Access......................................................................................157 6.5.1 The Direct Memory Addressing Mode..............................................158 6.5.2 The Indirect Addressing Mode.........................................................158 6.5.3 The Indexed Addressing Mode........................................................159 6.5.4 The Scaled Indexed Addressing Modes............................................160 6.6 For More Information.....................................................................................160 7 COMPOSITE DATA TYPES AND MEMORY OBJECTS 7.1 Pointer Types................................................................................................162 7.1.1 Pointer Implementation...................................................................163 7.1.2 Pointers and Dynamic Memory Allocation.........................................164 7.1.3 Pointer Operations and Pointer Arithmetic.........................................164 7.2 Arrays..........................................................................................................169 7.2.1 Array Declarations.........................................................................169 7.2.2 Array Representation in Memory.....................................................172 7.2.3 Accessing Elements of an Array.......................................................173 7.2.4 Multidimensional Arrays.................................................................174 Contents in Detail ix No Starch Press, Copyright © 2004 by Randall Hyde www.it-ebooks.info 7.3 Records/Structures........................................................................................181 7.3.1 Records in Pascal/Delphi...............................................................181 7.3.2 Records in C/C++........................................................................182 7.3.3 Records in HLA.............................................................................182 7.3.4 Memory Storage of Records...........................................................183 7.4 Discriminant Unions.......................................................................................185 7.4.1 Unions in C/C++..........................................................................186 7.4.2 Unions in Pascal/Delphi/Kylix........................................................186 7.4.3 Unions in HLA...............................................................................187 7.4.4 Memory Storage of Unions.............................................................187 7.4.5 Other Uses of Unions.....................................................................188 7.5 For More Information.....................................................................................189 8 BOOLEAN LOGIC AND DIGITAL DESIGN 8.1 Boolean Algebra...........................................................................................192 8.1.1 The Boolean Operators..................................................................192 8.1.2 Boolean Postulates.........................................................................192 8.1.3 Boolean Operator Precedence........................................................194 8.2 Boolean Functions and Truth Tables.................................................................194 8.3 Function Numbers.........................................................................................197 8.4 Algebraic Manipulation of Boolean Expressions................................................198 8.5 Canonical Forms...........................................................................................199 8.5.1 Sum of Minterms Canonical Form and Truth Tables...........................200 8.5.2 Deriving the Sum of Minterms Canonical Form Algebraically..............202 8.5.3 Product of Maxterms Canonical Form..............................................203 8.6 Simplification of Boolean Functions..................................................................204 8.7 What Does This Have to Do with Computers, Anyway?.....................................212 8.7.1 Correspondence Between Electronic Circuits and Boolean Functions....213 8.7.2 Combinatorial Circuits...................................................................214 8.7.3 Sequential and Clocked Logic.........................................................220 8.8 For More Information.....................................................................................224 9 CPU ARCHITECTURE 9.1 Basic CPU Design.........................................................................................225 9.2 Decoding and Executing Instructions: Random Logic Versus Microcode................228 9.3 Executing Instructions, Step by Step.................................................................229 9.3.1 The mov Instruction........................................................................230 9.3.2 The add Instruction........................................................................232 9.3.3 The jnz Instruction.........................................................................234 9.3.4 The loop Instruction.......................................................................234 9.4 Parallelism — The Key to Faster Processing......................................................235 9.4.1 The Prefetch Queue.......................................................................238 9.4.2 Conditions That Hinder the Performance of the Prefetch Queue...........242 9.4.3 Pipelining — Overlapping the Execution of Multiple Instructions..........243 9.4.4 Instruction Caches — Providing Multiple Paths to Memory..................247 x Contents in Detail No Starch Press, Copyright © 2004 by Randall Hyde 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