Variation-Aware Design of Custom Integrated Circuits: A Hands-on Field Guide: A Hands-on Field Guide

197 Pages·2013·4.625 MB·English

by  Trent McConaghy, Kristopher Breen, Jeffrey Dyck, Amit Gupta (auth.)

Variation-Aware Design of Custom Integrated
Circuits: A Hands-on Field Guide
Trent McConaghy Kristopher Breen
•
Jeffrey Dyck Amit Gupta
•
Variation-Aware Design of
Custom Integrated Circuits:
A Hands-on Field Guide
With Foreword by James P. Hogan
123
Trent McConaghy Jeffrey Dyck
SolidoDesign AutomationInc. SolidoDesign AutomationInc.
Saskatoon, SK Saskatoon, SK
Canada Canada
Kristopher Breen Amit Gupta
SolidoDesign AutomationInc. SolidoDesign AutomationInc.
Saskatoon, SK Saskatoon, SK
Canada Canada
ISBN 978-1-4614-2268-6 ISBN 978-1-4614-2269-3 (eBook)
DOI 10.1007/978-1-4614-2269-3
SpringerNewYorkHeidelbergDordrechtLondon
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(cid:2)SpringerScience+BusinessMediaNewYork2013
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Chapter 1:
Introduction
Set topology
Initial sizing
Extract Corners
(PVT / Statistical / High- )
Chapter 2: PVT
Chapter 6:
Chapter 3, 4: Statistical
Design
Chapter 5: High- Sizing on Corners Exploration
Fast Verify
(PVT / Statistical / High- )
Layout
Extract Parasitics
Verify with Parasitics
on Corners
Chapter 7:
Conclusion
Foreword
After more than 35 years in the semiconductor business, I find that custom inte-
gratedcircuit(IC)designcontinuestopresentextremelyinterestingchallenges.In
this book, Trent McConaghy, Kristopher Breen, Jeff Dyck, and Amit Gupta, all
with Solido Design Automation, address the increasingly difficult design issues
associated with variation in advanced nanoscale processes.
The authors have put together what I believe will become an invaluable ref-
erence for best practices in variation-aware custom IC design. They have taken
theory and combined it with methodology and examples, based on their experi-
ences in supplying leading-edge design tools to the likes of TSMC and NVIDIA.
This book’s content is useful for circuit designers, CAD managers and CAD
researchers. This book will also be very useful to graduate students as they begin
their careers in custom IC design.
I have always felt that the job of a designer is to optimize designs to what the
requirements dictate, within the process capabilities. Circuits must trade off the
marketing requirements of function, performance, cost, and power. This is espe-
cially true for custom IC design, where the results are on a continuum. There is
never a perfect answer—only the most right, or equivalently, the least wrong.
Moore’s Law—the practice of shrinking transistor sizes over time—has tradi-
tionally been a no-brainer, since smaller devices directly led to improved power,
performance, and area. Several decades into Moore’s Law, today’s IC manufac-
turinghasliterallyreachedthelevelof‘‘nanotech’’,withminimumdevicesizesat
40, 28, 20 nm, and most recently 14 nm. Variation in devices during manufac-
turing has always been around, but it has not traditionally been a big issue. The
problemisthatvariationgetsexponentiallyworseasthedevicesshrink,andithas
become a major problem at these nano nodes. Designers must choose between
over-margining so that the circuit yields (taking a performance hit), or to push
performance (taking a yield hit).
Variation has made it harder to differentiate ICs on power or performance,
while still yielding. The use of common commercial foundries, such as TSMC,
GLOBALFOUNDRIES, Samsung, and even now Intel, makes it even more dif-
ficulttodifferentiatecompetitively.Performancehitsareunacceptable,becauseall
vii
viii Foreword
semiconductor companies are using the same foundries trying to produce com-
petitive chips. In turn, yield hits are unacceptable for high volume applications
since costs quickly skyrocket.
Moore’sLawandopportunitiesfordifferentiationarethelifebloodofahealthy
semiconductor industry. Variation is threatening both.
I’ve known Trent for several years now, since when he was co-founder of
AnalogDesignAutomation(acquiredbySynopsys)intheearly 2000s.Heearned
hisPh.D.atKULeuvenUniversityunderthesupervisionofGeorgesGielen,andis
now currently co-founder and CTO of Solido Design Automation.
I love Trent’s personal story as well. He grew up on a pig farm in Saskatch-
ewan.Asofthiswriting,Saskatchewanis251,700squaremileswithapopulation
ofjust over 1 million souls.Incontrast, California is 163,696 squaremiles with a
population of 37 million souls. And Saskatchewan gets cold.
Trent once told me a story about farm life. When the weather gets to about
-40(cid:3) (it is the same in Celsius or Fahrenheit), it freezes the valves for the pigs’
outdoor watering bowls. To prevent damage to the plumbing, he had to pour hot
water over the valves to thaw the ice, then re-fasten some tiny bolts. This latter
steprequiredtakinghisglovesoff.Hehadabout15stofastentheboltsandgethis
gloves back on before freezing his fingers (and risking frostbite). Trent is a
fountain of amazing farm stories from his boyhood. I grew up in California, and
thebiggestobstacleIhadtostartingthedaywasdecidingifIwasgoingtoweara
long or short sleeve shirt that day. These experiences surely had a huge influence
in building Trent’s character.
AsIhavecometoknowTrent,Ihavealsolearnedthathehasabroadrangeof
interests,fromneuroscience,tomusic,toart.Hecomplementshiswife,whoisan
art curator with world-class training (Sorbonne, Paris) and work experience (The
Louvre,Paris).TrentistrulyauniqueandentertainingrenaissancemanintheDa
Vinci tradition.
Onthetechnicalside,Trenthasauniqueabilitytoinventalgorithmsthatsolve
realdesignchallenges,butnotstopthere.Hetakesthealgorithmspastthestageof
prototype software that solves academic problems, shepherding them into com-
mercial software usable by real designers doing production circuit design. At
Solido, Trent has worked closely with Jeff Dyck, Kristopher Breen, and Solido’s
product development team, to deliver industrial-scale variation solutions.
ThisbookhelpscustomICdesignerstoaddressvariationissues,inaneasy-to-
readandpragmaticfashion.Ibelievethisbookwillbecomeaninvaluableresource
tothecustomICdesignerfacingvariationchallengesinhis/hermemory,standard
cell, analog/RF, and custom digital designs.
Enjoy the read… and never miss a chance to talk or listen to Trent!
Los Gatos, CA, July 2012 Jim Hogan
Acknowledgments
This book is the culmination of work by the authors and their colleagues,
stretching back nearly a decade, in building variation-aware tools for circuit
designers. It is a distillation of successful and not-so-successful ideas, of lessons
learned, all geared towards making better designs despite variation issues.
We would like to thank those who reviewed the book, and provided extensive
and valuable suggestions: Drew Plant, Mark Smith, Tom Eeckelaert, Jim Hogan,
andGloriaNichols.Thankstothosewhohavehelpedtoprovideandpreparereal-
world design examples: Ting Ku, Hassan Sharghi, Joel Amzallag, Drew Plant,
Jiandong Ge,AnthonyHo,andRoshanThomas.Thankstotherestoftheteamin
Solido Design Automation, who have helped us build and deliver high-quality
tools. Thanks to the Solido investors and Solido board, without whom this work
would not have been possible.
Thanks to our users and our partners, who have helped us shape our tools and
methodologies for real-world use.
Finally,thankyouforpickingupthisbook!Wehopethatyoufindituseful(and
valuable) in your own work.
Solido Design Automation Inc. Trent McConaghy
Canada, July 2012 Kristopher Breen
Jeff Dyck
Amit Gupta
ix
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Key Variation Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 Types of Variables. . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Types of Variation. . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.3 Key Variation-Related Terms . . . . . . . . . . . . . . . . . . 6
1.3 Status Quo Design Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.4 A Fast, Accurate Variation-Aware Design Flow . . . . . . . . . . . 9
1.5 Conclusion/Book Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2 Fast PVT Verification and Design. . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Review of Flows to Handle PVT Variation. . . . . . . . . . . . . . . 15
2.2.1 PVT Flow: Full Factorial . . . . . . . . . . . . . . . . . . . . . 16
2.2.2 PVT Flow: Guess Worst-Case. . . . . . . . . . . . . . . . . . 16
2.2.3 PVT Flow: Guess Worst-Case ? Full Verification. . . . 17
2.2.4 PVT Flow: Good Initial Corners ? Full
Verification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.5 PVT Flow: Fast PVT . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2.6 Summary of PVT Flows. . . . . . . . . . . . . . . . . . . . . . 20
2.3 Approaches for Fast PVT Corner Extraction
and Verification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.1 Full Factorial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.2 Designer Best Guess. . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.3 Sensitivity Analysis (Orthogonal Sampling,
Linear Model). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3.4 Quadratic Model (Traditional DOE). . . . . . . . . . . . . . 22
2.3.5 Cast as Global Optimization Problem (Fast PVT) . . . . 22
xi
xii Contents
2.4 Fast PVT Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.4.1 Overview of Fast PVT Approach. . . . . . . . . . . . . . . . 23
2.5 Fast PVT Verification: Benchmark Results. . . . . . . . . . . . . . . 25
2.5.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.5.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . 25
2.5.3 Post-Layout Flows. . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.5.4 Fast PVT for Multiple Outputs and Multiple Cores . . . 27
2.5.5 Fast PVT Corner Extraction Limitations. . . . . . . . . . . 27
2.5.6 Fast PVT Verification Limitations. . . . . . . . . . . . . . . 27
2.5.7 Guidelines on Measurements. . . . . . . . . . . . . . . . . . . 28
2.6 Design Examples. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.6.1 Corner-Based Design of a Folded-Cascode
Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.6.2 Low-Power Design. . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.7 Fast PVT: Discussion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Appendix A: Details of Fast PVT Verification Algorithm. . . . . 33
Appendix B: Gaussian Process Models. . . . . . . . . . . . . . . . . . 36
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3 A Pictorial Primer on Probabilities. . . . . . . . . . . . . . . . . . . . . . . . 41
3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.2 One-Dimensional Probability Distributions . . . . . . . . . . . . . . . 41
3.3 Higher-Dimensional Distributions . . . . . . . . . . . . . . . . . . . . . 43
3.4 Process Variation Distributions . . . . . . . . . . . . . . . . . . . . . . . 45
3.5 From Process Variation to Performance Variation . . . . . . . . . . 46
3.6 Monte Carlo Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.7 Interpreting Performance Distributions . . . . . . . . . . . . . . . . . . 48
3.8 Histograms and Density Estimation . . . . . . . . . . . . . . . . . . . . 52
3.9 Statistical Estimates of Mean, Standard Deviation,
and Yield . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.10 Normal Quantile Plots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.11 Confidence Intervals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.11.1 Confidence Interval for Mean (P1). . . . . . . . . . . . . . . 60
3.11.2 Confidence Interval for Standard Deviation (P2) . . . . . 60
3.11.3 Confidence Interval for Yield (P3). . . . . . . . . . . . . . . 61
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4 3-Sigma Verification and Design. . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.2 Review of Flows that Handle 3-Sigma Statistical Variation. . . . 66
4.2.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.2.2 Flow: PVT (with SPICE) . . . . . . . . . . . . . . . . . . . . . 67
4.2.3 Flow: PVT ± 3-Stddev Monte Carlo Verify . . . . . . . . 68
Contents xiii
4.2.4 Flow: PVT + Binomial Monte Carlo Verify . . . . . . . . 70
4.2.5 Flow: PVT with Convex Models . . . . . . . . . . . . . . . . 71
4.2.6 Flow: Direct Monte Carlo. . . . . . . . . . . . . . . . . . . . . 73
4.2.7 Flow: Light + Heavy Direct Monte Carlo. . . . . . . . . . 73
4.2.8 Flow: Linear Worst-Case Distances . . . . . . . . . . . . . . 74
4.2.9 Flow: Quadratic Worst-Case Distances. . . . . . . . . . . . 75
4.2.10 Flow: Response Surface Modeling. . . . . . . . . . . . . . . 75
4.2.11 Flow: Sigma-Driven Corners. . . . . . . . . . . . . . . . . . . 77
4.2.12 Summary of Flows for Three-Sigma
Statistical Design. . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.3 Sigma-Driven Corner Extraction . . . . . . . . . . . . . . . . . . . . . . 80
4.3.1 Sigma-Driven Corner Extraction with 1 Output. . . . . . 81
4.3.2 Benchmark Results on Sigma-Driven Corner
Extraction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.3.3 Sigma-Driven Corner Extraction with[1 Output:
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.4 Confidence-Driven 3r Statistical Verification . . . . . . . . . . . . . 87
4.5 Optimal Spread Sampling for Faster Statistical Estimates. . . . . 88
4.5.1 Pseudo-Random Sampling and Yield Estimation . . . . . 88
4.5.2 Issues with Pseudo-Random Sampling . . . . . . . . . . . . 90
4.5.3 The Promise of Well-Spread Samples. . . . . . . . . . . . . 90
4.5.4 The ‘‘Monte Carlo’’ Label. . . . . . . . . . . . . . . . . . . . . 91
4.5.5 Well-Spread Sequences. . . . . . . . . . . . . . . . . . . . . . . 92
4.5.6 Low-Discrepancy Sampling: Introduction . . . . . . . . . . 92
4.5.7 OSS Experiments: Speedup in Yield Estimation?. . . . . 93
4.5.8 OSS Experiments: Convergence of Statistical
Estimates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.5.9 Assumptions and Limitations of Optimal Spread
Sampling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.6 Design Examples. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.6.1 How Many Monte Carlo Samples?. . . . . . . . . . . . . . . 98
4.6.2 Corner-Based Design of a Flip-Flop. . . . . . . . . . . . . . 100
4.6.3 3-Sigma Design of a Folded-Cascode Amplifier . . . . . 101
4.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Appendix A: Density-Based Yield Estimation on[1
Outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Appendix B: Details of Low-Discrepancy Sampling. . . . . . . . . 108
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5 High-Sigma Verification and Design. . . . . . . . . . . . . . . . . . . . . . . 115
5.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
5.1.1 Background. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
5.1.2 The Challenge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116