Turbo Decoder Architecture for Beyond-4G Applications

106 Pages·2013·4.29 MB·English

by  Cheng-Chi Wong, Hsie-Chia Chang

Cheng-Chi Wong · Hsie-Chia Chang
Turbo Decoder
Architecture
for Beyond-4G
Applications
Turbo Decoder Architecture for Beyond-4G
Applications

Cheng-Chi Wong • Hsie-Chia Chang
Turbo Decoder Architecture
for Beyond-4G Applications
123
Cheng-ChiWong Hsie-ChiaChang
DepartmentofElectronicsEngineering DepartmentofElectronicsEngineering
NationalChiao-TungUniversity NationalChiao-TungUniversity
Hsinchu,Taiwan Hsinchu,Taiwan
ISBN978-1-4614-8309-0 ISBN978-1-4614-8310-6(eBook)
DOI10.1007/978-1-4614-8310-6
SpringerNewYorkHeidelbergDordrechtLondon
LibraryofCongressControlNumber:2013947477
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Preface
Turbo code is one of the error-correcting techniques of the standards for 4G
telecommunication system. From current development trend, there is a growing
demand for faster data transmission; therefore, the throughput of turbo decoder
should be raised to support the next-generation application. The common way to
reach this objective is using parallel architecture. However, it causes increasing
complexity and decreasing efficiency. These problems will limit the achievable
improvement. The aim of this book is to resolve the two design issues, and our
main emphasis is on the practical turbo decoders for 3GPP LTE-Advanced and
IEEE 802.16mstandards. Chapter 1 gives an overviewof the code specifications,
theoretical principles, and essential algorithms. Then Chap.2 introduces basic
functional units and main processor of a conventional turbo decoder. It further
indicatesthearchitecturewithsuperiorperformanceandreasonableoverhead.Next,
Chap.3illustratesthecharacteristicsofadvancedparallelarchitectureandexplains
thenegativeeffectsoncomplexityandefficiency.Thereareseveralimplementation
resultssupportingtheintroductionsinChaps.2and3.Allofthemarederivedwith
90nm technology. Chapter 4 presents how to simplify the parallel turbo decoder,
while Chap.5 shows how to get a better utilization of the component circuits.
Moreover, the last two chapters highlight the conditions in which these proposed
methodsaresuitabletouse.Withthematerialsofthisbook,thereaderswouldlearn
aboutchoosingthedecoderarchitecturethatcanfulfilltheirrequirements.
We wish to thank United Microelectronics Corporation for their technical
support. We also wish to thank National Chiao Tung University for providing a
supportiveenvironment.Inparticular,wethankProfessorChen-YiLeeforhishelp.
Finally,wewouldliketoexpressoursinceregratitudetoeveryonewhoassistedus
inwriting,editing,andpublishingthisbook.
Hsinchu,Taiwan Cheng-ChiWong
Hsinchu,Taiwan Hsie-ChiaChang
v

Contents
1 Introduction ................................................................... 1
1.1 TurboCodes:ParallelConcatenatedConvolutionalCodes ............ 3
1.1.1 PrinciplesofEncodingandDecoding .......................... 3
1.1.2 TurboCodesinAdvancedCommunicationSystems .......... 4
1.2 DecodingProcedureofTurboDecoders................................ 8
1.2.1 MAPAlgorithmfor3GPPLTE-AdvancedTurboCode....... 8
1.2.2 IterativeFlowfor3GPPLTE-AdvancedTurboCode.......... 14
1.2.3 MAPAlgorithmforIEEE802.16mTurboCode............... 19
1.2.4 IterativeFlowforIEEE802.16mTurboCode ................. 21
1.3 TechniquesforEfficientDecodingProcess............................. 24
1.3.1 SimplifiedMAPAlgorithms .................................... 24
1.3.2 SlidingWindowTechnique...................................... 25
1.3.3 EarlyStoppingCriteria.......................................... 28
2 ConventionalArchitectureofTurboDecoder ............................. 33
2.1 PracticalTurboDecoderArchitecture .................................. 34
2.1.1 CircuitsofAddressGenerators ................................. 35
2.1.2 CircuitsofMainFunctionalUnits .............................. 37
2.2 DesignofConventionalSISODecoders................................ 39
2.2.1 DecoderArchitectureandProcessingSchedule................ 39
2.2.2 DataWidthandNormalization.................................. 41
2.3 DesignofModifiedSISODecoders..................................... 46
3 TurboDecoderwithParallelProcessing ................................... 53
3.1 MultipleTurboDecodersforMultipleCodewords..................... 54
3.2 MultipleSISODecodersforOneCodeword ........................... 54
3.2.1 ImportantCharacteristics........................................ 54
3.2.2 SpeedupandPerformance....................................... 59
3.2.3 HardwareCost................................................... 60
3.3 SophisticatedFunctionalUnitsforSuccessiveTrellisStages.......... 62
3.4 HybridParallelArchitecture............................................. 66
3.5 State-of-the-ArtChipImplementation.................................. 67
vii
viii Contents
4 Low-ComplexitySolutionforHighlyParallelArchitecture.............. 69
4.1 InterconnectionforParallelDesignwithQPPInterleavers............ 70
4.2 InterconnectionforParallelDesignwithARPInterleavers............ 73
4.2.1 ParallelArchitectureUsingModuloMapping ................. 73
4.2.2 ParallelArchitectureUsingDivisionMapping................. 75
4.3 PerformanceCompensationforParallelDesign........................ 77
5 High-EfficiencySolutionforHighlyParallelArchitecture............... 81
5.1 ProcessingSchedulewithInterlacedDecodingRounds ............... 82
5.2 ProcessingSchedulewithOverlappingDecodingRounds............. 84
5.2.1 QPPInterleaverDesignforOverlappingDecodingRounds... 85
5.2.2 ARP Interleaver Design for Overlapping
DecodingRounds................................................ 88
5.2.3 ApplicationofOverlappingDecodingRounds................. 92
5.2.4 PerformanceofOverlappingDecodingRounds................ 94
Bibliography....................................................................... 97
Chapter 1
Introduction
A successful transfer of information over a physical channel or a transmission
medium involves a series of procedures. The model of data transmission can be
depictedasFig.1.1.Generally,itconsistsofatransmitter,achannel,andareceiver.
The elements inside the transmitter and receiver are utilized to guarantee reliable
and efficient transmission. For less resources usage, the source encoder uses a
shortersymbolsequencetoreplacethesourceinformation,whilethesourcedecoder
performs the data decompression. When data pass through the channel, they will
sufferfromthechannelnoiseandmaybecomeincorrect.Tomakesuretheaccurate
informationcanbedeliveredtothedestination,thechannelencoderwilltransform
its inputs into a structured sequence where parity check symbols are introduced.
Withtheseredundancies,thechanneldecoderiscapableofrecoveringthemessages
even though the received data contain errors caused by channel impairments.
Inadditiontotheelementsforsignalprocessing,thetransmitterneedsamodulator
to translate the data into analog forms which is suitable for transmission; and
the receiver uses a demodulator to convert the channel outputs back to quantized
symbols. All of the components determine the quality of data transmission. The
development of the corresponding techniques will lead to the advancement of
communicationsystems.
In a communication system, the correctness of data transmission is one of the
mostessentialissues.Thistaskofprotectingthetransmittedinformationagainstthe
channelnoiseisdonebythechannelencoderandchanneldecoder.Thestudyabout
these subjects is called forward error correction or channel coding. It originated
fromthelandmarkpaperbyC.E.Shannonin1948[1,2].Shannon’schannelcoding
theorem indicated that arbitrary transmission can be asymptotically error-free by
appropriatecodingtechniquesifthecoderateislessthanthechannelcapacity.The
theoreticallimitsonperformancecanbecalculatedforvarioussignalingschemes,
rates,andchannels.Alotofcodingtechniquesaredevelopedsincethen,andthere
are two main classes of codes: block codes and convolutional codes [3,4]. The
ultimateobjectiveisapproachingtheShannonlimitbyapracticalcodingtechnique,
and such investigation has lasted for several decades. In the 1990s, the advent of
C.-C.WongandH.-C.Chang,TurboDecoderArchitectureforBeyond-4G 1
Applications,DOI10.1007/978-1-4614-8310-6__1,
©SpringerScience+BusinessMediaNewYork2014