AUG 222002 02 30-L-02 Nas | 23-2: 02-07 -_ = . , Space Administration Electronic Components and Circuits Electronic Sy:;tems Physical Sciences Materials Computer Programs Mechanics Machinery Fabrication Technology Mathematicasnd infor=ation Sciences GSDOEORO OGY Life Sciences 02-07 July 2002 Q po h-eAsom{ WA ke Ss x Soyoi gtrc ea rane mp © cy oa ow nS _ commercial application. — ote i > ter Availability of NASA Tech Briefs and TSPs Requests for individual Tech Briefs or for Technical Support Packages (TSPs) announced herein shobe uaddlressded to National TechnToranlsfoer gCeynt er Telephone No. (800) §78-6882 or via World Wide Web at www2.nttc.edu/leads/ Please reference the control numbers appearing at the end of each Te ch Brief. information on NASA's Commercial Technology Team, its documents, and services is also available at the same facility or on the World Wide Web at www.nctn.hq.nasa.gov. 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NASA Tech Briefs, July 2002 3 BLAME PAGE Electronic Components and Circuits Hardware, Techniques, and Processes 7 Evolutionary Automated Synthesis of Electronic Circuits 8 Designing Reconfigurable Antennas Through Hardware Evolution NASA Tech Bnefs, July 2002 b BLANK PAGE Evolutionary Automated Synthesis of Electronic Circuits A genetic algorithm causes circuits to evolve NASA's Jet Propulsion Laboratory, toward a desired behavior. Pasadena, Calitornia Evotutionery Algorithm Genetc Search on a Population ofC hromosomes 101 10011010100 | Cornwersion to | * Setect the best designs from a pop. dation 01110101 101111 Oescrptonso f * Reproduce designs with some vanation 1=1011011|010110 | Corcues * Rerate until the perforgomala sn “csacehe d 4 aN AsseFs ftsnes s eSe eSeSSee eaeeSe aeenSeeSeeSeeeeeSeese eeee esS eena aeeneneaeeeee enee na an Reconfigurabie Hardware Automated Evolutionary Synthesis of electronic circuits is :/ iterative process that imitates some of the features of biological evolution. made to evoNve until at least one crow @rated fom a selected pool of best crouits in the previous genersaubtjecit oton a ,suc h the same general concept as that of the prior version, the main differences lying in the details of implementatThieo fnig.ur e schemdaepitctsi tche amailn lsteyps of an automated evolutionary synthesis according to the present method. In the would be an array of metal onder’ am- frst step, a mathematical conductor fieid-cflect transistors intercon- of @ population of circuits (in this context, nected via programmaswbitlchews . The analogous to Chromosoims geanser)at - Ciroull topology would be a function of the ed randomly. The chromosoamree tshe n Switch states (off or on), which would be conveirntto eeidthe r (1) mathernatical specifies by the strings of control bits. This models of circuits or (2) strings of control prograarramy omf traansbistolrs ecou ld bits that are downloto aprodgrearndrna - be moduéar, and modules could be cas- ble hardware @f the croults are to be Caded and/or expanded to obtain crouits evalGiruectlay itn hearddware ). in the of greater cornpienty mathematical-nodel case, the sirmnula- This work was done by Adrian Stoica tion program compares the behaviors of and Carios Salazar-oLf aCazltaecrh ofo r the models with the desired behavior and NASA's Jet Propulsion Laboratory. the evolution is said to be “extrinsic”;i n Further inforis mconataitnedi ion an T SP [see page 1] This invention is owned by NASA, and a Patent appication has been flied. inquiries hn ete the rtinsc o the eadinsic case, te Guas ae iaked accouing to how Goose ther behevors comtoe t he dearad Counsel, NASA behevor. A new population of crouits is gen- {see page 1) Refer toN PO-20535. Designing Reconfigurable Antennas Through Hardware Evolution This method offers potential advantages ov'x NASA's Jet Propulsion Laboratory, Pasadena, California in @ proposed method of desiging a 40s a tena test range equipped for testing at does not mvolve computatsiromunéaaio n reconfanitengna,u trhe adesbigln ewo ud = the frequency or frequeofn incteeresst. A and is @pected © supass fe mefod computer outside the test range would be that mwokves Computastrniuéaotonn, ”tu s Connected to interface circuits that wo-sd, is because fe ren@s of tecirg a mea in turn, be connected to (1) the test equp- physical implemenarte amhetreintoy nva id and more accurate than are resus obtained trough computationd srruie- tion. in adkiition, optrnizbay tusie oofn th e would be no need to try to validate the sm- ulated resuits with a physica test — a undethrat tusuaaly kentaiils nmangud re- optimof ithez deasigtn tio oobtann te same performance from the physical device as for the srnuéateonde . Ths work was done by Adin Stoce and Derek Linden of Caltech for NASA's Jet Propulsion Laboratory furthe incr maits corottainned ina TSP jsee page 1} formance instead of testing of a real phys- NPO-20666 Cal implemenThet parotpoisedo nmet.ho d NASA Tech Bets. sty 2002 Electronic Systems Hardware, Techniques, and Processes 11 Artificial Neural Networks for Organizing Sensor Webs 12 System Locates Buned Objects Marked by Electromagnetic Tags 12 Advanced Capacitive-Sensor Turbine-Biade-Monitoring System 13 Systern Mimics an Avionic Multiplexer/Demuttipiexer 14 FPGA-Based Test Bench for Nonvolatile Electronic Memones Booandk Respor ts 14 DeepRang-ing SUsinpg Psaeudocnoisee Co des NASA Tech Brets. Ady 2002