Table Of ContentAshok B. Mehta
SystemVerilog
Assertions and
Functional Coverage
Guide to Language, Methodology and
Applications
Second Edition
SystemVerilog Assertions and
Functional Coverage
Ashok B. Mehta
SystemVerilog Assertions
and Functional Coverage
Guide to Language, Methodology
and Applications
Second Edition
123
Ashok B.Mehta
LosGatos, CA
USA
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DOI 10.1007/978-3-319-30539-4
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To
My dear wife Ashraf Zahedi
and
My dear parents Rukshamani
and Biren Mehta
Foreword
Louis H. Sullivan, an American architect, considered the father of the modern
skyscraper, and mentor to Frank Lloyd Wright, coined the phrase ‘form follows
function.’ The actual quote is ‘form ever follows function’ which is a bit more
poetic and assertive than the version that has found its way into the common
vernacular. He wrote those words in an article written for Lippincott’s Magazine
#57 published in March 1896. Here is the passage in that article that contains the
famous quote:
“Whetheritbethesweepingeagleinhislightortheopenapple-blossom,thentoilingwork
horse,theblitheswan,thebranchingoak,thewindingstreamatitsbase,thedriftingclouds—
overallthecoursingsun,formeverfollowsfunction,andthisisthelaw.Wherefunctiondoes
notchange,formdoesnotchange.Thegraniterocks,theeverbroodinghills,remainforages;
thelightninglives,comesintoshape,anddies,inatwinkling.
It is the pervading law of all things organic and inorganic, of all things physical and
metaphysical, of all things human and all things superhuman—of all true manifestations
of the head, of the heart, of the soul—that the life is recognizable in its expression, that
formeverfollowsfunction.Thisisthelaw.”
Earlier in the article, Sullivan foreshadows his thought with this passage:
“Allthingsinnaturehaveashape,thatistosay,aform,anoutwardsemblance,thattellsus
whattheyare,thatdistinguishesthemfromourselvesandfromeachother.”
Theprecisemeaningofthispithyphrasehasbeendebatedinartandarchitecture
circlessinceSullivan’sarticlewasfirstpublished.However,itiswidelyacceptedto
mean that the form of something—its shape, color, size, etc.—is related to what it
does. Water flows, rocks sit, and birds fly.
Inhisbook‘TheDesignofEverydayThings,’(BasicBooks1988)DonNorman
discusses a similar concept, the notion of affordances. Norman defines the term as
‘… the perceived and actual properties of the thing, primarily those fundamental
propertiesthatdeterminejusthowthethingcouldpossiblybeused.’Hecitessome
examples:‘Achairaffords (“isfor”)supportand,therefore,affords sitting.Achair
vii
viii Foreword
canalsobecarried.Glassisforseeingthrough,andforbreaking.Woodisnormally
used for solidity, opacity, support or carving.’
Norman’s idea turns Sullivan’s upside down. He is saying function follows
form. The shape, color, size, etc., of an object affects what it does. Nonetheless,
bothmenwouldlikelyagreethatformandfunction,whicheverdrivestheother,are
inextricably linked.
Softwaredesignershavetheluxuryofchoosingtheformtofitthefunction.They
are not as constrained by the laws of physics as say, a cabinetmaker. The cabi-
netmakermustchoosematerialsthatwillnotonlylooknice,butwillwithstandthe
weight of books or dishes or whatever is to be placed on the shelves. Software
designershavesomeconstraintswithregardtomemoryspaceandprocessingtime,
but beyond that they have a lot offreedom to build whatever comes to mind.
Sullivan referred to ‘all things physical and metaphysical.’ Without much of a
stretch, we can interpret that to include software, a most abstract human creation.
Theformofapieceofsoftwareislinkedtoitsfunction.Thecomplexsoftwarethat
verification engineers build, called a testbench, must be designed before it can be
built. The verification engineer, like an architect, must determine the form of his
creation.
The architecturespace iswideopen.Computercode, while much more abstract
thansay,astaircaseoradoorhandleonacar,hasaformandafunction.Theform
ofcomputercodeisthesetofsyntacticelementsstrungtogetherinaprogram.The
functioniswhattheprogramdoeswhenexecuted,oftenreferredtoasitssemantics.
A verification engineer is typically presented a set of requirements, often as a
design specification, and asked to build a testbench that meets these requirements.
Because of the tremendous flexibility afforded by the software medium, he must
choosetheformcarefullytoensurethatnotonlymeetstherequirements,butiseasy
to use, reusable, and robust. He must choose a form that fits the function.
Oftenanassertionisjusttherightthingtocapturetheessenceofsomepartofa
design.Theformofanassertionisshortsequenceoftextthatcanbeinsertedeasily
without disrupting the design. With their compact syntax and concise semantics,
assertions can be used to check low-level invariants, protocols, or end-to-end
behavior.
The function ofan assertion,in asimulation context, istoassertthat something
is always (or never) the case. It ensures that invariants are indeed invariant.
Assertions can operate as checkers or as coverpoints. The fact that they can be
included in-line in RTL code or in separate checkers and that they can be short or
long for simple or complex checking makes them invaluable in any testbench.
The wise verification engineer uses all the tools as his disposal to create an
effective and easy-to-use testbench. He will consider the function of the testbench
and devise aform that suits the required function. Assertions are animportant part
of any testbench.
AshokMehtahaswrittenabookthatmakesassertionsaccessible.Hisapproachis
very pragmatic, choosing to show you how to build and use assertions rather than
engageinalotoftheoreticaldiscussion.Notthattheoreticaldiscussionisirrelevant—
itisusefultounderstandthetheoreticalunderpinningsofanytechnology.However,
Foreword ix
therearemanyotherbooksonthattopic.Thisbookfillsagapforpracticingengineers
where before no text provided the how-tos of building and using assertions in a
real-worldcontext.
Ashokopensuptheworldofassertionstoverificationengineerswhomayhave
thought them too opaque to consider using in a real testbench. He does an espe-
ciallynicejobofdeconstructingassertionstoshowhowtheyworkandhowtowrite
them. Through detailed examples, he shows all the pieces that go into creating
assertionsofdifferentkinds,andhowtheyfittogether.Ashokcompletesthepicture
by demonstrating how assertions and coverage fit together.
Part of the book is devoted to functional coverage. He deconstructs the some-
times awkward SystemVerilog syntax of covergoups and coverpoints. Like he has
withassertions,hetakesthemysteryoutofbuildingahigh-qualitycoveragemodel.
With the mysteries of assertions unmasked, you can now include them in your
personalvocabulary of testbench forms. This will enable you tocreate testbenches
with more sophisticated function.
February 2013 Mark Glasser
Preface to the Second Edition
The first edition of this book was well received, and the readers provided many a
goodsuggestiononfurtherelaborationoflanguagesemantics.Readersalsopointed
out some errata on the language syntax. I am greatly indebted to the readers and
colleaguesfortheirinputandsupport.Inaddition,theIEEE1800-2012LRMcame
along. Many features of the 2012 LRM were missing in the first edition, since the
LRM was not ready yet. This edition incorporates the errata/suggestions from
readers as well as the IEEE 1800-2012 feature set. Among many, features such as
‘checkers,’‘letdeclarations,’pastandfutureglobalclocksampledvaluefunctions,
strong and weak properties, abort properties, and ‘.triggered’ end point detection
methodareincluded.Furthermore,thiseditionaddsmanymoreexamplesandadds
further clarification of the semantic nuances of the language.
Pleasant reading.
xi
Preface to the First Edition
HavingbeenanenduserofEDAtoolsforover20years,Ihaveseenthatmanynew
technologiesstayonwaysidebecauseeithertheengineersdonothavetimetolearn
thesenewtechnologies/languagesortheavailablematerialistoocomplextodigest.
A few years back I decided to tackle this problem by creating a very practical,
application-orienteddown-to-earthSystemVerilogAssertions(SVA)andfunctional
coverage (FC) class for professional engineers. The class was well received, and I
receivedalotoffeedbackonmakingtheclassevenmoreuseful.Thatculminatedin
over 500 slides of class material just on SVA and FC. Many suggested that I had
collected enough material for a book. That is how I ended up on this project with
the same goal that the reader should understand the concept clearly in an easy and
intuitive manner and be able to apply the concepts to real-life applications right
away.
The style of the book is such that the concepts are clarified directly in a slide
stylediagram withtalking points.Thiswillhopefullymakeiteasytousethebook
asaquickreferenceaswell.Applicationsimmediatelyfollowingatopicwillfurther
clarify the subject matter, and my hope is that once you understand the semantics
and applications of a given topic, you are ready to apply that to your daily design
work. These applications are modeled such that you should be able to use them in
your design with minimal modifications.
This book is meant for both design and verification engineers. As a matter of
fact, I have devoted a complete section on the reasons and practicality behind
having micro-level assertions written by the design engineers and macro-level
assertions written by verification engineers. Gone are the days when designers
wouldwriteRTLandthrowitoverthewall fortheverificationengineertoquality
check.
The book covers both IEEE 1800-2005 and IEEE 1800-2009/2012 standard
SVA language.
Chapter 1 is introduction to SVA and FC giving a brief history of SVA evo-
lution. It also explains how SVA and FC fall under SystemVerilog umbrella to
provide a complete assertions and functional coverage-driven methodology.
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