System-on-Chip Test Architectures: Nanometer Design for Testability (Systems on Silicon) PDF
893 Pages·2007·9.935 MB·English
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Preview System-on-Chip Test Architectures: Nanometer Design for Testability (Systems on Silicon)
Description:
This book is the more system oriented variation and addition to VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon) published earlier by L.T. Wang.You get the most complete and up-to-date summary of DfT methodes and techniques. I am using the book at work and for teaching students at the University. For teaching you are granted access to training material and ATPG software to use with students for free.
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