Phase-Locked Loops for Wireless Communications: Digital, Analog and Optical Implementations

434 Pages·2001·8.25 MB·English

by  Donald R. Stephens

PHASE-LOCKED LOOPS FOR
WIRELESS COMMUNICATIONS
Digital, Analog and Optical
Implementations
Second Edition
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PHASE-LOCKED LOOPS FOR
WIRELESS COMMUNICATIONS
Digital, Analog and Optical
Implementations
Second Edition
by
Donald R. Stephens
KLUWER ACADEMIC PUBLISHERS
NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW
eBookISBN: 0-306-47314-3
Print ISBN: 0-792-37602-1
©2002 Kluwer Academic Publishers
New York, Boston, Dordrecht, London, Moscow
All rights reserved
No part of this eBook may be reproduced or transmitted in any form or by any means, electronic,
mechanical, recording, or otherwise, without written consent from the Publisher
Created in the United States of America
Visit Kluwer Online at: http://www.kluweronline.com
and Kluwer's eBookstore at: http://www.ebooks.kluweronline.com
This book could not have been completed without the
loving support of my family. Many thanks to Tracy,
Andrew, and John
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TABLE OF CONTENTS
PREFACE XI
THE EARLY HISTORY OF PHASE-LOCKED LOOPS 1
1.1 HISTORY 1
1.2 REFERENCES 7
ANALOG PHASE-LOCKEDLOOPS 11
2.1 TIMEDOMAIN ANALYSIS OFPHASE-LOCKED LOOPS 11
2.2 FREQUENCY DOMAIN ANALYSIS OFPHASE-LOCKED LOOPS 19
2.3 PARTIALFRACTION EXPANSION 21
2.4 FIRST ORDER LOOP RESPONSES 27
2.5 DEFINITION OFLOOPORDER 29
2.6 SECOND ORDER PHASE-LOCKED LOOPS 30
2.7 THIRD ORDER PHASE-LOCKED LOOPS 47
2.8 REFERENCES 57
2.9 PROBLEMS 58
ROOTLOCUSANDFREQUENCYANALYSIS 61
3.1 ROOTL O C U S 61
3.2 PROPAGATIONDELAYSIN PLLs 67
3.3 FREQUENCY ANALYSIS 73
3.4 FM DEMODULATOR 80
3.5 NOISE BANDWIDTH 88
viii Contents
3.6 THIRDORDERPHASE-LOCKEDLOOPDESIGN 97
3.7 REFERENCES 107
3.8 PROBLEMS 109
ACQUISITION AND TRACKING 113
4.1 FIRST ORDER ACQUISITION 113
4.2 SECOND ORDER LOOP ACQUISITION 117
4.3 ACQUISITION IN NOISE 126
4.4 FREQUENCY SWEEPING 131
4.5 ACQUISITIONSUMMARY 132
4.6 SUMMARY OF ANALOG PHASE-LOCKED LOOP DESIGN EQUATIONS
133
4.7 REFERENCES 136
4.8 PROBLEMS 137
DIGITAL TRANSFORMS 139
5.1 THE PULSE TRANSFORM 139
5.2 Z TRANSFORM 145
5.3 INVERSEZ-TRANSFORM 150
5.4 PARTIALFRACTIONEXPANSION 152
5.5 SYNTHETICDIVISION 154
5.6 ZERO ORDER HOLD 157
5.7 REFERENCES 159
5.8 PROBLEMS 160
CHARGE PUMPS, COUNTERS, AND DELAY-LOCKED LOOPS
161
6.1 SEQUENTIAL PHASE DETECTORS 161
6.2 COMBINING SEQUENTIAL PHASE DETECTORS AND CHARGE PUMPS
168
6.3 FREQUENCY SYNTHESIZERS 179
6.4 DIGITAL COUNTERS 184
6.5 DELAY-LOCKED LOOPS 186
6.6 REFERENCES 193
DIGITAL TRANSFORMATION OF ANALOG PHASE-LOCKED
LOOPS 195
7.1 ANALOGLOOPTRANSFORMATIONS 196
7.2 ALL DIGITAL LOOPS WITH BLOCK ELEMENTS 209
7.3 LOOPFILTERTRANSFORMATIONS 211
Phase-Locked Loops ix
7.4. VCOs 215
7.5. COMPLETE DIGITAL PLL EQUATIONS 218
7.6. REFERENCES 226
7.7. PROBLEMS 227
STABILITYANDFREQUENCY RESPONSEOFDIGITAL
LOOPS 229
8.1. STABILITY 229
8.2. NOISEBANDWIDTHOFDIGITALPHASE-LOCKEDLOOPS 235
8.3 SAMPLINGRATEEFFECTUPONLOOPBANDWIDTH 243
8.4. REFERENCES 244
8.5. PROBLEMS 245
ALL-DIGITALPHASE-LOCKEDLOOPS 247
9.1. NON-UNIFORM SAMPLING 247
9.2. NOISE ANALYSISOFTHE SECOND ORDER LOOP 256
9.3. NOISEBANDWIDTHOF FIRST ORDER LOOPS 261
9.4. COMPONENTSOF DIGITAL PHASE-LOCKED LOOPS 263
9.5. PHASE DETECTORS 266
9.6. REFERENCES 272
9.7. PROBLEMS 273
DIGITALPLLRESPONSESANDACQUISITION 275
10.1. LINEARIZED INPUT RESPONSES 275
10.2. NONLINEAR ANALYSIS 283
10.3. PHASE PLANE ANALYSIS 289
10.4. PHASE ERROR VARIANCE 291
10.5. PROBABILITYOF ACQUISITION 295
10.6. PROBABILITYOF CYCLE SLIP 297
10.7. NONLINEAR ANALYSISOF SECOND ORDER LOOPS 299
10.8. ACQUISITIONFOR NON-UNIFORM SAMPLING PHASE-LOCKED
LOOPS 303
10.9. REFERENCES 305
10.10.PROBLEMS 306
SYNCHRONIZERS FORDIGITAL COMMUNICATIONS 309
11.1. THE SYNCHRONIZATION PROBLEM 309
11.2. BPSKANDQPSK SYNCHRONIZATION 316
11.3. LOCK DETECTORS 325
11.4. COSTAS LOOPS 328