RapidiTTy™ FPGA RapidiTTy™ FPGA includes the full source-code for the PH 03 Core, which is a full 32-bit processor core based on the MIPS I™ Instruction Set Architecture (excluding patented instructions). It includes the following peripherals: JTAG Debugging. 16-bit Timer. Buffered UART. These peripherals are connected to the processor core through the use of a dedicated bus, which can be used to expand the functionality of the PH Core. RapidiTTy™ Builder RapidiTTy™ Builder ships with library code covering many common embedded tasks, including reading from switches, interfacing with LCDs, receiving input from ADCs, RS-232 communications, PWM output and many more. The TTE Builder™ engine enables this library code to be combined and configured to match the needs of a spe- cific application. For example, we may wish to acquire an analogue signal, process it in some way and then out- put the result. This is easily accomplished: Select and configure the ADC library. Select and configure the PWM library. Write a few simple lines of code to interface them. At this point, we have a complete application that we have created from scratch in minutes. It is also easy to extend as most of the required code has already been generated by RapidiTTy™ Builder. TTE Systems Ltd 106 New Walk Leicester UK Tel: +44 (0)116 223 1684 Fax: +44 (0)116 223 1651 www.tte-systems.com [email protected] [email protected] Patterns for time-triggered embedded systems Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. For further information about time-triggered systems, please visit: www.tte-systems.com ACM PRESS BOOKS This book is published as part of the ACM Press Books – a collaboration between the Association for Computing Machinery and Addison-Wesley. ACM is the oldest and largest education and scientific society in the information technology field. Through its high-quality publications and services, ACM is a major force in advancing the skills and knowledge of IT professionals throughout the world. For further information about ACM contact: ACM Member Services ACM European Service Center 1515 Broadway, 17th Floor 108 Cowley Road New York NY 10036-5701 Oxford OX4 1JF Phone: +1 212 626 0500 United Kingdom Fax: +1 212 944 1318 Phone: +44 1865 382338 Email: [email protected] Fax: +44 1865 381338 Email: [email protected] URL: http://www.acm.org SELECTED ACM TITLES: Software Requirements and Specification: A Lexicon of Software Practice, Principles and Prejudices Michael Jackson Software Test Automation: Effective Use of Text Execution Tools Mark Fewster and Dorothy Graham Test Process Improvement: A Practical Step-by-step Guide to Structured Testing Tim Koomen and Martin Pol Mastering the Requirements Process Suzanne Robertson and James Robertson Bringing Design to Software: Expanding Software Development to Include Design Terry Winograd, John Bennett, Laura de Young, Bradley Hartfield Software for Use: A Practical Guide to the Models and Methods of Usage Centered Design Larry L. Constantine and Lucy A. D. Lockwood Problem Frames: Analyzing and Structuring Software Development Problems Michael Jackson Software Blueprints: Lightweight Uses of Logic in Conceptual Modelling David Robertson and Jaume Agusti Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. This file may be freely redistributed provided only that this footer remains intact. Patterns for time-triggered embedded systems Building reliable applications with the 8051 family of microcontrollers Michael J. Pont The Keil compiler (demo) and associated files on the CD-ROM enclosed with this book have been authored and developed by Keil (UK) Ltd. © Keil (UK) Ltd 2001. aaccmm PRESS Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. For further information about time-triggered systems, please visit: www.tte-systems.com PEARSON EDUCATION LIMITED Head Office: London Office: Edinburgh Gate 128 Long Acre Harlow CM20 2JE London WC2E 9AN Tel: +44 (0)1279 623623 Tel: +44 (0)20 7447 2000 Fax: +44 (0)1279 431059 Fax: +44 (0)20 7240 5771 Websites: www.it-minds.com www.aw.com/cseng/ First published in Great Britain in 2001 ISBN 0 201 33138 1 The right of Michael Pont to be identified as Author of this Work has been asserted by him in accordance with the Copyright, Designs, and Patents Act 1988. All rights reserved; no part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise without either the prior written permission of the Publishers or a licence permitting restricted copying in the United Kingdom issued by the Copyright Licensing Agency Ltd, 90 Tottenham Court Road, London W1P 0LP. This book may not be lent, resold, hired out or otherwise disposed of by way of trade in any form of binding or cover other than that in which it is published, without the prior consent of the Publishers. The programs in this book have been included for their instructional value. The publisher does not offer any warranties or representations in respect of their fitness for a particular purpose, nor does the publisher accept any liability for any loss or damage arising from their use. Many of the designations used by manufacturers and sellers to distinguish their products are claimed as trademarks. Pearson Education Limited has made every attempt to supply trademark information about manufacturers and their products mentioned in this book. The publishers wish to thank the following for permission to reproduce the material: Arizona Microchip Technology Ltd; Allegro Microsystems; Atmel Corporation; Infineon; Philips Semiconductors; Texas Instruments. Two of the figures in this book (Figure 3.2 and 3.4) reproduce information provided by Atmel Corporation. Atmel® warrants that it owns these materials and all intellectual property related thereto. Atmel, however, expressly and explicitly excludes all other warranties, insofar as it relates to this book, including accuracy or applicability of the subject matter of the Atmel materials for any purpose. British Library Cataloguing-in-Publication Data A CIP catalogue record for this book can be obtained from the British Library. Library of Congress Cataloging in Publication Data Applied for. 10 9 8 7 6 5 4 3 2 1 Designed by Claire Brodmann Book Designs, Lichfield, Staffs Typeset by Pantek Arts Ltd, Maidstone, Kent. Printed and bound in the United States of America. The Publishers’ policy is to use paper manufactured from sustainable forests. Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. This file may be freely redistributed provided only that this footer remains intact. This book is dedicated to my parents, Barbara and Gordon Pont Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. For further information about time-triggered systems, please visit: www.tte-systems.com Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. This file may be freely redistributed provided only that this footer remains intact. Contents Foreword page xiv Preface xvi Introduction 1 1 What is a time-triggered embedded system? 3 1.1 Introduction 3 1.2 Information systems 3 1.3 Desktop systems 5 1.4 Real-time systems 6 1.5 Embedded systems 8 1.6 Event-triggered systems 10 1.7 Time-triggered systems 11 1.8 Conclusions 14 2 Designing embedded systems using patterns 15 2.1 Introduction 15 2.2 Limitations of existing software design techniques 17 2.3 Patterns 22 2.4 Patterns for time-triggered systems 24 2.5 Conclusions 25 Part A Hardware foundations 27 3 The 8051 microcontroller family 29 STANDARD 8051 30 SMALL 8051 41 EXTENDED 8051 46 4 Oscillator hardware 53 CRYSTAL OSCILLATOR 54 CERAMIC RESONATOR 64 Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. For further information about time-triggered systems, please visit: www.tte-systems.com viii CONTENTS 5 Reset hardware 67 RC RESET 68 ROBUST RESET 77 6 Memory issues 81 ON-CHIP MEMORY 82 OFF-CHIP DATA MEMORY 94 OFF-CHIP CODE MEMORY 100 7 Driving DC loads 109 NAKED LED 110 NAKED LOAD 115 IC BUFFER 118 BJT DRIVER 124 IC DRIVER 134 MOSFET DRIVER 139 SSR DRIVER (DC) 144 8 Driving AC loads 148 EMR DRIVER 149 SSR DRIVER (AC) 156 Part B Software foundations 159 9 A rudimentary software architecture 161 SUPER LOOP 162 PROJECT HEADER 169 10 Using the ports 173 PORT I/O 174 PORT HEADER 184 11 Delays 193 HARDWARE DELAY 194 SOFTWARE DELAY 206 Copyright © 2001-2008 TTE Systems Ltd. All rights reserved. This file may be freely redistributed provided only that this footer remains intact.
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