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Optimal PWM switching strategy for single-phase AC-DC converters PDF

252 Pages·2016·16.29 MB·English
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Loughborough University Institutional Repository Optimal PWM switching strategy for single-phase AC-DC converters ThisitemwassubmittedtoLoughboroughUniversity’sInstitutionalRepository by the/an author. Additional Information: • A Doctoral Thesis. Submitted in partial ful(cid:28)llment of the requirements for the award of Doctor of Philosophy of Loughborough University. Metadata Record: https://dspace.lboro.ac.uk/2134/7205 Publisher: (cid:13)c M.N. Gitau Please cite the published version. This item is held in Loughborough University’s Institutional Repository (https://dspace.lboro.ac.uk/) and was harvested from the British Library’s EThOS service (http://www.ethos.bl.uk/). It is made available under the following Creative Commons Licence conditions. For the full text of this licence, please go to: http://creativecommons.org/licenses/by-nc-nd/2.5/ OPTIMAL PWM SWITCHING STRATEGY FOR SINGLE-PHASE AC-DC CONVERTERS. by Michael Njoroge Gitau A Doctoral Thesis in fulfilment for the the submitted partial of requirements award of DOCTOR OF PHILOSOPHY the of Loughborough University Technology. of October 1994 Supervisor: Mr. J. G. Kettleborough Department Electronic Electrical Engineering of and Loughborough University Technology of © by M. N. Gitau, 1994. This is dedicated thesis to my parents Willis Gitau Njoroge late Dinah Wambura and my mother behalf. for knowing for the value of education and the many sacrifices they made on my ACKNOWLEDGEMENTS. Mr. J. G. I like thanks to would to take this opportunity to express my sincere Kettleborough for his invaluable guidance, encouragement and my research supervisor I like patience throughout the course of research and preparation of this thesis. would also Professor I. R. Smith, director for his to thank my of research useful comments and during the this thesis. assistance preparation of Thanks due to in the Power Electronics Research for their are also my colleagues group discussions held the that together. support and many useful we The by is to the technical assistance given me staff greatly appreciated. I The British Council, for financial to their to am very grateful my sponsor, support and The University Nairobi, for leave to my employer, of granting me study enable me pursue this research. SYNOPSIS. The describes harmonic for thesis elimination strategy suitable single- an optimal selective AC-DC drives. The is low-order to phase converter-fed traction objective eliminate supply harmonics, including injected into due load-side those the to current supply current ripple. Other has include that the to advantages switching strategy offer over phase-control improved factor, VA for demand supply power reduced consumption a given speed and load, inductance. torque reduced and speed ripple and smaller armature circuit smoothing The field boost dynamic drive is described. the the effect of current on response of also It is field boost helps by increasing that to the the shown reduce speed rise-time during torque electromagnetic available acceleration periods. Closed-loop 4-quadrant DC drive is described between control of a and a comparison made PID-control feedback It is the that performance of and pseudo-derivative control. shown feedback has to pseudo-derivative control several advantages offer, amongst which are ease following load tuning the torque of of controller gains and a superior performance disturbances. A laboratory drive designed built, to size system was and and used validate simulation for both feedback A the predictions switching strategy and pseudo-derivative control. based hardware implementation both digital the microcontroller of switching strategy and a feedback being the pseudo-derivative controller was adopted, with switching strategy implemented the using an off-line approach of precalculating switching angles and storing in look-up these tables. The dual-converter IGBTs armature voltage controller comprises a employing as switching devices. The IGBTs higher frequencies levels use of allows switching at significant power be if GTOs It drive design than the would possible were used. also simplifies gate circuit the to and minimises need use snubber circuits. TABLE OF CONTENTS. Page No. LIST OF PRINCIPAL SYMBOLS. vi 1 CHAPTER ONE: INTRODUCTION. CHAPTER TWO: REVIEW OF CONVENTIONAL 2-QUADRANT CONVERTER-FED DC DRIVES. 5 2.1 Definition drive 6 of performance parameters. 6 2.1.1 Motor performance parameters. 2.1.2 Supply-side 7 performance parameters. 2.1.3 Converter load-side 8 performance parameters. 2.1.3.1 Fourier series representation of converter output 9 voltage. 2.2 Conventional 9 phase-controlled converters. 2.2.1 Output 10 performance parameters. 2.2.2 Supply-side 11 performance parameters. 2.3 Sequence-controlled 11 converters. 2.4 Sinusoidal PWM-controlled 14 converters. CHAPTER THREE: THEORETICAL ANALYSIS OF CONVENTIONAL 4-QUADRANT CONVERTER-FED DRIVES. 22 3.1 Conventional dual-converter drives. 23 phase-controlled 3.1.1 Operation 24 without circulating current. 3.1.1.1 Discontinuous load 24 current. 3.1.2 Operation 26 with circulating current. 3.2 Natural PWM-controlled dual-converter drives. 27 sinusoidal 3.3 Derivation function. 28 of converter switching 3.3.1 Sinusoidal PWM-control function. 29 strategy switching 1 DC PWM-CONTROLLED CHAPTER FOUR: OPTIMAL 4-QUADRANT 33 DRIVES. 34 4.1 Performance parameters. 35 4.2 Effects load-side the current. of current ripple on supply-side 35 drives. 4.2.1 PWM-controlled converter-fed drives. 38 4.2.2 Phase-controlled converter-fed 38 4.3 Selective harmonic (SHE) elimination switching strategies. 39 4.3.1 Ideal load-side current conditions. 40 4.3.2 Load current with significant second-harmonic ripple. 44 4.3.3 Modified function. switching 51 4.4 Converter voltage gain. CHAPTER FIVE: MATHEMATICAL MODELLING OF 4-QUADRANT 58 CONVERTER DRIVES. 58 5.1 Separately-excited DC motor equations. 58 5.1.1 Armature circuit equations. 59 5.1.2 Electrodynamic equations. 60 5.1.3 Field circuit equations. 5.1.4 Field Field boost. 60 current control: 5.2 General drive 63 the analysis of converter-motor system. 5.2.1 Mathematical 67 model of speed controller. 67 5.3 Combined converter-motor system. 5.3.1 Power 68 mode. 5.3.2 Free-wheeling 70 mode. 5.3.3 Coasting 71 mode. 5.3.4 Regeneration 72 mode. 5.4 Effects 74 of commutation overlap. CHAPTER SIX: POWER AND ASSOCIATED AUXILLIARY CIRCUITRY. 82 6.1 Switch 82 selection and sizing. 6.1.1 SCR (Thyristor). 82 6.1.2 GTO. 82 11 83 6.1.3 IGBT 84 6.2 Switch losses heatsink and sizing. 84 6.2.1 IGBT loss conduction 84 loss 6.2.1.1 IGBT switching 85 6.2.2 Series fast diode. recovery 85 6.2.2.2 Heatsink sizing. 86 6.3 DC smoothing choke. 86 6.4 Protection circuits. 86 6.4.1 Overvoltage snubbers. 6.4.1.1 RC design. 87 overvoltage snubber 6.4.1.2 Group 88 suppression. 6.4.2 Current interventionist 88 system. 88 6.4.2.1 Current monitoring circuit. 6.4.2.2 Dead-band 89 current comparator. 6.5 Synchronisation 89 circuit. 90 6.6 Auxilliary power supplies. 6.7 IGBT drive 90 gate circuitry. 6.7.1 Isolated drive 90 gate power supplies. 6.7.1.1 DC design. 90 transformer power supplies 6.7.1.2 Voltage filter for DC 92 unregulated supply. 6.7.2 Isolated drive 93 gate circuit. CHAPTER SEVEN: CLOSED-LOOP SPEED CONTROL. 102 7.1 DC 102 motor model. 7.1.2 Operation field boost during 103 transients. with speed 7.2 Controller 103 model. 7.2.1 Current 104 regulation. 7.2.2 Analog PID-controller. 106 7.2.2.1 Determining 107 the proportional gain. 7.2.2.2 Determining derivative 109 the gain. 7.2.2.3 Determining integral 110 the gain. 7.3 Digital PID-Controller. 111 7.4 Analog feedback 114 pseudo-derivative controller. 7.4.1 Digital feedback 116 pseudo-derivative controller. 111 130 CHAPTER EIGHT: DRIVE CONTROL USING A MICROCONTROLLER. 8.1 Introduction Intel 80C196KC. 131 to the 8.1.1 CPU. 131 8.1.2 Memory Map. 131 8.1.2.1 Register File. 131 8.1.2.2 Special Function Registers. 132 8.1.3 High Speed Input/Output 132 unit. 8.1.3.1 Timers. 132 8.1.3.2 High Speed Input 133 unit. 8.1.3.3 High Speed Output 133 unit. 8.1.3.4 Software 134 timers. 8.1.4 Interrupt 134 structure. 8.2 Hardware implementation drive. 134 the of microcontroller 8.2.1 System 135 clock. 8.2.2 Speed 135 monitoring circuit. 8.2.2.1 Speed interfacing 136 encoder circuit. 8.2.2.2 Digital 137 speed measurement scheme. 8.2.2.3 Demand interfacing 138 speed circuit. 8.2.3 PWM interface switching pattern and control signal processing logic 139 circuit. 8.2.4 Analog 141 speed signal circuit. 8.2.5 Speed display 141 circuit. 8.3 Software design. 8.3.1 Open-loop 142 control. 8.3.1.1 HSI Data Available interrupt 143 service routine. 8.3.1.2 EXTINT 1 interrupt 144 service routine. 8.3.1.3 HSO interrupt 145 service routine. 8.3.2 Closed-loop 146 control. 8.3.2.1 HSI Data Available 146 service routine. CHAPTER NINE: ANAYSIS OF DRIVE PERFORMANCE. 165 9.1 Load-side 165 performance parameters. iv

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(https://dspace.lboro.ac.uk/) and was harvested from the British Library's 3.2 Natural sinusoidal PWM-controlled dual-converter drives. 27 .. A free-wheeling path for the load current is available during both rectifier and inverter operation
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