Multiple-base number system: theory and applications

292 Pages·2012·5.39 MB·English

by  Vassil Dimitrov

K11497 Cover 12/20/11 4:22 PM Page 1
C M Y CM MY CY CMY K
Electrical Engineering
M
MULTIPLE-BASE uJD
scuim
NUMBER edllieitr
enov
r
e
SYSTEM
M
Theory and Applications
U
Vassil Dimitrov • Graham Jullien • Roberto Muscedere
L
T
Computer arithmetic has become so fundamentally embedded into I MULTIPLE-BASE
digital design that many engineers are unaware of the many research P
advances in the area. As a result, they are losing out on emerging
L
opportunities to optimize its use in targeted applications and technologies.
In many cases, easily available standard arithmetic hardware might not E NUMBER
necessarily be the most efficient implementation strategy. -
B
Multiple-Base Number System: Theory and Applications stands apart
A
from the usual books on computer arithmetic with its concentration on
the uses and the mathematical operations associated with the recently S
introduced multiple-base number system (MBNS). The book identifies E SYSTEM
and explores several diverse and never-before-considered MBNS

applications (and their implementation issues) to enhance computation
N
efficiency, specifically in digital signal processing (DSP) and public key
cryptography. U
Despite the recent development and increasing popularity of MBNS as M
Theory and Applications
a specialized tool for high-performance calculations in electronic
hardware and other fields, no single text has compiled all the crucial, B
cutting-edge information engineers need to optimize its use. The authors’
main goal was to disseminate the results of extensive design research— E
including much of their own—to help the widest possible audience of R
engineers, computer scientists, and mathematicians.

S
Dedicated to helping readers apply discoveries in advanced integrated
circuit technologies, this single reference is packed with a wealth of Y
vital content previously scattered throughout limited-circulation technical
S
and mathematical journals and papers—resources generally accessible
T
only to researchers and designers working in highly specialized fields.
Leveling the informational playing field, this resource guides readers E
through an in-depth analysis of theory, architectural techniques, and M
the latest research on the subject, subsequently laying VVaassssiill DDiimmiittrroovv •• GGrraahhaamm JJuulllliieenn
the groundwork users require to begin applying MBNS. K11497
RRoobbeerrttoo MMuusscceeddeerree
6000 Broken Sound Parkway, NW
Suite 300, Boca Raton, FL 33487
711 Third Avenue
an informa business New York, NY 10017
2 Park Square, Milton Park
Abingdon, Oxon OX14 4RN, UK
MULTIPLE-BASE
NUMBER
SYSTEM
Theory and Applications
Circuits and Electrical Engineering Series
Series Editor
Wai-Kai Chen
MicroCMOS Design
Bang-Sup Song
Multiple-Base Number System: Theory and Applications
Vassil Dimitrov, Graham Jullien, and Roberto Muscedere
MULTIPLE-BASE
NUMBER
SYSTEM
Theory and Applications
Vassil Dimitrov • Graham Jullien
Roberto Muscedere
Boca Raton London New York
CRC Press is an imprint of the
Taylor & Francis Group, an informa business
CRC Press
Taylor & Francis Group
6000 Broken Sound Parkway NW, Suite 300
Boca Raton, FL 33487-2742
© 2012 by Taylor & Francis Group, LLC
CRC Press is an imprint of Taylor & Francis Group, an Informa business
No claim to original U.S. Government works
Version Date: 20120104
International Standard Book Number-13: 978-1-4398-3047-5 (eBook - PDF)
This book contains information obtained from authentic and highly regarded sources. Reasonable efforts
have been made to publish reliable data and information, but the author and publisher cannot assume
responsibility for the validity of all materials or the consequences of their use. The authors and publishers
have attempted to trace the copyright holders of all material reproduced in this publication and apologize to
copyright holders if permission to publish in this form has not been obtained. If any copyright material has
not been acknowledged please write and let us know so we may rectify in any future reprint.
Except as permitted under U.S. Copyright Law, no part of this book may be reprinted, reproduced, transmit-
ted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented,
including photocopying, microfilming, and recording, or in any information storage or retrieval system,
without written permission from the publishers.
For permission to photocopy or use material electronically from this work, please access www.copyright.
com (http://www.copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC), 222 Rosewood
Drive, Danvers, MA 01923, 978-750-8400. CCC is a not-for-profit organization that provides licenses and
registration for a variety of users. For organizations that have been granted a photocopy license by the CCC,
a separate system of payment has been arranged.
Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used
only for identification and explanation without intent to infringe.
Visit the Taylor & Francis Web site at
http://www.taylorandfrancis.com
and the CRC Press Web site at
http://www.crcpress.com
Contents
Preface ...................................................................................................................xiii
About the Authors ................................................................................................xv
1. Technology, Applications, and Computation ...........................................1
1.1 Introduction ...........................................................................................1
1.2 Ancient Roots.........................................................................................1
1.2.1 An Ancient Binary A/D Converter .......................................1
1.2.2 Ancient Computational Aids .................................................2
1.3 Analog or Digital? .................................................................................3
1.3.1 An Analog Computer Fourier Analysis Tide Predictor .....4
1.3.2 Babbage’s Difference Engine ..................................................5
1.3.3 Pros and Cons ...........................................................................5
1.3.4 The Slide Rule: An Analog Logarithmic Processor ............6
1.4 Where Are We Now? ............................................................................8
1.4.1 Moore’s Law ..............................................................................9
1.4.2 The Microprocessor and Microcontroller ............................9
1.4.3 Advances in Integrated Circuit Technology ......................10
1.5 Arithmetic and DSP ............................................................................11
1.5.1 Data Stream Processing ........................................................11
1.5.2 Sampling and Conversion ....................................................12
1.5.3 Digital Filtering ......................................................................14
1.6 Discrete Fourier Transform (DFT) ....................................................15
1.6.1 Fast Fourier Transform (FFT) ...............................................17
1.7 Arithmetic Considerations ................................................................19
1.7.1 Arithmetic Errors in DSP ......................................................19
1.8 Convolution Filtering with Exact Arithmetic .................................23
1.8.1 Number Theoretic Transforms (NTTs) ...............................23
1.8.2 An NTT Example ...................................................................24
1.8.3 Connections to Binary Arithmetic ......................................25
1.9 Summary ..............................................................................................27
References .......................................................................................................28
2. The Double-Base Number System (DBNS) .............................................31
2.1 Introduction .........................................................................................31
2.2 Motivation ............................................................................................32
2.3 The Double-Base Number System ....................................................32
2.3.1 The Original Unsigned Digit DBNS....................................32
2.3.2 Unsigned Digit DBNS Tabular Form ..................................33
2.3.3 The General Signed Digit DBNS ..........................................34
2.3.4 Some Numerical Facts ...........................................................34
v
vi Contents
2.4 The Greedy Algorithm .......................................................................35
2.4.1 Details of the Greedy Algorithm .........................................36
2.4.2 Features of the Greedy Algorithm ......................................38
2.5 Reduction Rules in the DBNS ............................................................39
2.5.1 Basic Reduction Rules ...........................................................39
2.5.2 Applying the Basic Reduction Rules ...................................40
2.5.3 Generalized Reduction .........................................................42
2.6 A Two-Dimensional Index Calculus ................................................44
2.6.1 Logarithmic Number Systems .............................................44
2.6.2 A Filter Design Study ............................................................45
2.6.3 A Double-Base Index Calculus ............................................47
2.7 Summary ..............................................................................................49
References .......................................................................................................50
3. Implementing DBNS Arithmetic ..............................................................53
3.1 Introduction .........................................................................................53
3.1.1 A Low-Noise Motivation ......................................................54
3.2 Arithmetic Operations in the DBNS ................................................55
3.2.1 DBNR Addition ......................................................................55
3.2.2 DBNS Multiplication .............................................................58
3.2.3 Constant Multipliers ..............................................................60
3.3 Conversion between Binary and DBNS Using Symbolic
Substitution ..........................................................................................60
3.4 Analog Implementation Using Cellular Neural Networks ..........62
3.4.1 Why CNNs? ............................................................................62
3.4.2 The Systolic Array Approach ...............................................64
3.4.3 System Level Issues ...............................................................64
3.4.4 CNN Basics .............................................................................65
3.4.5 CNN Operation ......................................................................66
3.4.6 Block and Circuit Level Descriptions of the CNN Cell ....67
3.4.7 DBNS Addition CNN Templates Using Overlay and
Row Reduction Rules ............................................................69
3.4.8 Designing the Templates ......................................................70
3.4.9 Handling Interference between Cells .................................72
3.4.10 CMOS Implementation of DBNS CNN
Reduction Rules ..................................................................74
3.4.11 A Complete CNN Adder Cell ..............................................77
3.4.12 Avoiding Feedback Races .....................................................79
3.5 Summary ..............................................................................................81
References .......................................................................................................82
4. Multiplier Design Based on DBNS ...........................................................85
4.1 Introduction .........................................................................................85
4.1.1 A Brief Background ...............................................................85
4.1.2 Extremely Large Numbers ...................................................86
Contents vii
4.2 Multiplication by a Constant Multiplier ..........................................86
4.3 Using the DBNS ...................................................................................87
4.4 DBNS Multiplication with Subquadratic Complexity ...................90
4.5 General Multiplier Structure .............................................................92
4.6 Results and Comparisons ................................................................100
4.7 Some Multiplier Designs ..................................................................101
4.7.1 180 nm CMOS Technology .................................................101
4.7.2 FPGA Implementation ........................................................103
4.8 Example Applications .......................................................................104
4.9 Summary ............................................................................................105
References .....................................................................................................105
5. The Multidimensional Logarithmic Number System
(MDLNS) ..........................................................................................109
5.1 Introduction .......................................................................................109
5.2 The Multidimensional Logarithmic Number System
(MDLNS) ............................................................................................109
5.3 Arithmetic Implementation in the MDLNS ..................................110
5.3.1 Multiplication and Division ...............................................111
5.3.2 Addition and Subtraction ...................................................111
5.3.4 Approximations to Unity ....................................................112
5.4 Multiple-Digit MDLNS .....................................................................116
5.4.1 Error-Free Integer Representations ...................................116
5.4.2 Non-Error-Free Integer Representations ..........................120
5.5 Half-Domain MDLNS Filter ............................................................121
5.5.1 Inner Product Step Processor .............................................121
5.5.2 Single-Digit 2DLNS Computational Unit .........................123
5.5.3 Extending to Multiple Bases ...............................................128
5.5.4 Extending to Multiple Digits ..............................................129
5.5.5 General Binary-to-MDLNS Conversion ............................130
5.6 Summary ............................................................................................131
References .....................................................................................................132
6. Binary-to-Multidigit Multidimensional Logarithmic Number
System Conversion .....................................................................................135
6.1 Introduction .......................................................................................135
6.2 Single-Digit 2DLNS Conversion .....................................................136
6.2.1 Single-Digit 2DLNS-to-Binary Conversion ......................136
6.2.2 Binary-to-Single-Digit 2DLNS Conversion ......................138
6.3 Range-Addressable Lookup Table (RALUT) .................................141
6.3.1 RALUT Architecture ...........................................................141
6.3.1.1 Binary-to-Single-Digit 2DLNS Structure ..........144
6.4 Two-Digit 2DLNS-to-Binary Conversion .......................................145
6.4.1 Two-Digit 2DLNS-to-Binary Conversion
Architecture ....................................................................145
viii Contents
6.5 Binary-to-Two-Digit 2DLNS Conversion .......................................145
6.5.1 Binary-to-Two-Digit 2DLNS Conversion (Quick
Method) .................................................................................147
6.5.1.1 Quick Binary-to-Two-Digit 2DLNS
Conversion Architecture .....................................149
6.5.2 Binary-to-Two-Digit 2DLNS Conversion (High/Low
Method) .................................................................................149
6.5.2.1 Modifying the RALUT for the High/Low
Approximation .....................................................151
6.5.2.2 High/Low Binary-to-Two-Digit 2DLNS
Architecture ..........................................................152
6.5.3 Binary-to-Two-Digit 2DLNS Conversion (Brute-Force
Method) .................................................................................152
6.5.3.1 Brute-Force Conversion Architecture................155
6.5.4 Binary-to-Two-Digit 2DLNS Conversion (Extended-
Brute-Force Method) ............................................................156
6.5.5 Comparison of Binary-to-Two-Digit 2DLNS
Conversion Methods ...........................................................156
6.6 Multidigit 2DLNS Representation (n > 2) ......................................157
6.6.1 Multidigit 2DLNS-to-Binary Conversion .........................157
6.6.2 Binary-to-Multidigit 2DLNS Conversion
(Quick Method) ....................................................................157
6.6.3 Binary-to-Multidigit 2DLNS Conversion (High/Low
Method) .................................................................................157
6.6.4 Binary-to-Multidigit 2DLNS Conversion (Brute-Force
Method) .................................................................................158
6.7 Extending to More Bases..................................................................158
6.8 Physical Implementation ..................................................................159
6.9 Very Large-Bit Word Binary-to-DBNS Converter .........................160
6.9.1 Conversion Methods for Large Binary Numbers ............161
6.9.2 Reducing the Address Decode Complexity .....................163
6.9.3 Results and Discussion .......................................................163
6.10 Summary ............................................................................................166
References .....................................................................................................166
7. Multidimensional Logarithmic Number System:
Addition and Subtraction .........................................................................169
7.1 Introduction .......................................................................................169
7.2 MDLNS Representation ...................................................................170
7.2.1 Simplified MDLNS Representation ...................................170
7.3 Simple Single-Digit MDLNS Addition and Subtraction .............171
7.4 Classical Method ...............................................................................172
7.4.1 LNS Implementation ...........................................................173
7.4.2 MDLNS Implementation ....................................................173
Contents ix
7.5 Single-Base Domain ..........................................................................175
7.5.1 Single-Digit MDLNS to Single-Base Domain ..................176
7.5.2 Single-Base Domain to Single-Digit MDLNS ..................178
7.5.3 MDLNS Magnitude Comparison ......................................180
7.6 Addition in the Single-Base Domain..............................................180
7.6.1 Computing the Addition Table ..........................................180
7.6.1.1 Minimizing the Search Space .............................181
7.6.1.2 Table Redundancy ................................................183
7.6.1.3 RALUT Implementation ......................................183
7.6.1.4 Table Merging .......................................................183
7.6.1.5 Alternatives for m .................................................186
7.6.2 The Complete Structure ......................................................187
7.6.3 Results ...................................................................................187
7.7 Subtraction in the Single-Base Domain .........................................188
7.7.1 Computing the Subtraction Table ......................................188
7.7.1.1 Minimizing the Search Space .............................189
7.7.1.2 RALUT Implementation and Table
Reduction .........................................................190
7.7.2 The Complete Structure ......................................................192
7.7.3 Results ...................................................................................192
7.8 Single-Digit MDLNS Addition/Subtraction .................................193
7.8.1 The Complete Structure ......................................................193
7.8.2 Results ...................................................................................193
7.9 Two-Digit MDLNS Addition/Subtraction .....................................194
7.10 MDLNS Addition/Subtraction with Quantization Error
Recovery .............................................................................................195
7.10.1 Feedback Accumulation in SBD ........................................196
7.10.2 Feedback Accumulation in SBD (with Full SBD
Range) ................................................................................197
7.10.3 Increasing the SBD Accuracy Internally ..........................197
7.11 Comparison to an LNS Case ...........................................................198
7.11.1 Addition ................................................................................199
7.11.2 Subtraction ............................................................................199
7.11.3 Comparisons .........................................................................200
7.12 Summary ............................................................................................201
References .....................................................................................................201
8. Optimizing MDLNS Implementations .................................................203
8.1 Introduction .......................................................................................203
8.2 Background ........................................................................................203
8.2.1 Single-Digit 2DLNS Representation ..................................203
8.2.2 Single-Digit 2DLNS Inner Product Computational
Unit .....................................................................................204