MOSFET Models for VLSI Circuit Simulation: Theory and Practice

627 Pages·1993·14.12 MB·English

by  Dr. Narain Arora (auth.)

Computational
Microelectronics
Edited by S. Selberherr
MOSFET Models
for VLSI Circuit
Simulation
Theory and Practice
N. Arora
Springer-Verlag Wien New York
Dr. Narain Arora
Digital Equipment Corporation
Hudson, MA 01749, USA
This work is subject to copyright.
All rights are reserved, whether the whole or part of the material is concerned,
specifically those of translation, reprinting, re-use of illustrations, broadcasting,
reproduction by photocopying machines or similar means, and storage in data banks,
© 1993 Springer-Veriag/Wien
Softcover reprint of the hardcover I st edition 1993
Typesetting: Thomson Press (India) Ltd" New Delhi 110001
Printed on acid-free paper
With 270 Figures
ISSN 0179-0307
ISBN-13: 978-3-7091-9249-8 e-ISBN-13: 978-3-7091-9247-4
001: 10,1007/978-3-7091-9247-4
In the loving memory of my parents
Hukamdevi and Guranditta Arora
Preface
Metal Oxide Semiconductor (MOS) transistors are the basic building block
ofMOS integrated circuits (I C). Very Large Scale Integrated (VLSI) circuits
using MOS technology have emerged as the dominant technology in the
semiconductor industry. Over the past decade, the complexity of MOS IC's
has increased at an astonishing rate. This is realized mainly through the
reduction of MOS transistor dimensions in addition to the improvements
in processing. Today VLSI circuits with over 3 million transistors on a
chip, with effective or electrical channel lengths of 0.5 microns, are in volume
production. Designing such complex chips is virtually impossible without
simulation tools which help to predict circuit behavior before actual circuits
are fabricated. However, the utility of simulators as a tool for the design
and analysis of circuits depends on the adequacy of the device models used
in the simulator. This problem is further aggravated by the technology
trend towards smaller and smaller device dimensions which increases the
complexity of the models.
There is extensive literature available on modeling these short channel
devices. However, there is a lot of confusion too. Often it is not clear what
model to use and which model parameter values are important and how
to determine them. After working over 15 years in the field of semiconductor
device modeling, I have felt the need for a book which can fill the gap
between the theory and the practice of MOS transistor modeling. This
book is an attempt in that direction.
The book deals with the MOS Field Effect transistor (MOSFET) models
that are derived from basic semiconductor theory. Various models are
developed ranging from simple to more sophisticated models that take into
account new physical effects observed in submicron devices used in today's
MOS VLSI technology. The assumptions used to arrive at the models are
emphasized so that the accuracy of the model in describing the device
characteristics are clearly understood. Due to the importance of designing
reliable circuits, device reliability models have also been covered. Under
standing these models is essential when designing circuits for state of the
art MOS IC's.
VIII Preface
Extracting the device model parameter values from device data is a very
important part of device modeling which is often ignored. In this book the
first detailed presentation of model parameter determination for M OS
models is given. Since the device parameters vary due to inherent processing
variations, how to arrive at worst case design parameters which ensure
maximum yield is covered in some detail.
Presentation of the material is such that even an undergraduate student
not well familiar with semiconductor device physics can understand the
intricacies of MOSFET modeling. Chapter 1 deals with the overview of
various aspects of device modeling for circuit simulators. Chapter 2 is a
brief but complete (for understanding MOSFET models) review of
semiconductor device physics and pn junction theory. The MOS transistor
characteristics as applied to current MOS technologies are discussed in
Chapter 3. The theory of MOS capacitors that is essential for the under
standing of MOS models are covered in Chapter 4. Different MOSFET
models, such as threshold voltage, DC (steady-state), AC and reliability
models are the topic of discussion in Chapters 5, 6, 7 and 8, respectively.
Chapters 9 and 10 deal with data measurements and model parameter
extraction. The diode and MOSFET models implemented in Berkeley
SPICE, a defacto industry standard circuit simulator, are covered in
Chapter 11. Finally, the statistical variation of model parameters due to
process variations are covered in Chapter 12.
It is my sincere hope that this book will serve as a technical source in the
area of MOSFET modeling for state of the art MOS technology for both
practicing device and circuit engineers and engineering students interested
in the said area.
During the writing of this book I have received much help and
encouragement, directly or indirectly, from my colleagues. First I would
like to express my gratitude to the management of Digital Equipment
Corporation, namely Dr. Rich Hollingsworth (Corporate Consultant) and
Dr. Llanda Richardson (Consultant) for their encouragement and assistance
in writing this book. I am deeply indebted to Dr. F. Fox, Dr. D. Ramey,
and Mr. K. Mistry for their excellent work in careful reading of many of
the chapters in the first draft of the manuscript and giving their critical
comments. I am also indebted to Drs. R. Rios, J. Huang and Mr. K. Roal
for this invaluable help during completion of this work. I would like to
express my thanks to the large number of my colleagues, within and outside
my organization, who helped in preparing the manuscript in one way or
the other, namely Drs. A. Bose, D. Bell, B. Doyle, J. Faricelli, A. Enver,
K. L. Kodandpani, L. Richardson, A. R. Shanker, Messers L. Bair, N.
Khalil, L. Gruber, Prof. S. C. Jain (former Director SPL), Prof. D. Antoniadis
(MIT), Prof. G. Gildenblat (Penn. State), Prof. D. J. Roulston (UW), Dr. R.
Chadha (AT & T), and Dr. M. Sharma (Motorola). This acknowledgment
will not be complete without the name of Dr. Risal Singh, myoid colleague
Preface IX
and close friend, who in spite of his busy schedule, spent many many hours
to help me bring this book to the present form.
Finally, I would like to express my deep gratitude to my family. This book
would not have been possible without their support. The understanding
of my wife Suprabha, and the cooperation of my son Surendra and daughter
Shilpa all were indispensable in making this book a reality.
April 11, 1992
Shrewsbury, MA.
Contents
List of Symbols XVII
Acronyms XXII
1 Overview 1
1.1 Circuit Design with MOSFETs 3
1.2 MOSFET Modeling 5
1.3 .Model Parameter Determination 9
1.4 Interconnect Modeling 10
1.5 Subjects Covered 11
References 11
2 Review of Basic Semiconductor and pn Junction Theory 15
2.1 Energy Band Model 15
2.2 Intrinsic Semiconductor 17
2.2.1 Fermi level 19
2.3 Extrinsic or Doped Semiconductor 21
2.3.1 Generation-Recombination 25
2.3.2 Quasi-Fermi Level 27
2.4 Electrical Conduction 28
2.4.1 Carrier Mobility 28
2.4.2 Resistivity and Sheet Resistance 33
2.4.3 Transport Equations 36
2.4.4 Continuity Equation 37
2.4.5 Poisson's Equation 38
2.5 pn Junction at Equilibrium 39
2.5.1 Built-in Potential 42
2.5.2 Depletion Width 43
2.6 Diode Current-Voltage Characteristics 46
2.6.1 Limitation of the Diode Current Model 48
2.6.2 Bulk Resistance 51
2.6.3 Junction Breakdown Voltage 52
XII Contents
2.7 Diode Dynamic Behavior 53
2.7.1 Junction Capacitance 53
2.7.2 Diffusion Capacitance 56
2.7.3 Small Signal Conductance 57
2.8 Real pn Junction 58
2.9 Diode Circuit Model 61
2.10 Temperature Dependent Diode Model Parameters 64
2.10.1 Temperature Dependence of Is 64
2.10.2 Temperature Dependence of 4>bi 66
2.10.3 Temperature Dependence of C 66
jO
References 67
3 MOS Transistor Structure and Operation 69
3.1 MOSFET Structure 69
3.2 MOSFET Characteristics 73
3.2.1 Punchthrough 81
3.2.2 MOSFET Capacitances 82
3.2.3 Small-Signal Behavior 84
3.2.4 Device Speed 86
3.3 MOSFET Scaling 87
3.4 Hot-Carrier Effects 90
3.5 VLSI Device Structures 93
3.5.1 Gate Material 93
3.5.2 Nonuniform Channel Doping 94
3.5.3 Source-Drain Structures 95
3.5.4 Device Isolation 98
3.5.5 CMOS Process 99
3.6 MOSFET Parasitic Elements 102
3.6.1 Source-Drain Resistance 102
3.6.2 Source/Drain Junction Capacitance 108
3.6.3 Gate Overlap Capacitances 109
3.7 MOSFET Length and Width Definitions 113
3.7.1 Effective or Electrical Channel Length 113
3.7.2 Effective or Electrical Channel Width 114
3.8 MOSFET Circuit Models 115
References 118
4 MOS Capacitor 121
4.1 MOS Capacitor with No Applied Voltage 121
4.1.1 Work Function 123
4.1.2 Oxide Charges 127
4.1.3 Flat Band Voltage 131
4.2 MOS Capacitor at Non-Zero Bias 133
4.2.1 Accumulation 135