Modular AC Nano-Grid with Four-Quadrant Micro-Inverters and High-Efficiency DC-DC Conversion by Shahab Poshtkouhi A thesis submitted in conformity with the requirements for the degree of Doctor of Philosophy Graduate Department of Electrical and Computer Engineering University of Toronto Copyright ' 2016 by Shahab Poshtkouhi Abstract Modular AC Nano-Grid with Four-Quadrant Micro-Inverters and High-Efficiency DC-DC Conversion Shahab Poshtkouhi Doctor of Philosophy Graduate Department of Electrical and Computer Engineering University of Toronto 2016 A signi(cid:12)cant portion of the population in developing countries live in remote communi- ties, where the power infrastructure and the required capital investment to set up local grids do not exist. This is due to the fuel shipment and utilization costs required for fossil fuel based generators, which are traditionally used in these local grids, as well as high upfront costs associated with the centralized Energy Storage Systems (ESS). This dissertation targets modular AC nano-grids for these remote communities developed at minimal capital cost, where the generators are replaced with multiple inverters, con- nected to either Photovoltaic (PV) or battery modules, which can be gradually added to the nano-grid. A distributed droop-based control architecture is presented for the PV and battery Micro-Inverters (MIV) in order to achieve frequency and voltage stability, as well as active and reactive power sharing. The nano-grid voltage is regulated collectively in either one of four operational regions. Effective load sharing and transient handling are demonstrated experimentally by forming a nano-grid which consists of two custom 500 W MIVs. TheMIVsformingthenano-gridhavetomeetcertainrequirements. Atwo-stageMIV architecture and control scheme with four-quadrant power-(cid:13)ow between the nano-grid, the PV/battery and optional short-term storage is presented. The short-term storage is realized using high energy-density Lithium-Ion Capacitor (LIC) technology. A real- ii time power smoothing algorithm utilizing LIC modules is developed and tested, while the performance of the 100 W MIV is experimentally veri(cid:12)ed under closed-loop dynamic conditions. TwomainlimitationsoftheDABtopology,asthecoreoftheMIVarchitecture’sdc-dc stage,areaddressed: 1)Thistopologydemonstratespoorefficiencyandlimitedregulation accuracyatlowpower. Theseareimprovedbyintroducingamodi(cid:12)edtopologytooperate the DAB in Flyback mode, achieving up to an 8% increase in converter efficiency. 2) The DAB topology needs four digital isolators for driving the active switches on the other side of the isolation boundary. Two Phase-Locked-Loop (PLL) based synchronization schemes are introduced in order to reduce the number of required digital isolators, hence increasing reliability and reducing the implementation costs. One of these schemes is demonstrated on a discrete 150 W DAB prototype, while both of them are implemented on-chip in a 0.18(cid:22)m 80V BCD process. In addition, the power-stage of the primary-side of a 1 MHz, 50 W DAB converter is fully integrated on the same die. By using such a high switching frequency, the size of passive elements in the DAB is reduced, resulting in further cost reductions for the MIV. The results of this dissertation pave the way for affordable nano-grids with minimal capital cost, reliable performance and reduced complexity. iii Acknowledgements \You are not a drop in the ocean, you are the entire ocean in a drop." { Rumi, 13th century Persian poet, jurist and scholar First and foremost, I would like to thank my doctoral advisor, Professor Olivier Trescases,forhisexceptionallevelofguidanceandsupportthroughoutmyentiregraduate studies. Every time I left his office after a research meeting, I was more motivated and much happier than when I was going in. His wisdom and vast technical knowledge catalyzesuniquesynergieswithin\OTgrp", ourresearchgroupwhichIhavebeenaproud member of since its early days of foundation. I have learned so much from Olivier, not only in the technical aspect, but also in business, management, and personal networking, for which I will always be grateful. I have had the pleasure of collaborating with many forward-looking companies as well as a great number of talented individuals. I want to thank Solantro Semiconductor for their visionary outlook and keen interest in niche humanitarian applications, which prompted the nano-grid project. In particular, I have had the honor of working closely with Ray Orr and Ben Bacque, whose creative approach to solving technical difficulties has had a lasting in(cid:13)uence on me. I also want to thank Mihai Varlan, Tony Reinberger, Chris Gerolami, Nikolay Radimov, Edward Keyes, Edward MacRobbie, and Christian Cojocaru from Solantro Semiconductor for their technical support and long fruitful dis- cussions during my internship at Solantro. I have learned a lot from all of them. I have had the pleasure of collaborating with Magnachip Semiconductor for the IC design and fabrication presented in Chapter 5. I want to thank Michael Sun and Ikjoon Choi for securing the silicon space on one of their highly popular shuttle runs as well as providing much needed technical support throughout the design stage. I would like to express my sincere gratitude to David King Li for his continuous effort on IDP (Chapter 2), Hus- sam Hussein and Aliakbar Eski, for their signi(cid:12)cant contributions to the development iv and testing of many DAB prototypes (Chapters 3 and 4), and Miad Fard, for his valued cooperation in the design and testing of the SPM IC (Chapter 5). This thesis would not have got so far without their important contributions. I want to thank all the friends I have made and worked with in my graduate studies. I will never forget my shared memories with Victor (Yue) Wen, Mazhar and Andishe Moshirvaziri, Vishal Palaniappan, Shuze Zhao, Shawkat Zaman, Steven Chung, Masa- fumiOtsuka,andAhmadDiabMarzouk. Ithankthemforthediscussion,encouragement, and friendship. I received generous (cid:12)nancial support from Ontario Centres of Excellence (OCE), Solantro Semiconductor, Hatch, NSERC, OGS, and Rogers Graduate Scholarship. With- out this funding, my Ph.D. would not have been as smooth as it was. I acknowledge the support from all these sources. I know that I can never be thankful enough to my mother, whose hard work and ambitions have always been the main source of inspiration to me. I know that I can never fully embrace all the dedications and sacri(cid:12)ces my father has done for me. If I were to choose, I could not have possibly asked for better parents, whose unconditional love and support have always been there for me. I de(cid:12)nitely cannot thank Tania enough. Now that I look back at it, I know that I found her just in time, at a time when I was overwhelmed with stress and endless uncertainties. Her patience and understanding boosted me through this rough stage of my life. Had it not been for her, my Ph.D. track would have been longer, harder, and de(cid:12)nitely lonelier. I admit that when I developed the \smoothing" algorithm in Chapter 3, I did not believe it could be done any better any smoother. Well, she never stops proving me wrong, and I love it. v Contents 1 Introduction 1 1.1 Modular AC Nano-Grids . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 Bidirectional Topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3 Thesis Outline and Objectives . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Nano-Grid Architecture and Control 18 2.1 Proposed Droop Control . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.1.1 Nano-Grid Voltage Partitioning . . . . . . . . . . . . . . . . . . . 24 2.1.2 PV and Battery Inverter Control . . . . . . . . . . . . . . . . . . 24 2.2 Nano-Grid Test Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2.3 Nano-Grid Experimental Results . . . . . . . . . . . . . . . . . . . . . . 35 2.4 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3 MIV Architecture and Control 43 3.1 DC-DC Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.2 DC-AC Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 3.3 Short-Term Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 3.4 Power Smoothing Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . 50 3.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.5.1 MIV Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.5.2 Smoothing Algorithm Performance Evaluation . . . . . . . . . . . 57 vi 3.6 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 4 DAB Converter: Drawbacks and Enhancements 64 4.1 Low-Power Efficiency Enhancement . . . . . . . . . . . . . . . . . . . . . 65 4.1.1 Modi(cid:12)ed DAB Architecture and Principle of Operation . . . . . . 65 DAB Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Flyback Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Dual Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . 70 4.1.2 Regulation Accuracy at Low Power . . . . . . . . . . . . . . . . . 70 4.1.3 Transformer Design . . . . . . . . . . . . . . . . . . . . . . . . . . 73 4.1.4 Efficiency Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Conduction Losses . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Switching Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Core Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Loss Comparison in Two Modes . . . . . . . . . . . . . . . . . . . 78 4.1.5 Simulation and Experimental Results . . . . . . . . . . . . . . . . 79 4.2 Reliability and Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 4.2.1 PTS Scheme for the DAB Topology . . . . . . . . . . . . . . . . . 87 Digital PLL Implementation Scheme and Analog Interface . . . . 90 Data Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . 92 4.2.2 Effect of Transformer Leakage Inductance . . . . . . . . . . . . . 92 4.2.3 Extension to Other Isolated Bidirectional Topologies . . . . . . . 96 4.2.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 99 4.3 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 5 On-Chip Synchronization and Integrated DAB Converter 110 5.1 PLL Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 5.2 DIS Scheme Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . 113 vii 5.3 PTS Scheme Synchronization . . . . . . . . . . . . . . . . . . . . . . . . 116 5.4 Integrated Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 5.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 5.6 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 6 Conclusions 134 6.1 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 6.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 A Intelligent Distribution Panel 140 A.1 IDP Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 A.2 Measurements and Processing . . . . . . . . . . . . . . . . . . . . . . . . 143 A.3 IDP Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 145 A.4 Appendix Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 B Household Load Modeling and Emulation 150 B.1 Load Pro(cid:12)le Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 B.2 Load Pro(cid:12)le Emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 B.3 Appendix Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 viii List of Tables 1.1 Comparison of AC and DC Micro and Nano-Grids . . . . . . . . . . . . . 6 2.1 Operational Regions of V and Interpretations for PV/Battery MIVs and g Local Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.2 Parameters of the Simulated Nano-Grid . . . . . . . . . . . . . . . . . . . 31 3.1 MIV Prototype Speci(cid:12)cations . . . . . . . . . . . . . . . . . . . . . . . . 54 3.2 LIC and PV Speci(cid:12)cations . . . . . . . . . . . . . . . . . . . . . . . . . . 58 4.1 Dual Mode DAB Converter Prototype Speci(cid:12)cations . . . . . . . . . . . . 81 4.2 DAB Converter with PTS Scheme Prototype Speci(cid:12)cations . . . . . . . . 100 5.1 DAB Converter Prototype Speci(cid:12)cations with External Power Stage . . . 123 5.2 DAB Converter Prototype Speci(cid:12)cations with Internal Power Stage as Primary-Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 5.3 Comparison of Driving Schemes in Isolated Converters . . . . . . . . . . 131 A.1 Comparison of IDP MSOGI-FLL Outputs and Readings from E-Load for Four Test Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 ix List of Figures 1.1 Projected world energy consumption between 2010 and 2040 [1]. . . . . . 2 1.2 Visualizationoftheremoteplacesonearth, createdbytheEuropeanCom- missions Joint Research Centre and the World Bank [6]. . . . . . . . . . 2 1.3 Price history of silicon PV cells ($/W ) [8]. . . . . . . . . . . . . . . . . . 3 p 1.4 Architecture of (a) a nano-grid with central ESS and generator, and (b) the proposed modular nano-grid. . . . . . . . . . . . . . . . . . . . . . . 7 1.5 Two-stage MIV architecture with integrated storage targeted in this work. 10 1.6 The full system implementation of the nano-grid. . . . . . . . . . . . . . 11 2.1 Equivalent Thevenin model of a single MIV connected to the nano-grid. . 20 2.2 P-V droop characteristic for (a) battery, and (b) PV MIVs. . . . . . . . 22 2.3 Q-f droop characteristic for battery and PV MIVs. . . . . . . . . . . . . 23 2.4 Control approaches for the PV and battery inverters based on regulation of virtual resistance and the synthetic internal voltage. . . . . . . . . . . 25 2.5 (a) P, and (b) Q for the two parallel battery inverters with different SOC. SOC = 0.25, and SOC = 0.1. The inverters are cold started at t = 0 s. 28 n1 n2 2.6 (a) P, and (b) Q for the two parallel battery inverters with different series resistances. R = 0.1 Ω, and R = 0.3 Ω. . . . . . . . . . . . . . . . . . 29 L1 L2 2.7 Block diagram of the inverter control implementation. . . . . . . . . . . . 30 2.8 The RMS nano-grid voltage, V , throughout the simulated test scenario. . 31 g 2.9 The real power of MIV1-5, P , throughout the simulated test scenario. 32 1(cid:0)5 x
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