Low-Power High-Resolution Analog to Digital Converters: Design, Test and Calibration

250 Pages·2011·0.54 MB·English

by  Amir Zjajo

Low-Power High-Resolution Analog
to Digital Converters
ANALOGCIRCUITSANDSIGNALPROCESSING
SeriesEditors:MohammedIsmail
MohamadSawan
Forothertitlespublishedinthisseries;goto
http://www.springer.com/series/7381
Amir Zjajo Jose´ Pineda de Gyvez
l
Low-Power High-Resolution
Analog to Digital Converters
Design, Test and Calibration
AmirZjajo Jose´ PinedadeGyvez
DelftUniversityofTechnology EindhovenUniversityofTechnology,
Delft,TheNetherlands andNXPSemiconductors
[email protected] Eindhoven,TheNetherlands
[email protected]
ISBN978-90-481-9724-8 e-ISBN978-90-481-9725-5
DOI10.1007/978-90-481-9725-5
SpringerDordrechtNewYorkHeidelbergLondon
LibraryofCongressControlNumber:2010937432
#SpringerScience+BusinessMediaB.V.2011
Nopartofthisworkmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorbyany
means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written
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SpringerispartofSpringerScience+BusinessMedia(www.springer.com)
“To my family”
Amir Zjajo
“To the free spirited”
José Pineda de Gyvez

Contents
1 Introduction................................................................ 1
1.1 A/DConversionSystems.............................................. 1
1.2 RemarksonCurentDesignandDebuggingPractice.................. 5
1.3 Motivation.............................................................. 9
1.4 Organization............................................................ 9
2 AnalogtoDigitalConversion............................................. 11
2.1 High-SpeedHigh-ResolutionA/DConverterArchitecturalChoices. 11
2.1.1 Multi-StepA/DConverters.................................... 11
2.1.2 PipelineA/DConverters....................................... 13
2.1.3 ParallelPipelinedA/DConverters............................. 14
2.1.4 A/DConvertersRealizationComparison...................... 16
2.2 NotesonLowVoltageA/DConverterDesign........................ 20
2.3 A/DConverterBuildingBlocks....................................... 25
2.3.1 Sample-and-Hold .............................................. 25
2.3.2 OperationalAmplifier.......................................... 29
2.3.3 LatchedComparators .......................................... 33
2.4 A/DConverters:Summary............................................. 39
3 DesignofMulti-StepAnalogtoDigitalConverters..................... 41
3.1 Multi-StepA/DConverterArchitecture............................... 41
3.2 DesignConsiderationsforNon-IdealMulti-StepA/DConverter..... 44
3.3 Time-InterleavedFront-EndSample-and-HoldCircuit............... 49
3.3.1 Time-InterleavedArchitecture................................. 49
3.3.2 MatchingofSample-and-HoldUnits.......................... 55
3.3.3 CircuitDesign.................................................. 62
3.4 Multi-StepA/DConverterStageDesign.............................. 67
3.4.1 CoarseQuantization............................................ 67
3.4.2 FineQuantization.............................................. 74
3.5 Inter-StageDesignandCalibration.................................... 85
vii
viii Contents
3.5.1 Sub-D/AConverterDesign................................... 85
3.5.2 ResidueAmplifier............................................. 87
3.6 ExperimentalResults ................................................. 93
3.7 Conclusions ......................................................... 102
4 Multi-StepAnalogtoDigitalConverterTesting..................... 103
4.1 AnalogATPGforQuasi-StaticStructuralTest .................... 103
4.1.1 TestStrategyDefinition..................................... 105
4.1.2 LinearFaultModelBasedonQuasi-StaticNodalVoltage
Approach.................................................... 106
4.1.3 DecisionCriteriaandTest-StimuliOptimization .......... 117
4.2 DesignforTestabilityConcept....................................... 124
4.2.1 Power-ScanChainDfT....................................... 126
4.2.2 ApplicationExample.......................................... 132
4.3 On-ChipStimulusGenerationforBISTApplications................ 141
4.3.1 Continuous-andDiscrete-TimeCircuitTopologies.......... 143
4.3.2 DesignofContinuous-andDiscrete-TimeWaveform
Generator...................................................... 153
4.4 RemarksonBuilt-InSelf-TestConcepts............................. 163
4.5 StochasticAnalysisofDeep-SubmicronCMOSProcess
forReliableCircuitsDesigns......................................... 169
4.5.1 StochasticMNAforProcessVariabilityAnalysis ........... 170
4.5.2 StochasticMNAforNoiseAnalysis.......................... 173
4.5.3 ApplicationExample.......................................... 176
4.6 Conclusion ............................................................ 179
5 Multi-StepAnalogtoDigitalConverterDebugging................... 183
5.1 ConceptofSensorNetworks.......................................... 183
5.1.1 ObservationStrategy.......................................... 184
5.1.2 IntegratedSensor.............................................. 186
5.1.3 DecisionWindowandApplicationLimits ................... 190
5.1.4 Die-LevelProcessMonitorsCircuitDesign.................. 194
5.1.5 TemperatureSensor........................................... 201
5.2 EstimationofDie-LevelProcessVariations.......................... 205
5.2.1 Expectation-MaximizationAlgorithm........................ 205
5.2.2 SupportVectorMachineLimitsEstimator................... 208
5.3 DebuggingofMulti-StepA/DConverterStages..................... 210
5.3.1 QualityCriterion.............................................. 211
5.3.2 EstimationMethod............................................ 213
5.4 DfTforFullAccessabilityofMulti-StepConverters................ 218
5.4.1 TestControlBlock............................................ 221
5.4.2 AnalogTestControlBlock................................... 222
5.5 DebuggingofTime-InterleavedSystems............................. 211
5.6 ForegroundCalibration............................................... 231
Contents ix
5.7 ExperimentalResults ................................................. 235
5.7.1 ApplicationofResultsforA/DTestWindow
Generation/Update............................................ 239
5.7.2 ApplicationofResultsforA/DConverterDebugging
andCalibration................................................ 244
5.8 Conclusion ............................................................ 250
6 ConclusionsandRecommendations..................................... 253
6.1 SummaryofResults................................................... 253
6.2 RecommendationsandFutureResearch.............................. 255
Appendix................................................................... 257
References...................................................................... 267
Index............................................................................ 269