Hector Solar Ruiz · Roc Berenguer Pérez Linear CMOS RF Power Amplifiers A Complete Design Workflow Linear CMOS RF Power Amplifiers Hector Solar Ruiz Roc Berenguer Pérez • Linear CMOS RF Power Amplifiers A Complete Design Workflow 123 HectorSolarRuiz RocBerenguer Pérez Electronics andCommunication Department Centre of Technical Research (CEIT) and Universityof Navarra (Tecnun) San Sebastian Spain ISBN 978-1-4614-8656-5 ISBN 978-1-4614-8657-2 (eBook) DOI 10.1007/978-1-4614-8657-2 SpringerNewYorkHeidelbergDordrechtLondon LibraryofCongressControlNumber:2013945144 (cid:2)SpringerScience+BusinessMediaNewYork2014 Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartof the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation,broadcasting,reproductiononmicrofilmsorinanyotherphysicalway,andtransmissionor informationstorageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilar methodology now known or hereafter developed. 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While the advice and information in this book are believed to be true and accurate at the date of publication,neithertheauthorsnortheeditorsnorthepublishercanacceptanylegalresponsibilityfor anyerrorsoromissionsthatmaybemade.Thepublishermakesnowarranty,expressorimplied,with respecttothematerialcontainedherein. Printedonacid-freepaper SpringerispartofSpringerScience+BusinessMedia(www.springer.com) You have had the good fortune to find real teachers, authentic friends, who have taught you everything you wanted to know without holding back. You have had no need to employ any tricks to steal their knowledge, because they led you along the easiest path, even though it had cost them a lot of hard work and suffering to discover it… Now, it is your turn to do the same, with one person, and another—with everyone Saint Josemaría Escrivá Founder of the University of Navarra To our families Preface Thegreatspreadofwirelesstechnologiesthatisnowobservedreflectstheinterest in greater connectivity and pushes the development of portable devices that are able to connect to these emerging wireless technologies. Portable devices, then, need to offer increasing connectivity capabilities while maintaining their perfor- mance in terms of size and autonomy. Therefore, portable devices must further reduce not only their power consumption but also the size of their electronics. In other words, high performance, low cost, and highly integrated Radio Frequency IntegratedCircuits(RFICs)areincreasinglyrequiredbytheconsumerelectronics industry. CMOS integrated technology has played an important role in this wireless explosion due to its high functionality, integration capabilities, and low cost. Consequently,poweramplifiers(PAs)implementedinstandardCMOSprocesses, whichofferperformanceclosetothatfoundinmoreexpensivetechnologies,such as GaAs, are highly attractive. This is not only because CMOS technologies are extensively currently used in RF ICs implementations but also because CMOS PAs may offer low cost and high integration characteristics. However, the PA is still an RF component that has not been completely inte- grated within the whole transceiver due to the existing trade-off between high- performance and high integration characteristics. If high-performance PAs are required, designers focus on expensive processes that prevent PAs from being implementedinlowcost,highlyintegrateddevices.Conversely,ifhighintegration is desired, achieving high-linearity and high-efficiency CMOS PAs is still a challenge.Inadditiontothis,PAshaveadirectimpactontransceiverperformance becausethePApowerconsumptionmayeasilymakeup50%oftheoverallpower consumption of the transceiver, meaning that a high-performance PA is crucial. This work, then, focuses on design techniques for high-performance, fully integrated linear CMOS PAs for wireless applications. The work provides a complete flow for the design of the CMOS PA by describing the steps from the very beginning of the design process. The book provides an overview of the metrics that quantify the performance of the PA in order to obtain the PA requirements.InChap.3,thelinearityandefficiencymetricsofPAscanbefound along with the metrics of PAs that handle digitally modulated channels. Stability and power capability parameters have been also included. vii viii Preface Once the specific requirements of the PA have been established, this work providesdesignerswithaPAmodeltohelpanticipatetheexpectedperformanceof the PA. Based on the most important design parameters such as biasing, supply voltage,inductorqualityfactors,currentconsumption,etc.,themodelprovidesthe expected metrics of the PA in terms of efficiency, linearity, and output power levels. This model proves, then, to be a useful starting point in the first design steps. The model description can be found in Chap. 6. Once parameters such as current consumption, supply voltage, or the required inductor quality factors have been quantified, the book discusses the optimization process of all the PA stages. Based on a linear CMOS PA example, the output matching network, output, and driver amplifying stages, the input matching net- work, and the interstage matching network are detailed. In addition, the main issues that must be considered in the PA layout design process in order to avoid performancedegradationarealsopresented. Specialattentionispaidtotheissues of integrated inductors in PAs, along with the extra considerations that designers must know inorder to optimize inductor performance. Thedetailsfor the PAand the integrated inductor optimization process are also found in Chap. 6. The test setups and procedures required to characterize a PA are described in Chap. 7. In order to fully characterize PA performance, single-tone test and tests based on digital channels should be performed. The book presents both types of tests,alongwithresultsbasedontheaforementionedlinearCMOSPAexample.In addition,testsetupsandproceduresformeasuringinductorsforPAsareincluded. ThebookalsoprovidesanintroductoryoverviewoftheimpactofthePAinthe transceiverquantified for modern communicationstandardsinChap. 1.Chapter2 addressestheissuesandlimitationsthatCMOSprocessesimposeonthedesignof high-performance linear PAs such as the low supply voltage that is available in modern submicron CMOS processes or low transistor transconductance. This chapter also details several other aspects of CMOS processes, such as substrate losses, impedance transformation, or stability and reliability issues. Fundamentals of PAs, i.e., the classification of PAs into different classes, as current source oras switch-typePAs, are also presented inChap.4. Thepractical uses of the different PA classes in implementing a linear PA architecture are also presented; examples might be using class C PAs in linear Doherty PAs or com- bining class D PAs to implement an outphasing PA architecture. Finally, Chap. 5 is devoted to PA architectures that are of interest for building fully integrated PAs in order to achieve higher output power levels, enhanced linearity, or better efficiency. Power combined PAs and the Doherty architecture, along with dynamic supply, adaptive biasing or digital predistortion techniques, andtheuseofcascodetransistorsareallinterestingsolutionstoboostPAlinearity, efficiency,oroutputpowerlevelsinCMOSprocesseswithlimitedsupplyvoltage. Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 The Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Impact of PA on Integrated Transceivers . . . . . . . . . . . . . . . . . . . . . 1 Requirements of Modern Wireless Standards . . . . . . . . . . . . . . . . 2 CMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Organization of the Book. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Power Amplifier Fundamentals: Metrics. . . . . . . . . . . . . . . . . . . . 11 AM–AM Distortion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Saturated Power and One dB Compression Point . . . . . . . . . . . . . 11 Third-Order Intercept Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 AM–PM Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Digital Channel Metrics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Spectral Regrowth. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Error Vector Magnitude. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Efficiency Metrics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Drain Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Power-Added Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Power Back-Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Transmit Power Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Stability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Power Capability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3 Power Amplifier Fundamentals: Classes. . . . . . . . . . . . . . . . . . . . 29 Current Source PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Transconductance Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Knee Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Class A PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Class AB PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Class B PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Class C PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 ix x Contents Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Switch-Type PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Class D PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Class E PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Harmonic Tuning: Class F PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 4 CMOS Performance Issues. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Low Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Effect of the Knee Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Load Transformation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Reliability Issues. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Oxide Breakdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Hot Carrier Degradation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Reliability Projection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Reliability Under RF Stress . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Transistor Parasitics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Substrate Issues. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Stability Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 5 Enhancement Techniques for CMOS Linear PAs . . . . . . . . . . . . . 75 Cascode PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Thick Oxide Cascode PAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Self-Biased Cascode PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Multiple Stacked Cascode PAs. . . . . . . . . . . . . . . . . . . . . . . . . . 79 Combined PAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Integrated Transformer Power Combining . . . . . . . . . . . . . . . . . . 80 Simple Parallel Combination . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Doherty PAs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Predistorted PAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Dynamic Supply or Envelope Tracking . . . . . . . . . . . . . . . . . . . . . . 88 Adaptive Biasing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 6 Power Amplifier Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 A Model for the Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . 101 Model Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Output Power, Drain Efficiency and PAE . . . . . . . . . . . . . . . . . . 111 Model-Based Analyses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Starting Point Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Contents xi Measurement Comparisons. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Power Amplifier Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Schematic Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Design Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Power Inductor Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Top Metal Layer Width Considerations . . . . . . . . . . . . . . . . . . . . 130 Multiple Metal Layer Considerations. . . . . . . . . . . . . . . . . . . . . . 131 Inductor Geometry Considerations. . . . . . . . . . . . . . . . . . . . . . . . 132 Accuracy Analysis of the Electromagnetic Simulator. . . . . . . . . . . 133 Power Inductor Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Layout Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Circuit Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Differential Design Considerations . . . . . . . . . . . . . . . . . . . . . . . 141 Passive Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 Stage Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 Pad Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 7 Test Setups and Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Inductor Characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Test Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 Prior Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 De-Embedding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 PA Characterization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Single-Tone Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Digital Channel Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Reliability and Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . 175 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178 8 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179 Highlights. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179 Main Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181 A Complete Design Flow for a CMOS Linear PA. . . . . . . . . . . . . 181 Useful Enhancement Techniques for Linear CMOS PAs . . . . . . . . 181 Design and Characterization of Power Inductors. . . . . . . . . . . . . . 181 Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
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