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ISSPICE4 USER'S GUIDE Personal Computer Circuit - Intusoft PDF

457 Pages·2008·1.67 MB·English
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Personal Computer Circuit Design Tools ISSPICE4 USER’S GUIDE VOLUMES 1 AND 2 © copyright intusoft 1988-2007 One Civic Plaza Dr., Suite 470 Carson, CA 90745 USA Phone: 310-952-0657 Fax: 310-952-5468 www.intusoft.com intusoft provides this manual “as is" without warranty of any kind, either expressed or implied, including but not limited to the implied warranties of merchantability and fitness for a particular purpose. This publication may contain technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes will be incorporated in new editions of this publication. Copyright intusoft, 1988-2007. All Rights Reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form by any means without written permission from Intusoft. IsSpice4 is based on Berkeley SPICE 3F.2, which was developed by the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley CA and XSPICE, which was developed by Georgia Tech Research Corp., Georgia Institute of Technology, Atlanta Georgia, 30332-0800 Portions of IsSpice4 have been developed at Universite Catholique de Louvain in Belgium, University of Illinois in U.S.A., and Macquarie University in Australia. Many thanks to Benjamin Iniguez, Pablo Menu, Anthony Parker and Christophe Basso for their contributions to IsSpice4’s models. Portions of this manual have been previously published in EDN Magazine. is a trademark of intusoft Intusoft, the Intusoft logo, ICAPS, ICAP, ICAP/4, IsSpice, IsSpice4, SpiceNet, IntuScope, Test Designer, and IsEd are trademarks of Intusoft, Inc. Pspice is a registered trademark of OrCAD corp. All company/product names are trademarks/registered trademarks of their respective owners. All company/product names are trademarks/registered trademarks of their respective owners. Windows and Windows NT are trademarks of Microsoft Corporation. Printed in the U.S.A. rev. 09/07 Build 3090 C-ii Contents Volume 1 Chapter 1- 8 Chapter 1 Introduction 1 About IsSpice4 2 SPICE 2/IsSpice4 Differences Chapter 2 Using IsSpice4 11 IsSpice4 Overview 11 Starting IsSpice4 12 Quitting IsSpice4 12 The IsSpice4 Display 14 Simulation Control Dialog 15 Saving Windows Positions 16 Starting, Stopping and Pausing The Simulation 16 Scaling, Adding and Deleting Waveforms 18 Saving Waveform Vectors For Real-Time Viewing 18 Interactive Circuit Measurements (Not Available in ICAP/4Rx) 20 Saving and Viewing Past Simulation Data 21 Sweeping Circuit Parameters (Not Available in ICAP/4Rx) 23 Sweeping Groups of Parameters (Not Available in ICAP/4Rx) 25 Adding An ICL Script To A Sweep 26 Scripting: Introduction to ICL 28 Viewing Waveforms In More Detail Chapter 3 Analysis Types 29 Analysis Summary 30 Code Models And Analysis Types 30 ICL - Interactive Command Language 30 DC Operating Point Analysis 31 DC Small Signal Transfer Function (Not Available in ICAP/4Rx) 31 DC Sweep Analysis 32 Sensitivity Analysis (Not Available in ICAP/4Rx) 33 AC Analysis 34 Noise Analysis (Not Available in ICAP/4Rx) C-iii TABLE OF CONTENTS 35 Distortion Analysis (Not Available in ICAP/4Rx) 36 Pole-Zero Analysis 36 Transient Analysis 37 Transient Initial Conditions 37 How IsSpice4 Runs A Transient Analysis 38 Output Data And Aliasing 39 Changing The Simulation Accuracy 40 Simulation Stability 42 Fourier Analysis (Not Available in ICAP/4Rx) 43 Temperature Analysis 44 Simulation Templates (Not Available in ICAP/4Rx) 46 References Chapter 4 Mixed-Mode Simulation 47 Mixed-Mode Simulation Overview 49 Native Digital Simulation 49 States, Logic Levels and Strengths 50 Events and Event Scheduling 51 Gate Delays 52 Rise and Fall Times 53 Node Types and Translation 54 Analog and Digital Interfaces 55 Mixing Digital and Analog Circuitry 56 Viewing Digital Data 56 Creating Digital Stimulus 57 Reducing Circuit Complexity Chapter 5 Netlist Definition 59 IsSpice4 Netlist 60 Netlist Structure 61 The Title and .END lines 61 ICL Statements and Control Block 62 Analysis Control Statements 62 Output Control Statements 64 Circuit Topology Definition 67 MODEL Statements 68 Subcircuit Netlist 70 Miscellaneous Netlist Statements 70 Delimiters and the Comma 71 IsSpice4 Netlist Construction 72 IsSpice4 Output Files 74 Code Model Netlist Structure Chapter 6 Extended Syntax 79 Introduction 81 Parameter Passing C-iv 83 .PARAM Syntax 84 PARAM Rules and Limitations 86 Parameterized Expressions 87 Entering .PARAM Statements 88 Entering Parameterized Expressions 89 Passing Parameters To Subcircuits 90 Default Subcircuit Parameters 92 Parameter Passing Example 94 DEFINE 95 DEFINE Rules and Limitations 96 DEFINE Example 97 INCLUDE 98 INCLUDE Example 99 INCLUDE Rules and Limitations 100 Subcircuit and Model Hierarchy Chapter 7 Extended Analysis 103 Introduction 105 Tolerances 110 Subcircuit Parameter Tolerances 112 Tolerance Value Generation 112 Monte Carlo Analysis (Not Available in ICAP/4Rx) 113 Performing A Monte Carlo Analysis (ICL Scripted) 113 STEP 1: A Working Circuit 113 STEP 2: Adding Tolerances 113 STEP 3: Setting Up The Measurements 116 STEP 4: Defining Lots and Cases 116 STEP 5: Running a Monte Carlo Simulation 117 Viewing the Results 119 Circuit Optimization ( Not Available in ICAP/4Rx) 119 Optimizer Preparation 120 Running The Optimizer 121 Single and Multi-Parameter Sweeps (Not Available in ICAP/4Rx) 123 Error Messages and Solutions 124 Simulation Templates Chapter 8 Element Syntax 135 IsSpice4 Syntax Notation 136 Resistors/Semiconductor Resistors 138 Capacitors/Semiconductor Capacitors 141 Inductors 142 Coupled Inductors 143 Ideal Transmission Lines 144 Lossy Transmission Lines C-v TABLE OF CONTENTS 148 Uniformly Distributed RC/RD Transmission Lines 150 Switches (with Hysteresis) 153 Switch (Smooth Transition) 155 Independent Voltage Sources 158 Transient Signal Generators 162 Independent Current Sources 164 Analog Behavioral Modeling 165 Linear Dependent Sources 165 Voltage-Controlled Voltage Sources 165 Current-Controlled Current Sources 166 Current-Controlled Voltage Sources 166 Voltage-Controlled Current Sources 167 Nonlinear Dependent Sources 167 In-line Equations, Expressions, And Functions 171 Using Time, Frequency, and Temperature in Expressions 172 Behavioral Modeling Issues 175 Nonlinear Elements 176 Boolean Logic Expressions 179 If-Then-Else Expressions 181 Device Models Statements 183 .Model Statement 184 Diodes 186 Bipolar Junction Transistors 190 Junction Field-Effect Transistors 192 GaAs Field Effect Transistors - MESFETs 197 Metal Oxide Field Effect Transistors - MOSFETs 214 EPLF-EKV 2.6 LEVEL 9 MOSFET Model 218 Subcircuits 218 Subcircuit Call Statement 219 .Subckt Statement 220 .Ends Statement C-vi Volume 2 Chapter 9 - Appendices Chapter 9 Code Model Syntax 221 Introduction 222 The Port Table 224 The Parameter Table 225 Analog Code Models 226 Magnetic Core 230 Differentiator 232 Fully Depleted SOI Mosfet 236 Hysteresis Block 238 Inductive Coupling 240 Limiter 242 Controlled One-Shot 244 Table Models 249 Laplace (s-Domain) Transfer Function 252 Slew Rate Block 254 Controlled Sine Wave Oscillator 256 Controlled Square Wave Oscillator 258 Controlled Triangle Wave Oscillator 260 Smooth Transition Switch 262 Repeating Piece-Wise Linear Source 266 Hybrid Code Models and Node Bridges 267 Digital-to-Analog Node Bridge 269 Analog-to-Digital Node Bridge 271 Digital-to-Real Node Bridge 272 Real-to-Analog Node Bridge 273 Analog-to-Real Node Bridge 275 Controlled Digital Oscillator 277 Controled Digital PWM 279 Real Code Models 279 Z-Transform Block (Real) 280 Gain Block (Real) 281 Digital Code Models 282 Buffer 283 Inverter C-vii 284 And 285 Nand 286 Or 287 Nor 288 Xor 289 Xnor 290 Tristate 291 Pullup 292 Pulldown 293 Open Collector 294 Open Emitter 295 D Flip Flop 297 JK Flip Flop 299 Toggle Flip Flop 301 Set-Reset Flip Flop 303 D Latch 305 Set-Reset Latch 307 State Machine 311 Frequency Divider 313 RAM 316 Digital Source 318 MIDI Digitally Controlled Oscillator Chapter 10 Analysis Syntax 319 Analysis Notation 320 .DC - DC Sweep Analysis 321 .OP - Operating Point 322 .TF - Transfer Function 322 .Nodeset - Initial Node Voltages 323 .AC - Small-Signal Frequency Analysis 324 .Noise - Small-Signal Noise Analysis 326 .Disto - Small-Signal Distortion Analysis 329 Sensitivity Analysis 331 .PZ - Pole-Zero Analysis 332 .Tran - Transient Analysis 333 .IC - Transient Initial Conditions 334 .Four - Fourier Analysis 335 .Print - Output Statement 339 .Plot - Output Statement 339 .View - Real Time Waveform Display 341 .Options - Program Defaults 350 Analyses At Different Temperatures 351 Title and End Statements 351 Continuation and Comment Lines 352 References C-viii Chapter 11 Interactive Command Language 355 ICL Defined 357 The Interactive Command Language 362 ICL Function Summary Listing 364 ICL Command Summary Listing 370 Simulation Templates & Directives 371 IntuScope Commands 372 IntuScope Functions 373 Using ICL Scripts Appendix A 379 Solving SPICE Convergence Problems 379 What is Convergence? (or in my case, Non-Convergence) 381 General Discussion 383 IsSpice4 - New Convergence Algorithms 383 Non-Convergence Error Messages/Indications 384 Convergence Solutions 384 DC Convergence Solutions 389 DC Sweep Convergence Solutions 389 Transient Convergence Solutions 393 Modeling Tips 395 Repetitive And Switching Simulations 396 Other Convergence Helpers 396 Special Cases 397 SPICE 3 Convergence Helpers Appendix B 398 Device and Model Parameters Appendix C 399 IsSpice4 Error and Warning Messages 399 Errors 407 Warnings Appendix D Adding a SPICE Model 409 Importing SPICE model with Library Manager 410 Save New Model 410 Define Where to Find Model in Part Browser 411 Validating That Your Part Was Added 412 Use Existing Symbol 413 Create New Symbol or Modify Existing Symbol 414 Create a Folder to Contain Your Own Models 414 Eliminating Duplicate Parts Errors 414 What MakeDB does in more detail C-ix Appendix E Export Schematic of Model as Subckt 416 Make Configuration For Export 417 Define Subckt Parameters 419 Exporting the Subcircuit Netlist 419 Make Your Exported Subckt Model Easier to Use Index I-XXV C-x

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