Table Of ContentPersonal Computer
Circuit Design
Tools
ISSPICE4 USER’S GUIDE
VOLUME 1
© copyright intusoft 1988-2001
879 West 190th Street, Suite 100
Gardena, Ca. 90248-4223
Tel. (310) 329-3295
Fax (310) 329-9864
email -
intusoft provides this manual “as is" without warranty of any kind, either
expressed or implied, including but not limited to the implied warranties of
merchantability and fitness for a particular purpose.
This publication may contain technical inaccuracies or typographical
errors. Changes are periodically made to the information herein; these
changes will be incorporated in new editions of this publication.
Copyright
intusoft, 1988-2001. All Rights Reserved. No part of this publication may
be reproduced, transmitted, transcribed, stored in a retrieval system, or
translated into any language in any form by any means without written
permission from Intusoft.
IsSpice4 is based on Berkeley SPICE 3F.2, which was developed by the
Department of Electrical Engineering and Computer Sciences, University
of California, Berkeley CA and XSPICE, which was developed by Georgia
Tech Research Corp., Georgia Institute of Technology, Atlanta Georgia,
30332-0800
Portions of IsSpice4 have been developed at Universite Catholique de
Louvain in Belgium, University of Illinois in U.S.A., and Macquarie
University in Australia. Many thanks to Benjamin Iniguez, Pablo Menu,
Anthony Parker and Christophe Basso for their contributions to IsSpice4’s
models.
Portions of this manual have been previously published in EDN Magazine.
is a trademark of intusoft
Intusoft, the Intusoft logo, ICAPS, ICAP, ICAP/4, IsSpice, IsSpice4,
SpiceNet, IntuScope, Test Designer, and IsEd are trademarks of Intusoft,
Inc. Pspice is a registered trademark of OrCAD corp. All company/product
names are trademarks/registered trademarks of their respective owners.
All company/product names are trademarks/registered trademarks of their
respective owners. Windows and Windows NT are trademarks of
Microsoft Corporation.
Printed in the U.S.A. rev. 02/01
ii
Contents
Volume 1 Chapter 1- 8
Chapter 1 Introduction
1 About IsSpice4
2 SPICE 2/IsSpice4 Differences
Chapter 2 Using IsSpice4
11 IsSpice4 Overview
11 Starting IsSpice4
12 Quitting IsSpice4
12 The IsSpice4 Display
14 Simulation Control Dialog
15 Saving Windows Positions
16 Starting, Stopping and Pausing The Simulation
16 Scaling, Adding and Deleting Waveforms
18 Saving Vectors For Real-Time Viewing
18 Interactive Circuit Measurements (Not Avail. in ICAP/4Rx)
20 Saving and Viewing Past Simulation Data
21 Sweeping Circuit Parameters (Not Avail. in ICAP/4Rx)
23 Sweeping Groups of Parameters (Not Avail. in ICAP/4Rx)
25 Adding An ICL Script To A Sweep
26 Scripting: Introduction to ICL
28 Viewing Waveforms In More Detail
Chapter 3 Analysis Types
29 Analysis Summary
30 Code Models And Analysis Types
30 ICL - Interactive Command Language
30 DC Operating Point Analysis
31 DC Small Signal Transfer Function
31 DC Sweep Analysis
32 Sensitivity Analysis (Not Available in ICAP/4Rx)
33 AC Analysis
34 Noise Analysis (Not Available in ICAP/4Rx)
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TABLE OF CONTENTS
35 Distortion Analysis (Not Available in ICAP/4Rx)
36 Pole-Zero Analysis
36 Transient Analysis
37 Transient Initial Conditions
37 How IsSpice4 Runs A Transient Analysis
38 Output Data And Aliasing
39 Changing The Simulation Accuracy
40 Simulation Stability
42 Fourier Analysis (Not Available in ICAP/4Rx)
43 Temperature Analysis
44 Simulation Templates (Not Available in ICAP/4Rx)
46 References
Chapter 4 Mixed-Mode Simulation
47 Mixed-Mode Simulation Overview
49 Native Digital Simulation (Not Available in ICAP/4Rx)
49 States, Logic Levels and Strengths
50 Events and Event Scheduling
51 Gate Delays
52 Rise and Fall Times
53 Node Types and Translation
54 Analog and Digital Interfaces
55 Mixing Digital and Analog Circuitry
56 Viewing Digital Data
56 Creating Digital Stimulus
57 Reducing Circuit Complexity
Chapter 5 Netlist Definition
59 IsSpice4 Netlist
60 Netlist Structure
61 The Title and .END lines
61 ICL Statements and Control Block
62 Analysis Control Statements
62 Output Control Statements
64 Circuit Topology Definition
67 MODEL Statements
68 Subcircuit Netlist
70 Miscellaneous Netlist Statements
70 Delimiters and the Comma
71 IsSpice4 Netlist Construction
72 IsSpice4 Output Files
74 Code Model Netlist Structure
Chapter 6 Extended Syntax
79 Introduction
81 Parameter Passing
iv
83 .PARAM Syntax
84 PARAM Rules and Limitations
86 Parameterized Expressions
87 Entering .PARAM Statements
88 Entering Parameterized Expressions
89 Passing Parameters To Subcircuits
90 Default Subcircuit Parameters
92 Parameter Passing Example
94 DEFINE
95 DEFINE Rules and Limitations
96 DEFINE Example
97 INCLUDE
98 INCLUDE Example
99 INCLUDE Rules and Limitations
100 Subcircuit and Model Hierarchy
Chapter 7 Extended Analyses
103 Introduction
105 Data Reduction Programs
108 Exiting To ICAPS
108 Pausing A Program
108 Pre-Stored Program Files
109 Programming Do’s And Don’ts
111 Tolerances
114 Subcircuit Parameter Tolerances
116 Toleranced Value Generation
116 Monte Carlo Analysis (Not Available in ICAP/4Rx)
118 Performing A Monte Carlo Analysis (ICL Scripted)
118 STEP 1: A Working Circuit
118 STEP 2: Adding Tolerances
118 STEP 3: Setting Up The Measurements
120 STEP 4: Defining Lots and Cases
121 STEP 5: Running a Monte Carlo Simulation
122 Viewing the Results
124 Performing A Monte Carlo Analysis (IntuScope Program)
124 STEP 1: A Working Circuit
124 STEP 2: Adding Tolerances
124 STEP 3: Running a Nominal Case
125 STEP 4: Making a Data Reduction Program
125 STEP 5: Running a Monte Carlo Simulation
127 Parameter Passing, Special Instances
127 Formatting the Reduced Data
128 STEP 6: Analyzing the Monte Carlo Analysis Data
128 Curve Families
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TABLE OF CONTENTS
129 Circuit Optimization (Not Available in ICAP/4Rx)
129 Optimizer Preparation
131 Running The Optimizer
131 Optimizer Output
133 Single and Multi-Parameter Sweeps (Not Avail. in ICAP/4Rx)
135 Error Messages and Solutions
Chapter 8 Element Syntax
137 IsSpice4 Syntax Notation
138 Resistors/Semiconductor Resistors
140 Capacitors/Semiconductor Capacitors
143 Inductors
144 Coupled Inductors
145 Ideal Transmission Lines
146 Lossy Transmission Lines
150 Uniformly Distributed RC/RD Transmission Lines
152 Switches (with Hysteresis)
155 Switch (Smooth Transition)
157 Independent Voltage Sources
160 Transient Signal Generators
164 Independent Current Sources
166 Analog Behavioral Modeling
167 Linear Dependent Sources
167 Voltage-Controlled Voltage Sources
167 Current-Controlled Current Sources
168 Current Controlled Voltage Sources
168 Voltage-Controlled Current Sources
169 Nonlinear Dependent Sources
169 In-line Equations, Expressions, And Functions
173 Using Time, Frequency, and Temperature in Expressions
174 Behavioral Modeling Issues
177 Nonlinear Elements
178 Boolean Logic Expressions
181 If-Then-Else Expressions
183 Device Models Statements
185 .Model Statement
187 Diodes
188 Bipolar Junction Transistors
192 Junction Field-Effect Transistors
194 GaAs Field Effect Transistors - MESFETs
198 Metal Oxide Field Effect Transistors - MOSFETs
210 BSIM3 Version 3.1 Level 8 Parameters
215 EPLF-EKV 2.6 MOSFET Model
217 BSIM4 Version 4.1.0 Level 14 Parameters
vi
227 Subcircuits
227 Subcircuit Call Statement
228 .Subckt Statement
229 .Ends Statement
Volume 2 Chapter 9 - Appendices
Chapter 9 Code Model Syntax
231 Introduction
232 The Port Table
234 The Parameter Table
235 Analog Code Models
236 Magnetic Core
240 Differentiator
242 Fully Depleted SOI Mosfet
246 Hysteresis Block
248 Inductive Coupling
250 Limiter
252 Controlled One-Shot
254 Table Models
259 Laplace (s-Domain) Transfer Function
262 Slew Rate Block
264 Controlled Sine Wave Oscillator
266 Controlled Square Wave Oscillator
268 Controlled Triangle Wave Oscillator
270 Smooth Transition Switch
272 Repeating Piece-Wise Linear Source
276 Hybrid Code Models and Node Bridges
277 Digital-to-Analog Node Bridge
279 Analog-to-Digital Node Bridge
281 Digital-to-Real Node Bridge
282 Real-to-Analog Node Bridge
283 Analog-to-Real Node Bridge
285 Controlled Digital Oscillator
287 Controled Digital PWM
289 Real Code Models
289 Z-Transform Block (Real)
290 Gain Block (Real)
291 Digital Code Models
292 Buffer
vii
293 Inverter
294 And
295 Nand
296 Or
297 Nor
298 Xor
299 Xnor
300 Tristate
301 Pullup
302 Pulldown
303 Open Collector
304 Open Emitter
305 D Flip Flop
307 JK Flip Flop
309 Toggle Flip Flop
311 Set-Reset Flip Flop
313 D Latch
315 Set-Reset Latch
317 State Machine
321 Frequency Divider
323 RAM
326 Digital Source
328 MIDI Digitally Controlled Oscillator
Chapter 10 Analysis Syntax
329 Analysis Notation
330 .DC - DC Sweep Analysis
331 .OP - Operating Point
332 .TF - Transfer Function
332 .Nodeset - Initial Node Voltages
333 .AC - Small-Signal Frequency Analysis
334 .Noise - Small-Signal Noise Analysis
336 .Disto - Small-Signal Distortion Analysis
339 Sensitivity Analysis
341 .PZ - Pole-Zero Analysis
342 .Tran - Transient Analysis
343 .IC - Transient Initial Conditions
344 .Four - Fourier Analysis
345 .Print - Output Statement
349 .Plot - Output Statement
349 .View - Real Time Waveform Display
351 .Options - Program Defaults
359 Analyses At Different Temperatures
360 Title and End Statements
360 Continuation and Comment Lines
361 References
viii
Chapter 11 Interactive Command Language
363 ICL - What Is It?
365 The Interactive Command Language
366 ICL Function Summary Listing
372 ICL Command Summary Listing
379 Simulation Templates & Directives
379 IntuScope5 Commands
380 Using ICL Scripts
Appendix A
387 Solving SPICE Convergence Problems
387 What is Convergence? (or in my case, Non-Convergence)
389 General Discussion
391 IsSpice4 - New Convergence Algorithms
391 Non-Convergence Error Messages/Indications
392 Convergence Solutions
392 DC Convergence Solutions
396 DC Sweep Convergence Solutions
396 Transient Convergence Solutions
399 Modeling Tips
401 Repetitive And Switching Simulations
402 Other Convergence Helpers
403 Special Cases
403 SPICE 3 Convergence Helpers
Appendix B
405 Device and Model Parameters
Appendix C
406 IsSpice4 Error and Warning Messages
406 Errors
414 Warnings
Index
I -XXVII
ix
Personal Computer
Circuit Design
Tools
ISSPICE4 USER’S GUIDE
VOLUME 2
© copyright intusoft 1988-2001
P.O.Box 710
San Pedro, Ca. 90733-0710
Tel. (310) 833-0710
Fax (310) 833-9658
email -