Intermittent Arc Fault Detection And Location For Aircraft Power Distribution System

98 Pages·2013·0.64 MB·English

by  Anil Yaramasu

Ryerson University
Digital Commons @ Ryerson
Theses and dissertations
1-1-2012
Intermittent Arc Fault Detection And Location For
Aircraft Power Distribution System
Anil Yaramasu
Ryerson University
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INTERMITTENT ARC FAULT DETECTION AND LOCATION
FOR AIRCRAFT POWER DISTRIBUTION SYSTEM

by

ANIL YARAMASU
Bachelor of Technology, Electrical and Electronics Engineering, JNTUK, India, 2009

A thesis
presented to Ryerson University
in partial fulfillment of the requirements for the degree of
Master of Applied Science
in the Program of
Electrical and Computer Engineering

Toronto, Ontario, Canada, 2012
© Anil Yaramasu, 2012
AUTHOR’S DECLARATION
I hereby declare that I am the sole author of this thesis. This is a true copy of the thesis, including
any required final revisions, as accepted by my examiners.
I authorize Ryerson University to lend this thesis to other institutions or individuals for the
purpose of scholarly research.
I further authorize Ryerson University to reproduce this thesis by photocopying or by other
means, in total or in part, at the request of other institutions or individuals for the purpose of
scholarly research.
I understand that my thesis may be made electronically available to the public.

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ABSTRACT
Intermittent Arc Fault Detection and Location for Aircraft Power Distribution System
© Anil Yaramasu, 2012
Master of Applied Science
in the program of
Electrical and Computer Engineering
Ryerson University
This thesis addresses a non-destructive diagnostic method for intermittent arc fault detection
and location. Intermittent arc faults appear in aircraft power systems in unpredictable manners
when the degraded wires are wet, vibrating against metal structures, or under mechanical
stresses, etc. They could evolve into serious faults that may cause on-board fires, power
interruptions, system damage and catastrophic incidents, and thus have raised much concern in
recent years.
Recent trends in solid state power controllers (SSPCs) motivated the development of non-
destructive diagnostic methods for health monitoring of aircraft wiring. In this thesis, the ABCD
matrix (or transmission matrix) modeling method is introduced to derive normal and faulty load
circuit models with better accuracy and reduced complexity compared to the conventional
differential equation approach, and an intermittent arc fault detection method is proposed based
on temporary deviations of load circuit model coefficients and wiring parameters. Furthermore,
based on the faulty wiring model, a genetic algorithm (GA) is proposed to estimate the fault-
related wiring parameters, such as intermittent arc location and average intermittent arc
resistance. The proposed method can be applied to both the alternating current (AC) power
distribution system (PDS) and direct current (DC) PDS. Simulations and experiments using a DC
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power source have been conducted, and the results have demonstrated effectiveness of the
proposed method by estimating the fault location with an accuracy of +/- 0.5 meters on 24.6
meters wire. Unlike the existing techniques which generally requires special devices, the
proposed method only needs circuit voltage and current measurement at the source end as inputs,
and is thus suitable for SSPC-based aircraft PDS.

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ACKNOWLEDGMENTS
I would like to express my sincere gratitude to my main supervisor, Dr. Guangjun Liu, for
his valuable suggestions, help, patience, and guidance during this work. My sincere gratitude
also goes to my co-supervisor, Dr. Bin Wu, for his help, suggestions and wisdom. They provided
much of the input that helped me to produce presentable and superior research work.
My special thanks to Dr. Yinni Cao for her discussions, comments and suggestions during
this work. I am thankful to my colleagues and friends at the Laboratory for Electric Drive
Applications and Research (LEDAR), and those at the Systems and Control Laboratory for their
friendship and discussions. I wish to thank Ryerson University for an International Graduate
Scholarship.
I am very thankful to my brother, Mr. Venkata Yaramasu, for his valuable suggestions, help
and motivation. Countless thanks to my mother, uncle and other family members for their help,
support, encouragement and patience.

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TABLE OF CONTENTS
ABSTART………………………………………………….…………...………………………..iv
ACKNOWLEDGMENTS………………………………...…………..………………………….vi
TABLE OF CONTENTS……………………………………………………...…………..…….vii
LIST OF FIGURES…………………………………………………….………………….…......ix
LIST OF TABLES………………………………………………………..……………………....xi
LIST OF PUBLICATIONS……………………………………………………………………...xii
NOMENCLATURE………………………………………………………..…………………...xiii
CHAPTER 1 INTRODUCTION……………………………………………...…………………..1
1.1 Overview…………………………………………………………………………………..1
1.2 Causes of wiring faults………………………………………………………………….....3
1.3 Review of existing methods…………………………………………………………...…..6
1.4 SSPC-based aircraft DC PDS...……………………………….…………….…………...16
1.5 Thesis objectives and contributions……………………………………………………...19
1.6 Thesis outline…………………………………………………………………………….21
CHAPTER 2 AIRCRAFT LOAD CIRCUIT MODELING………………………………..……23
2.1 Overview…………………………………………………………………………………23
2.2 ABCD method…………………………………………………….……………………..24
2.3 Modeling of normal load circuit…………………………………………………………26
2.4 Modeling of faulty load circuit…………………………………………………………..31
2.5 Summary…………………………………………………………………………………38
CHAPTER 3 INTERMITTENT ARC FAULT DETECTION AND LOCATION……………..39
3.1 Overview…………………………………………………………………………………39
3.2 Model coefficients and wiring parameters estimation, and intermittent arc
fault detection……………………………………….……………………………………39
3.3 GA-based fault location estimation…………………………………...…………………45
3.3.1 Genetic algorithm…………………………………………………………………..49
3.4 Summary…………………………………………………………………………………52
CHAPTER 4 SIMULATION AND EXPERIMENTAL RESULTS……………...……………..53
4.1 Overview…………………………………………………………………………………53
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4.2 Simulation results………………………………………………………………………...53
4.3 Experimental setup…………………………………………….…………………………63
4.4 Experimental results……………………………………………………………………...65
4.5 Summary…………………………………………………………………………………76
CHAPTER 5 CONCLUSIONS……………………….…………...……………...……………..78
5.1 Conclusion……………………………………………………………………………….78
5.2 Future work………………………………………...…………………………………….80
REFERENCES…………………………………………………………………………………..81

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LIST OF FIGURES

Fig. 1.1 Causes of wiring faults…………………………………………………………………5
Fig. 1.2 Wire samples………………………………………………………………….………..7
Fig. 1.3 Functional block diagram of TDR……………………………………………………...9
Fig. 1.4 Principal diagram of current sensor based diagnostic method………………………..14
Fig. 1.5 An SSPC-based aircraft DC PDS…………………………………....…………..……18
Fig. 1.6 Typical I2t trip characteristics………………………………………………………...18
Fig. 2.1 A simple two-port network……………………………………………………………24
Fig. 2.2 An n-section cascaded two-port network……………………………………………..25
Fig. 2.3 SSPC-based normal load circuit……………………………………………....…..…..27
Fig. 2.4 Model of normal load circuit………………………………………………………….28
Fig. 2.5 Electric arc characterization……………………………….………………………….31
Fig. 2.6 Input voltage and current of load circuit during a typical intermittent arc
fault condition………………………………………………………………………....33
Fig. 2.7 SSPC-based faulty load circuit………………………………………………………..34
Fig. 2.8 Model of faulty load circuit…………………………………………………………...34
Fig. 3.1 Estimated inductance l (µH/meter) values versus number of frequency points (N)….43
Fig. 3.2 Estimated capacitance c (pF/meter) values versus number of frequency points (N)…44
Fig. 3.3 Structure of a steady-state GA………………………………………………………..51
Fig. 4.1 Model of simulation……………………………………………….………………….54
Fig. 4.2 Load circuit supply voltage and current waveform…………………..……………….55
Fig. 4.3 GA results for fault condition (actual d is 14 meters)………………………………..61
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Fig. 4.4 GA results for turn-on condition……………………………………………………...62
Fig. 4.5 Block diagram of experimental setup…………………………………………………63
Fig. 4.6 Picture of adjustable DC power supply……………………………………………….64
Fig. 4.7 Input voltage and current of load circuit under normal condition…………………….66
Fig. 4.8 Load circuit turn-on voltage waveform before (top) and after (bottom)
interpolation method…………………………………………………………………..66
Fig. 4.9 Input voltage and current of load circuit under turn-on condition……………………67
Fig. 4.10 Input voltage and current of load circuit under turn-off condition …………....………67
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