Integrated Nanodevice and Nanosystem Fabrication: Breakthroughs and Alternatives

327 Pages·2017·40.12 MB·English

by  Simon Deleonibus

INTEGRATED NANODEVICE AND
NANOSYSTEM FABRICATION
Pan Stanford Series on Intelligent Nanosystems
Series Editor
Simon Deleonibus
Titles in the Series
Published Forthcoming

Vol. 1 Vol. 3
Intelligent Integrated Systems: Emerging Devices for Low-Power
Devices, Technologies, and and High-Performance
Architectures Nanosystems: Devices Physics,
Simon Deleonibus, ed. New Functions, and Data
Processing
2014
978-981-4411-42-4 (Hardcover) Simon Deleonibus, ed.
978-981-4411-43-1 (eBook)
Vol. 2
Integrated Nanodevice and
Nanosystem Fabrication:
Materials, Techniques, and New
Opportunities
Simon Deleonibus, ed.
2017
978-981-4774-22-2 (Hardcover)
978-1-315-18125-7 (eBook)
Pan Stanford Series on Renewable Energy — Volume 2
Pan Stanford Series on Intelligent Nanosystems Volume 2
INTEGRATED NANODEVICE AND
NANOSYSTEM FABRICATION
Materials, Techniques, and New Opportunities
edited by
editors
Simon Deleonibus
Preben Maegaard
Anna Krenz
Wolfgang Palz
The Rise of Modern Wind Energy
Wind Power
for the World
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IntegratedNanodeviceandNanosystemFabrication:Materials,
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Contents
Acknowledgments xi
Introduction:WillNewMaterials,Fabrication,and
ArchitectureSchemesEmergeforCMOSSurvival? xiii
SimonDeleonibus
PART I
NANOFABRICATIONTECHNIQUESFOREMERGINGMATERIALSANDDEVICES
1 DeterministicSingle-IonImplantationMethodforQuantum
ProcessinginSiliconandDiamond 3
TakahiroShinada,EnricoPrati,andTakashiTanii
1.1 Introduction:DopingChallengesandRecentProgress
inSingle-AtomControl 4
1.2 DeterministicDopingMethod 6
1.2.1 Single-IonImplantationMethod 6
1.2.2 MolecularDoping 7
1.3 OrderedDopantArraysinSilicon 9
1.3.1 2DDopantArray 9
1.3.2 1DDopantArray 12
1.3.2.1 1Darrayofphosphorusdonors 12
1.3.2.2 1Darrayofarsenicdonors 15
1.4 Silicon-VacancyCenterinDiamond 16
1.5 Conclusion 19
2 GrapheneandTwo-DimensionalMaterials:Extending
SiliconTechnologyfortheFuture? 27
AndreasBablich,SatenderKataria,VikramPassi,
andMaxC.Lemme
2.1 Introduction 28
vi Contents
2.2 StructureandProperties 31
2.3 Synthesis 35
2.3.1 GrapheneCVD 35
2.3.2 TMD-CVD 40
2.4 Grapheneand2DMaterialsinElectronics 42
2.4.1 Graphene–MetalContacts 42
2.4.2 GrapheneTransistors 45
2.4.2.1 Digitalelectronics 46
2.4.2.2 Radiofrequency(RF)electronics 47
2.4.3 TMD-BasedElectronics 49
2.5 SensingPhotonsin2DMaterials:Physical
Mechanisms 50
2.5.1 PhotovoltaicEffect(PVE) 52
2.5.2 Photo-thermoelectricEffect(PTE) 52
2.5.3 Photo-gating 54
2.5.4 StandingPlasmaWaveEffect
(Dyakonov–Shur) 54
2.5.5 BolometricEffect 55
2.6 OptoelectronicApplicationsforGrapheneandRelated
2DMaterials 56
2.6.1 GraphenepnJunctions 57
2.6.2 2DTMD-BasedpnJunctions 59
2.7 SummaryandOutlook 61
3 NanofabricationUsingScanningProbeMicroscopes 75
VincentBouchiat
3.1 Introduction 76
3.2 GeneralPrinciplesofScanningProbeMicroscopes 76
3.3 GeneralPrinciplesofLocal-ProbeLithography
Techniques 79
3.4 ClassificationoftheSurfaceStructurationTechniques
UsingLocal-ProbeMicroscopes 81
3.4.1 ClassificationAccordingtothePhysicalNature
oftheInteraction 82
3.4.2 ComparisonwithCompetingNanolithography
Techniques 85
3.4.3 PerspectivesofIndustrialDevelopment 87
3.5 SPM-BasedLithographyTechniquesInvolvinga
PolymerResistMask 90
Contents vii
3.5.1 ElectronBeamExposureofPolymerResistsby
ScanningProbeMicroscopes 91
3.5.2 DevelopmentofChemicalResistsDedicatedto
SPMLithography 92
3.5.3 NanopatterningbyMechanicalIndentation
ofThinFilms 94
3.6 LithographyTechniquesbySPM-InducedLocal
ChemicalModification 96
3.6.1 DirectFabricationofDevicesbyDeposition
ofMatterundertheTipofanSTM 97
3.6.1.1 Atomicallyresolvedfabricationof
devicesbylocaldepassivationof
hydrogenatedsiliconunderanSTM 97
3.6.1.2 Localchemicalvapordeposition
underSTM 98
3.6.2 LocalOxidationundertheTipofanAtomic
ForceMicroscope 101
3.6.2.1 Applicationtothefabricationof
siliconnanowiresandnanoFETs 104
3.6.2.2 Applicationtoultrathinmetallic
filmoxidation 106
3.6.3 AdvantageofTipsTerminatedbyCarbon
NanotubesforSPMLithography 111
3.7 “Passive”LithographyTechniques 113
3.7.1 Dip-PenLithography 113
3.7.2 AlignedMaterialDepositionbyMeansofan
AFM-ControlledMechanicalMasking:The
“NanostencilTechnique” 113
3.8 ConclusionsandPerspectives 115
PART II
THESECONDLIFEANDNEWOPPORTUNITIESFORSILICONCMOS
4 High-κDielectricScalingforNano-CMOSTechnology 125
HeiWong,TakamasaKawanago,KuniyukiKakushima,
andHiroshiIwai
4.1 Introduction 126
4.2 SomeFundamentalTheoreticalIssuesof
High-κ/SiliconStack 129
viii Contents
4.2.1 TheSelectionofHighκandMetalGate 129
4.2.2 DielectricConstantandBandgap 131
4.2.3 CoordinationattheInterface 132
4.2.4 InterfaceDipolesandFermi-LevelPinning 133
4.3 Hf-BasedGateDielectrics 140
4.3.1 ThresholdVoltageControl 141
4.3.2 EffectiveMobility 147
4.3.3 Reliability 149
4.3.4 State-of-the-ArtHfO GateDielectrics 152
2
4.4 UltimateScalingwithRareEarthHighκ 154
4.4.1 InterfaceReactionsandGrowthKineticsof
RareEarthOxide/SiDirectContact 155
4.4.2 MetalGateElectrodesandTheirInterface
Properties 165
4.5 Summary 169
5 Nanometer-ScaleEpitaxialGrowthofGroupIV
Semiconductors 181
JunichiMurota
5.1 Introduction 182
5.2 UltracleanLow-TemperatureLow-PressureCVD
ProcessingforNanometer-ScaleEpitaxialGrowth 183
5.3 Langmuir-TypeFormulationofLow-Temperature
Low-PressureCVDEpitaxialGrowth 186
5.3.1 SiandGeEpitaxialGrowth 186
5.3.2 Si1−xGexEpitaxialGrowth 190
5.3.3 InsituDoping 191
5.4 Atomic-OrderReactionofHydrideGasonSi(100),
Si1−xGex(100),orGe(100)Surface 193
5.4.1 SurfaceReactionofSiH onGe(100) 195
4
5.4.2 SurfaceReactionofNH onSi(100),
3
Si1−xGex(100),orGe(100) 196
5.4.3 SurfaceReactionofPH onSi(100)or
3
Ge(100) 200
5.4.4 SurfaceReactionofB H onSi(100) 200
2 6
5.5 AtomicLayerDopinginSi,Si1−xGex,orGeEpitaxial
Growth 200
5.5.1 CarbonAtomicLayerDoping 201
Contents ix
5.5.2 NitrogenAtomicLayerDoping 201
5.5.3 PhosphorusAtomicLayerDoping 204
5.5.4 BoronAtomicLayerDoping 206
5.6 ConclusionandFutureTrends 208
6 TCAD-BasedDesignTechnologyCo-optimizationfor
VariabilityinNanoscaleSOIFinFETs 215
XingshengWang,ViharP.Georgiev,FikruAdamu-Lema,
LouisGerrer,SalvatoreM.Amoroso,andAsenAsenov
6.1 Introduction 216
6.2 Test-BedTransistorsandtheTCADDevice
Simulations 218
6.2.1 TransistorStructure 218
6.2.2 DeviceSimulations 219
6.2.2.1 Nominaltransistorsimulation 220
6.2.2.2 Globalvariabilitysimulation 223
6.2.2.3 Localvariabilitysimulation 225
6.3 HierarchicalVariability-AwareCompactModeling 229
6.3.1 CompactModelExtractions 229
6.3.2 CompactModelGeneration 232
6.4 CircuitSimulation 236
6.4.1 TheTest-BedSRAMCell 236
6.4.2 GlobalVariability 236
6.4.2.1 Deterministicimpact 236
6.4.2.2 MonteCarlosimulations 238
6.4.3 LocalVariability 242
6.4.3.1 Nominalcenter 243
6.4.3.2 Responsesurfaceoflocalstatistical
variability 244
6.4.4 InterplaybetweenGlobalandLocalVariability 245
6.5 Conclusions 248
7 NanowiresforCMOSandDiversifications 253
ThomasErnstandSylvainBarraud
7.1 Introduction 254
7.2 FabricationofSemiconductorNanowires 255
7.2.1 Top-DownApproach 255
7.2.1.1 BasicprocessfornanowiresCMOS 256