Table Of ContentIntegrated Converters
D to A and A to D ARCHITECTURES,
ANALYSIS AND SIMULATION
Paul G.A. Jespers
Uniuersite' Catholique de Louvain, Belgium
OXFORD
UNIVERSITY PRESS
This book has been printed digitally and poduced in a standard specifiation
in order to ensure its continuing availability
OXFORD
UNIVERSITY PRESS
Great Clarendon Street, Oxford OX2 6DP
Oxford University Press is a department of the University of Oxford.
It furthers the University’s objective of excellence in research, scholarship,
and education by publishing worldwide in
Oxford New York
Auckland Cape Town Dares Salaam Hong Kong Karachi
Kuala Lumpur Madrid Melbourne Mexico City Nairobi
New Delhi Shanghai Taipei Toronto
With ofices in
Argentina Austria Brazil Chile Czech Republic France Greece
Guatemala Hungary Italy Japan South Korea Poland Portugal
Singapore Switzerland Thailand Turkey Ukraine Vietnam
Oxford is a registered trade mark of Oxford University Press
in the UK and in certain other countries
Published in the United States
by Oxford University Press Inc., New York
Oxford is a registered trade mark of Oxford University Press
in the UK and in certain other countries
Published in the United States
by Oxford University Press Inc., New York
0 Paul G.A Jespers 2001
The moral rights of the author have been asserted
Database right Oxford University Press (maker)
Reprinted 2004
All rights reserved. No part of this publication may be reproduced,
stored in a retrieval system, or transmitted, in any form or by any means,
without the prior permission in writing of Oxford University Press,
or as expressly permitted by law, or under terms agreed with the appropriate
reprographics rights organization. Enquiries concerning reproduction
outside the scope of the above should be sent to the Rights Department,
Oxford University Press, at the address above
You must not circulate this book in any other binding or cover
And you must impose this same condition on any acquirer
ISBN 0-19-856446-5
To Denise
I
Preface
Digital technologies aim towards ever smaller, faster, less consuming
transistors to lead to increasingly complex integrated digital systems.
Consequently, many of the functions obtained through the use of analog
integrated circuits are now entrusted to digital circuits. This has reaped
substantial benefits regarding accuracy with no sensible penalty as far as area
and power consumption are concerned. The input data are often analog
however so that high performance imbedded D to A and A to D converters are
required unless already integrated within the sensors linking the system to the
outside world.
Converters are essential parts that enable communication between the
external analog world and the digital silicon chip. They should not compromise
precision even though the hardware in which they are implemented relies on
semi-conductor devices known for their poor accuracy. Therefore, converters
capitalize design expertise accumulated during the last 20 years to circumvent
the limitations and impairments inherent to integrated circuits.
The objective of this book is not only to review the principal converter
architectures, but also to bring to forward many of the innovative solutions
suggested throughout time to reach high performance. This is why some
circuits, nowadays obsolete, but essential stepping stones in the process of
development, are still reviewed. Their merit lies in their ability to illustrate the
basic principles upon which progress became possible. To this end, in addition
to detailed presentations of the various types of converters, this book also
exemplifies the evolution designers went through in order to cope with the
inherent integration limitations. Converters offer a remarkable opportunity in
this respect. They make the most of the hardware and software techniques
available to enhance the performances of integrated circuits.
The book is divided in eight chapters. Definitions and evaluation techniques
are dealt with in Chapter 1; parallel D to A converters in Chapters 2 and 3;
serial A to D converters in Chapters 4, 5 and 6; stochastic A to D and D to A
converters in Chapter 7; and flash, multi-step, pipelined and folding A to D
converters in Chapter 8.
Scaled D to A converters use binary or linearly weighted current references,
voltages or charges, taking advantage of quasi-randomly accessed unit-elements
to average out mismatches. Their accuracy is hardly better than 10-bits. Other
approaches are essential for higher resolution. The segment converters dealt
1
viii Preface
with in Chapter 3 offer a good trade-off, although their linearity calls for very
accurate segment references. High accuracy converters may also be
implemented by taking advantage of dynamic current matching techniques
such as those considered in the first part of Chapter 3. Other D to A converters
are reviewed in the remaining chapters, although the emphasis is put on A to D
converters. These are more complex than D to A converters. True parallelism
requires large area and consumes a lot of power. A number of distinct
approaches sacrificing speed for smaller silicon area and power consumption are
reviewed in Chapter 8. These combine series and parallel techniques. Series
architectures derive from the single-bit serial converters considered in Chapters
4 and 5. The converters currently designated as subranging, recycling, pipelined
and folding converters, fill the gap between fully parallel and serial devices,
capitalizing many of the techniques described in Chapters 2 to 5. Most offer
remarkable speed performance, reaching tens of MS/s sampling rates. Few of
these converters achieve an accuracy in excess of 13 to 14 bits. To yield higher
performances, different approaches are necessary. The dual-slope technique and
charge integration A to D converter considered in Chapter 6 offer improved
accuracy but are slow. The Delta-Sigma converters considered in Chapter 7
offer the best compromise. Accuracy of 16 and more bits is obtained, regardless
of the technology they are implemented in. Their high degree of accuracy is the
result of a compromise exchanging magnitude for time resolution. They belong
to a category of stochastic, rather than deterministic, converters.
Experimentation is essential to become fully acquainted with the converters
performance. Theory is unable, generally, to quantitatively trace the impact of
impairments due to the large amount of data that must be handled. Simulation
provides a clean physical insight. However, it may be very costly when
performed at the transistor level. Fortunately, thanks to simulation tools like
MATLAB, there are means to perform simulations that do not require such
excessive computation times. A set of MATLAB experiments is listed in the
appendix concluding the book. A toolbox adapted for converters is described
in the same appendix. The special functions it contains are exemplified in the
first part of the appendix under ‘Introduction’ and examples are given of the
potential of the tool. Understanding MATLAB statements is a prerequisite to
taking full advantage of this tool.
Acknowledgments
Part of the material presented in the book was gathered while teaching at the
Catholic University of Louvain, Louvain-la-Neuve, Belgium. The contribution
of doctoral students is gratefully acknowledged, especially Bernard Ginetti,
Benoit Macq and Albert0 Viviani. The author is indebted to Prof. L. Morren
[
Preface ix
for the sense of rigor and precision that he communicated to him. Some topics
were developed while contributing to international courses, like Eurochip
(Belgium), Europractice (LIRMM, Montpellier, France) and Iberchip in Latin
America, as well as at the Institut SupCrieur d’Electronique and the hole
Nationale Sup6rieure des T6ldcommunications in Paris, the Institut Supirieur
d’Electronique du Nord in Lille, the Universities of Genova and Cagliari in
Italy, the Institut Charles Fabry, Universiti de Provence, in Marseille, France
and the Edith Cowan University, in Perth, Australia. The contribution for
suggesting appropriate rephrasing from Melissa McCreery, who reviewed the
text, is gratefully acknowledged.
Tervuren P.J.
April 2000
Terminology, specifications and evaluation
1
techniques
1. I Resolution
The vast majority of converters feature a linear input-output characteristic that
may be summarized as:
The scalar V,l eft, portrays the analog continuous world, whereas the vector b,
right, forms the discrete digital world. The variable V may be voltage, a signal
from a sensor, or any other continuous variable. The finite core of the digital
data is illustrated by the confined series expansion between brackets. The bs
form a string of zeros and ones which defines the coded word representing the
discrete counterpart of V, the N-bit binary fractional expansion of V divided by
VFSw, here VFSs tands for the fuU scale (F.S.) range of V. The first and last
bits, ‘bl, and ‘b”, are called respectively the most signgcant and leust
signijicunt bits (MSB and LSB) according to their respective weights.
The number of bits N sets the number of discrete levels 2N of the converter,
the so-called converter resolution, which determines the smallest step size
VFs/2N that can be discriminated. Since VFSr arely exceeds a few volts, steps
become very narrow once the resolution exceeds 13 bits. In a 16-bit converter
with a 2 V F.S. range, the steps are only 30 FV high. Such fine granularity
leads to severe challenges in integrated converter design.
1.2 Ideal D to A and A to D converters
The upper plot of Fig. 1.1 shows the transfer characteristic of an ideal D to A
converter, where N equals three. The eight discrete input codes are plotted
horizontally, whereas the lengths of the corresponding vertical segments
portray the corresponding analog outputs. To enhance visibility, generally all
the end-points are connected by a broken line, delineating a series of plateaus
separated by steps amid the input codes. This line has no particular physical
significance.
I
2 Terminology, specifications and evaluation techniques
l I
D to A converter
U
a
U
1
0
-cn
0
m
Cm
0
g z ~ - o - o -
- 0 0 - -
0 0 0 0 c - - ~
input code
-
r
111
A to D converter
I
110
101
9)
U8 100
Y
1
,d 011
3
0
01 0
00 1
000
0 1
analog input
Fig. 1.1 Ideal transfer characteristics of a D to A (above) and an A to D (below)
converter.
I
Real D to A and A to D converters 3
The lower plot of Fig. 1.1 shows the transfer characteristic of the ideal equal
resolution A to D converter. The horizontal axis now represents the analog
input whereas the vertical scale illustrates the finite set of digital output codes.
The continuous character of the input data implies that all points along the
horizontal axis have coded word correspondents. These change every time the
input trespasses the so-called transition points, which portray the rounding of
the output data to within f. one half LSB. Consequently, in A to D converters
the lengths of the plateaus are significant, unlike in D to A converters.
1.3 Real D to A and A to D converters
Real converters diverge from their ideal counterparts by a number of
impairments that must be apprehended to characterize their performances. To
do this one must define appropriate evaluation criteria which hopefully lend
themselves to easy evaluation. The target is not obvious since the appraisal
may depend on the impact that the defects have on the overall performances of
the device or system to which the converter belongs. For instance, how should
one define linearity? In a measurement apparatus, it is a straightforward
concept that implies the strict proportionality between the analog input and the
digital coded output words. However this definition complies only partially for
audio applications, since the ear is more sensitive to local perturbations than
global distortion. Indeed, large differences between consecutive steps sound
like clicks which generally produce severe annoyances, more so than large
signal non-linear distortion. Thus, both global and local non-linearities should
be discriminated. Another example is found in digital telecommunication
systems. Here, the dynamic performances prevail over static for low harmonic
distortion and intermodulation products are essential for the trans-
mission quality. Consequently a unique definition encompassing all possible
applications equally well is pure fiction.
This chapter reviews the main concepts used regarding D to A and A to D
converter specifications and presents the experimental set-ups used for their
performance evaluation.
Figure 1.2 shows the static characteristics of non-ideal D to A and A to D
converters. The solid lines illustrate the non-ideal characteristics while the
dashed lines reproduce the ideal Characteristics shown in Fig. 1.1. In the upper D
to A converter, impairments modify the heights of the plateaus while the steps’
positions remain the same since, by definition, they are amid the input codes. In
the lower A to D converter, the errors affect the transition positions while the
heights of the plateaus remain unchanged, since these now represent the analog
counterparts of the output codes. Both impairments have slightly different
effects on the performance; consequently distinct measuring techniques are
needed to assess linearity despite the fact that the objectives are the same.
I
4 Terminology, specifications and evaluation techniques
D to A converter
.-..-.-*I
r
o - o - o - o -
o o - - o o ~ -
o o o o - - - -
input code
111
110
101
(u
'0s
100
c,
3
c20,.
011
010
00 1
000
0 analog input 1
Fig. 1.2 Real transfer characteristics of D to A (above) and A to D (below) converters.
