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Series ISSN: 1935-3235 F U J I Synthesis Lectures on K I • E Computer Architecture T A L Series Editor: Natalie Enright Jerger, University of Toronto In-/Near-Memory Computing Daichi Fujiki, University of Michigan, Ann Arbor Xiaowei Wang, University of Michigan, Ann Arbor Arun Subramaniyan, University of Michigan, Ann Arbor Reetuparna Das, University of Michigan, Ann Arbor I N - This book provides a structured introduction of the key concepts and techniques that / N enable in-/near-memory computing. For decades, processing-in-memory or near-memory E A computing has been attracting growing interest due to its potential to break the memory R - M wall. Near-memory computing moves compute logic near the memory, and thereby reduces E data movement. Recent work has also shown that certain memories can morph themselves M O into compute units by exploiting the physical properties of the memory cells, enabling in-situ R Y computing in the memory array. While in- and near-memory computing can circumvent C O overheads related to data movement, it comes at the cost of restricted flexibility of data M representation and computation, design challenges of compute capable memories, and P U difficulty in system and software integration. Therefore, wide deployment of in-/near-memory T I computing cannot be accomplished without techniques that enable efficient mapping N G of data-intensive applications to such devices, without sacrificing accuracy or increasing hardware costs excessively. This book describes various memory substrates amenable to in- and near-memory computing, architectural approaches for designing efficient and reliable computing devices, and opportunities for in-/near-memory acceleration of different classes of applications. About SYNTHESIS This volume is a printed version of a work that appears in the Synthesis Digital Library of Engineering and Computer Science. Synthesis M books provide concise, original presentations of important research and O R development topics, published quickly, in digital and print formats. G A N & Synthesis Lectures on C L Computer Architecture A Y store.morganclaypool.com P O O L Natalie Enright Jerger, Series Editor In-/Near-Memory Computing Synthesis Lectures on Computer Architecture Editor NatalieEnrightJerger,UniversityofToronto EditorEmerita MargaretMartonosi,PrincetonUniversity FoundingEditorEmeritus MarkD.Hill,UniversityofWisconsin,Madison SynthesisLecturesonComputerArchitecturepublishes50-to100-pagebooksontopicspertainingto thescienceandartofdesigning,analyzing,selecting,andinterconnectinghardwarecomponentsto createcomputersthatmeetfunctional,performance,andcostgoals.Thescopewilllargelyfollow thepurviewofpremiercomputerarchitectureconferences,suchasISCA,HPCA,MICRO,and ASPLOS. In-/Near-MemoryComputing DaichiFujiki,XiaoweiWang,ArunSubramaniyan,andReetuparnaDas 2021 RoboticComputingonFPGAs ShaoshanLiu,ZishenWan,BoYu,andYuWang 2021 AIforComputerArchitecture:Principles,Practice,andProspects LizhongChen,DrewPenney,andDanielJiménez 2020 DeepLearningSystems:Algorithms,Compilers,andProcessorsforLarge-Scale Production AndresRodriguez 2020 ParallelProcessing,1980to2020 RobertKuhnandDavidPadua 2020 iii DataOrchestrationinDeepLearningAccelerators TusharKrishna,HyoukjunKwon,AngshumanParashar,MichaelPellauer,andAnandaSamajdar 2020 EfficientProcessingofDeepNeuralNetworks VivienneSze,Yu-HsinChen,Tien-JuYang,andJoelS.Emer 2020 QuantumComputerSystem:ResearchforNoisyIntermediate-ScaleQuantum Computers YongshanDingandFredericT.Chong 2020 APrimeronMemoryConsistencyandCacheCoherence,SecondEdition VijayNagarajan,DanielJ.Sorin,MarkD.Hill,andDavidWood 2020 InnovationsintheMemorySystem RajeevBalasubramonian 2019 CacheReplacementPolicies AkankshaJainandCalvinLin 2019 TheDatacenterasaComputer:DesigningWarehouse-ScaleMachines,ThirdEdition LuizAndréBarroso,UrsHölzle,andParthasarathyRanganathan 2018 PrinciplesofSecureProcessorArchitectureDesign JakubSzefer 2018 General-PurposeGraphicsProcessorArchitectures TorM.Aamodt,WilsonWaiLunFung,andTimothyG.Rogers 2018 CompilingAlgorithmsforHeterogenousSystems StevenBell,JingPu,JamesHegarty,andMarkHorowitz 2018 ArchitecturalandOperatingSystemSupportforVirtualMemory AbhishekBhattacharjeeandDanielLustig 2017 iv DeepLearningforComputerArchitects BrandonReagen,RobertAdolf,PaulWhatmough,Gu-YeonWei,andDavidBrooks 2017 On-ChipNetworks,SecondEdition NatalieEnrightJerger,TusharKrishna,andLi-ShiuanPeh 2017 Space-TimeComputingwithTemporalNeuralNetworks JamesE.Smith 2017 HardwareandSoftwareSupportforVirtualization EdouardBugnion,JasonNieh,andDanTsafrir 2017 DatacenterDesignandManagement:AComputerArchitect’sPerspective BenjaminC.Lee 2016 APrimeronCompressionintheMemoryHierarchy SomayehSardashti,AngelosArelakis,PerStenström,andDavidA.Wood 2015 ResearchInfrastructuresforHardwareAccelerators YakunSophiaShaoandDavidBrooks 2015 AnalyzingAnalytics RajeshBordawekar,BobBlainey,andRuchirPuri 2015 CustomizableComputing Yu-TingChen,JasonCong,MichaelGill,GlennReinman,andBingjunXiao 2015 Die-stackingArchitecture YuanXieandJishenZhao 2015 Single-InstructionMultiple-DataExecution ChristopherJ.Hughes 2015 v Power-EfficientComputerArchitectures:RecentAdvances MagnusSjälander,MargaretMartonosi,andStefanosKaxiras 2014 FPGA-AcceleratedSimulationofComputerSystems HariAngepat,DerekChiou,EricS.Chung,andJamesC.Hoe 2014 APrimeronHardwarePrefetching BabakFalsafiandThomasF.Wenisch 2014 On-ChipPhotonicInterconnects:AComputerArchitect’sPerspective ChristopherJ.Nitta,MatthewK.Farrens,andVenkateshAkella 2013 OptimizationandMathematicalModelinginComputerArchitecture TonyNowatzki,MichaelFerris,KarthikeyanSankaralingam,CristianEstan,NilayVaish,and DavidWood 2013 SecurityBasicsforComputerArchitects RubyB.Lee 2013 TheDatacenterasaComputer:AnIntroductiontotheDesignofWarehouse-Scale Machines,SecondEdition LuizAndréBarroso,JimmyClidaras,andUrsHölzle 2013 Shared-MemorySynchronization MichaelL.Scott 2013 ResilientArchitectureDesignforVoltageVariation VijayJanapaReddiandMeetaSharmaGupta 2013 MultithreadingArchitecture MarioNemirovskyandDeanM.Tullsen 2013 PerformanceAnalysisandTuningforGeneralPurposeGraphicsProcessingUnits (GPGPU) HyesoonKim,RichardVuduc,SaraBaghsorkhi,JeeChoi,andWen-meiHwu 2012 vi AutomaticParallelization:AnOverviewofFundamentalCompilerTechniques SamuelP.Midkiff 2012 PhaseChangeMemory:FromDevicestoSystems MoinuddinK.Qureshi,SudhanvaGurumurthi,andBipinRajendran 2011 Multi-CoreCacheHierarchies RajeevBalasubramonian,NormanP.Jouppi,andNaveenMuralimanohar 2011 APrimeronMemoryConsistencyandCacheCoherence DanielJ.Sorin,MarkD.Hill,andDavidA.Wood 2011 DynamicBinaryModification:Tools,Techniques,andApplications KimHazelwood 2011 QuantumComputingforComputerArchitects,SecondEdition TzvetanS.Metodi,ArvinI.Faruque,andFredericT.Chong 2011 HighPerformanceDatacenterNetworks:Architectures,Algorithms,andOpportunities DennisAbtsandJohnKim 2011 ProcessorMicroarchitecture:AnImplementationPerspective AntonioGonzález,FernandoLatorre,andGrigoriosMagklis 2010 TransactionalMemory,SecondEdition TimHarris,JamesLarus,andRaviRajwar 2010 ComputerArchitecturePerformanceEvaluationMethods LievenEeckhout 2010 IntroductiontoReconfigurableSupercomputing MarcoLanzagorta,StephenBique,andRobertRosenberg 2009 On-ChipNetworks NatalieEnrightJergerandLi-ShiuanPeh 2009 vii TheMemorySystem:YouCan’tAvoidIt,YouCan’tIgnoreIt,YouCan’tFakeIt BruceJacob 2009 FaultTolerantComputerArchitecture DanielJ.Sorin 2009 TheDatacenterasaComputer:AnIntroductiontotheDesignofWarehouse-Scale Machines LuizAndréBarrosoandUrsHölzle 2009 ComputerArchitectureTechniquesforPower-Efficiency StefanosKaxirasandMargaretMartonosi 2008 ChipMultiprocessorArchitecture:TechniquestoImproveThroughputandLatency KunleOlukotun,LanceHammond,andJamesLaudon 2007 TransactionalMemory JamesR.LarusandRaviRajwar 2006 QuantumComputingforComputerArchitects TzvetanS.MetodiandFredericT.Chong 2006 Copyright©2021byMorgan&Claypool Allrightsreserved.Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmittedin anyformorbyanymeans—electronic,mechanical,photocopy,recording,oranyotherexceptforbriefquotations inprintedreviews,withoutthepriorpermissionofthepublisher. In-/Near-MemoryComputing DaichiFujiki,XiaoweiWang,ArunSubramaniyan,andReetuparnaDas www.morganclaypool.com ISBN:9781636391861 paperback ISBN:9781636391878 ebook ISBN:9781636391885 hardcover DOI10.2200/S01109ED1V01Y202106CAC057 APublicationintheMorgan&ClaypoolPublishersseries SYNTHESISLECTURESONCOMPUTERARCHITECTURE Lecture#57 SeriesEditor:NatalieEnrightJerger,UniversityofToronto EditorEmerita:MargaretMartonosi,PrincetonUniversity FoundingEditorEmeritus:MarkD.Hill,UniversityofWisconsin,Madison SeriesISSN Print1935-3235 Electronic1935-3243