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THEINSTITUTION OF ELECTRICAL ENGINEERS IEE PROCEEDINGS Circuits, Devices and Systems Vol. 144, 1997 Published by The IEE, Savoy Place, London WC2R OBL, United Kingdom Publishing Department: Michael Faraday House, Six Hills Way, Stevenage, Herts. SG1 2AY, United Kingdom IEE Proceedings Circuits, Devices and Systems The Institution of Electrical Engineers, Savoy Place, London WC2R OBL, United Kingdom Publishing Department. Michael Faraday House, Six Hills Way, Stevenage, Herts. SG1 2AY, United Kingdom Volume 144 1997 UK ISSN 1350-2409 HONORARY EDITORS Dr. P. Groeneveld (Magna Design Automation) Prof. P.H. Saul (Visiting Professor, Universities of Bradford and Essex) Pages in issues of /JEE Proc.-Circuits Devices Syst., 1997 Pages Issue No. Date 1-52 1 February 53-128 2 April 129-200 June 201-248 August 249-312 October 313-380 December This publication is copyright under the Berne Convention and the Universal Copyright Convention. All rights reserved. Apart from any copying under the UK Copyright, Designs and Patents Act 1988, Part 1, Section 38, whereby a single copy of this article may be supplied, under certain conditions, for the purposes of research or private study, by a library of a class prescribed by The Copyright (Librarians and Archivists) (Copying of Copyright Material) Regulations 1989: SI 1989/1212, no part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means without the prior permission of the copyright owners. Permission is, however, not required to copy abstracts of individual contributions on condition that a full reference to the source is shown. Authorisation to photocopy items for internal or personal use, or for the internal or personal use of specific clients, is granted by the Institution of Electrical Engineers for libraries and other users registered with the Copyright Clearance Center Transactional Reporting Service, provided that the base fee of $10.00 per copy is paid directly to the Copyright Clearance Center, Inc., 21 Congress Street, Salem, MA 01970, USA (1350-2409/97 $10.00). This consent does not extend to other kinds of copying, such as copying for general distribution, for advertising or promotional purposes, for creating new collective works, or for resale. Multiple copying of the content of this publication without permission is always illegal. The IEE is not as a body responsible for the opinions expressed by individual authors. The IEE is a member of the Association of Learned & Professional Society Publishers. © 1997: The Institution of Electrical Engineers Secretary of the IEE: J.C. Williams, OBE, PhD, FEng, FIEE Managing Editor: Gill Wheeler Printed by: Black Bear Press Limited, Cambridge, United Kingdom Index IEE Proceedings Circuits, Devices and Systems Vol. 144, 1997 Author Index Gonzalez, J.L. p361 Martinez, D. p272 Seng, S.Y. p60 Greenwood, M.B. p108 McLernon, D.C. p277 Seng, Y.K. p60 Gupta, S.S. p104 Mezher, K.A. p11 Shukla, S.R. p36 Milne, A. pl Silver, J. p123 A H Monkman, A.P. pl11 Siskos, S. p213 Montiel-Nelson, J.A. p289 Sobh, T. p335 Mori, Y. p190 Soliman, A.M. p195 AAAclhc-miIeabtrri,a, h iMmG..,T . Mp.2Mp21.32 3 p185 HHHaoayute,zs o-pGCo.iu-llLlo., s , Bp.2AR0..9A . p3p1231 3 Mosh NNy aga, V. p190 SSStooauodrwroiossen,l skDKy,Ji .m V. pp332p7428 4 3 Al-Khateeb, A.M. p185 Huang, C.-Y. p265 Stirling, C.J.M. p108 AAmli-nR,u waiHh. i, p31K.3M . p318 Huelsmann, A. p243 Stouraitis, T. p324 Hussein, A. p375 Napoli, E. p329 Strollo, A.G.M. p329 AArnidneerzs,s onD,. Mp.1 61 p29 Hwang, S.Y. p355 Naylor, K. pl Su, C.C. p167 Nooshabadi, S.V. p289 Suszynski, Z. p78 I Norholm, N. p40 B Noullet, J.-L. p272 d Barker, P.S. pl11 Iversen, C. p40 O Tamaru, K. p190 Bermak, A. p272 Bhat, A.K.S. p97 J Tarvainen, E. p29 Billingham, J. p123 Onodera, H. p190 Taylor, D. pl Blair, G.M. p219 Taylor, D.M. p117 BBBrroaawtcrokoven,n ,b uV.rP .y , pp2lL4l.3 E .M. p297 JJJeearncv,ki sso,C nW,B. . WD..L p.1 3p81p 4299 7 P TTTshhaaiine,ad iel,Ja. -kHiA..s , ppA32.04 93 p324 Bushehri, E. p243 JJiohu,, TS.. -J.p 36p71 67 PPaaldiaoluar,a s,S .K.V. pp235294 TTssaiumrb,i nJo.s-J,. J.p 36p73 43 Jun, Y.-H. p5 Papananos, Y. p68 [sividis, Y. p68 € Papazoglou, C.A. p178 Pastore, S. p17 V Chang, C.H. p249 K Perng, M.-F. p167 Chang, T.-S. p138 Persoon, G.G. p75 Kanbakas, C.A. p178 Petty, M.C. pill van de Goer, AJ. p155 CCChhheeennn,,, JCW...---SY.K. . p2pp222 6854 KKaanngg,, SY.. S. p81p,2 3p68 8, p236 PPhraanbsheu,, AK..MM.. M. p53p 259 Ww Cheng, S.-Y. p309 Kattelus, H. p29 Premoli, A. p17 Choi, IS. p355 Kelly, R. p297 Pride, R. plil Chu, Y. p335 Ker, J.-S. p129 Priemer, R. p145 Wang, C.-S. p303 CCuhrutilsw,o oK .MK.i m p3p1337 8 KKiomr,n egHa.y , p3K5.5T. p22 PPustytcehra, liBn.oMs., C.p 75 p247 WWeabnbg,, WP..W-.Y . p4p52 09 Kuivalainen, P. p29 Wu, C.-Z. p309 D KKuuoo,, TS..--YH.. pp330637 R Y Kuo, Y.-H. p129 DDiavaizs , AsFu.a , p1E.0 8 p161 L RRaauhta,r djRa., pS2. 29p 201 Yang, Y.K. p51 Dranger, T.S. p145 Raynor, B. p243 Yeh, C.S. p53 Dutton, N. p149 Richardson, T. p108 Yim, Y.T. p236 Laih, L.-W. p309 Rieger-Motzer, M. p243 Yuan, J.S. p53 Laopoulos, T. p213 Rodriguez Tellez, J. pi61 Yuan, S.-Y. p303 E Larsen, T. p40 Rofail, S.S. p60 LLeeee,n aeSr.t-sY,. Dp.3M6.7W . RRuobnikoa,i neAn., pH3.6 1 p29 Z EEllnwaagna,r , H.AO.. p3p7159 5 LLeevsearg,e , K.SV. . p1p4394 3 RRuuihzi,s aaGr.iA,. T. p3p5209 Zebda, Y. p375 F Limiti, E. p223 Zhu, Y.-S. p284 Littler, J.G.F. p123 S Liu, B.-D. p129, p265 Liu, W.-C. p309 Falkowski, B.J. p201i, p249 Lou, J.H. p51 Schlichter, T. p243 Lu, D.-J. p367 Senani, R. p1l04 G M Gadepally, B. p53 Gaydadjiev, G.N. p155 Mahmood, A. p335 Georgantas, T. p68 Maiden, Y. p149 Giannini, F. p223 Gomes, H.L. p117 IEE Proc. - Circuits Devices Syst., Vol 144, 1997 Subject Index CODES AND DECODING On-chip memory module designs for video-signal processing p138 AMPLIFIERS COMPUTATIONAL COMPLEXITY Circuit transformation method from OTA-C circuits into CFA-based RC circuits High performance hardware accelerator for design-error simulation p81 209 Class-AB SiC CMOS power opamp with stable voltage gain over wide temperature Parallel logic simulation with assignable delays on a vector multiprocessor computer p> range p22 Novel CMOS differential voltage current conveyor and its applications p195 Synthesis of single-resistance-controlled oscillators using CFOAs: simple state-varia- COMPUTER APPLICATIONS ble approach p104 Theory and performance of parabolic true logarithmic amplifier p223 Analysis and design of a fixed-frequency LCL-type series-resonant converter with Thermal design of gallium arsenide MESFETs for microwave power amplifiers p45 capacitive output filter p97 CMOS analogue neurone circuit with programmable activation functions utilising ANALOGUE ELECTRONICS MOS transistors with optimised process/device parameters p318 Current conveyor based test structures for mixed-signal circuits p213 Delay time sensitivity analysis of multi-generation BiCMOS digital circuits p60 .3 V mixed-mode IC design using switched-current techniques for speech applica- Design of heuristic algorithms based on Shannon expansion for low-power logic cir- tions p367 cuit synthesis p355 Assessing and comparing fault coverage when testing analogue! circuits pl Diagnosis of multifaults in analogue circuits using multilayer perceptrons p149 CMOS analogue neurone circuit with programmable activation functions utilising Finding all DC solutions of nonlinear resistive circuits by exploring both polyhedral MOS transistors with optimised process/device parameters p318 and rectangular circuits p17 Collective process circuit that sorts p145 High performance hardware accelerator for design-error simulation p81 Current conveyor based test structures for mixed-signal circuits p213 IC compatible planar inductors on silicon p29 Current-mode defuzzifier circuit to realise the centroid strategy p265 Improved PIN diode circuit model with automatic parameter extraction technique Testability aspects of folded source-coupled logic p361 p329 Versatile architecture for current-mode biquadratic filters in CMOS technology p229 Knowledge based automatic simulation model generation system p88 Parallel logic simulation with assignable delays on a vector multiprocessor computer ps AUTOMATIC TEST SYSTEMS Parallel sparse-matrix solution for direct circuit simulation on a transputer array p335 Performance-driven macro-block placer for architectural evaluation of ASIC designs Assessing and comparing fault coverage when testing analogue circuits pl p190 Simulator for path-delay faults on mixed-level circuits p236 Piecewise linear approximation applied to nonlinear function of a neural network p313 CALIBRATION Simulator for path-delay faults on mixed-level circuits p236 Synthesis of single-resistance-controlled oscillators using CFOAs: simple state-varia- ble approach p104 Improved error-table compensation of A/D converters p343 Systolic implementation of higher-order CMAC and its application in colour calibra- DATA HANDLING tion p129 Collective process circuit that sorts p145 CIRCUIT CAD DIELECTRIC MATERIALS AND DEVICES Analysis and design of a fixed-frequency LCL-type series-resonant converter with Desciagpnac iotfi vhee uroiusttpiuct afligltoerri thpm9s7 based on Shannon expansion for low-power logic cir- Calix(8)arene LB superlattices: pyroelectric molecular baskets p108 cuit synthesis p355 High performance hardware accelerator for design-error simulation p81 DIGITAL ARITHMETIC Sy nthesis of single-resistance-controlled oscillators using CFOAs: simple state-varia- ble approach p104 Finite wordlength effects in two-dimensional multirate periodically time-varying fil- ters p277 CIRCUIT THEORY AND DESIGN Generalised hybrid arithmetic canonical expansions for completely specified quater- nary functions p201 High-density 16/8/4-bit configurable multiplier p272 Analysis and design of a fixed-frequency LCL-type series-resonant converter with New static multi-output carry lookahead CMOS adders p350 capacitive output filter p97 Self-generating clock using an augmented distribution network p219 CMOS analogue neurone circuit with programmable activation functions utilising MOS transistors with optimised process/device parameters p318 DIGITAL ELECTRONICS Current conveyor based test structures for mixed-signal circuits p213 Delay time sensitivity analysis of multi-generation BiCMOS digital circuits p60 Design of heuristic algorithms based on Shannon expansion for low-power logic cir- CMOS switched current phase-locked loop p75 cuit synthesis p355 Delay time sensitivity analysis of multi-generation BiCMOS digital circuits p60 Diagnosis of multifaults in analogue circuits using multilayer perceptrons p149 Differential register bank design for self timed differential bipolar technology p297 Finding all DC solutions of nonlinear resistive circuits by exploring both polyhedral Digital sinusoidal oscillator with low and uniform frequency spacing p185 and rectangular circuits p17 Improved error-table compensation of A/D converters p343 High performance hardware accelerator for design-error simulation p81 March U: a test for unlinked memory faults p155 IC compatible planar inductors on silicon p29 On-chip memory module designs for video-signal processing p138 Improved PIN diode circuit model with automatic parameter extraction technique Performance-driven macro-block placer for architectural evaluation of ASIC designs p329 p190 Knowledge based automatic simulation model generation system p88 Piecewise linear approximation applied to nonlinear function of a neural network New results on the resistance of an n-cube p51 p313 Parallel logic simulation with assignable delays on a vector multiprocessor computer Self-generating clock using an augmented distribution network p219 Rs) Systolic arrays for the discrete Hilbert transform p259 Parallel sparse-matrix solution for direct circuit simulation on a transputer array Systolic implementation of higher-order CMAC and its application in colour calibra- 335 tion p129 Performance-driven macro-block placer for architectural evaluation of ASIC designs Wired-OR property and improved structure of recovered energy logic (REL) p378 p190 Synthesis of single-resistance-controlled oscillators using CFOAs: simple state-varia- DIGITAL FILTERS ble approach p104 Finite wordlength effects in two-dimensional multirate periodically time-varying fil- CMOS INTEGRATED CIRCUITS ters p277 High performance asynchronous FIR filter design in GaAs p289 3.3 V mixed-mode IC design using switched-current techniques for speech applica- tions p367 ELECTRO-OPTICAL DEVICES Class-AB SiC CMOS power opamp with stable voltage gain over wide temperature range p22 Development of wavelength selective shutters for device application for filters and CMOS analogue neurone circuit with programmable activation functions utilising smart windows p123 MOS transistors with optimised process/device parameters p318 CMOS switched current phase-locked loop p75 Current conveyor based test structures for mixed-signal circuits p213 ELECTROMAGNETISM Current-mode defuzzifier circuit to realise the centroid strategy p265 -sign considerations and implementation of very low frequency continuous-time Development of wavelength selective shutters for device application for filters and CMOS monolithic filters p68 smart windows p123 Design of heuristic algorithms based on Shannon expansion for low-power logic cir- High-idt ensysnitthye si1s6 /8/p43-5b5it configurable multiplier p272 ELECTRONIC CIRCUITS New static multi-output carry lookahead CMOS adders p350 Novel CMOS differential voltage current conveyor and its applications p195 Calix(8)arene LB superlattices: pyroelectric molecular baskets p108 Systolic implementation of higher-order CMAC and its application in colour calibra- Electrical characteristics of a polyaniline/silicon hybrid field-effect transistor gas sen- tion pi29 sor plll Testability aspects of folded source-coupled logic p361 Full-swing BiCMOS Schmitt trigger p393 Versatile architecture for current-mode biquadratic filters in CMOS technology p229 Quality investigation of joint of bipolar transistor chip and lead frame by thermal Wired-OR property and improved structure of recovered energy logic (REL) 5378 wave method p78 382 IEE Proc. - Circuits Devices Syst., Vol 144, 1997 FILTERS AND FILTERING MATHEMATICAL TECHNIQUES Assessment of active microwave inductors p161 Design methodology for the implementation of multidimensional circular convolu- Circuit transformation method from OTA-C circuits into CFA-based RC circuits tion p324 Curpr2e0n9t conveyor based test structures for mixed-signal circuits p213 Finadnidn g reacltl anDgCu lasro luctiirocnuist s of pn1o7n linear resistive circuits by exploring ‘ b« th polyhedral Design considerations and implementation of very low frequency continuous-time Generalised hybrid arithmetic canonical expansions for completely specified quater- CMOS monolithic filters p68 nary functions p201 Hierarchical techniques for symbolic analysis of electronic circuits p167 New results on the resistance of an n-cube p51 Low-pass impedance transformation networks p284 Parallel sparse-matrix solution for direct circuit simulation on a transputer array Noise analysis for high-order active filters p11 p335 Noninteracting electronically tunable CCII-based current-mode biquadratic filters Properties and methods of calculating generalised arithmetic and adding transforms p178 p249 Noninverting switched-current sample/hold circuit with compensation of the clock- feedthrough effect p247 Novel CMOS differential voltage current conveyor and its applications p195 MEASUREMENT OF SPECIFIC VARIABLES Versatile architecture for current-mode biquadratic filters in CMOS technology p229 Electrical characteristics of a polyaniline/silicon hybrid field-effect transistor gas sen- FORMAL LOGIC sor pl 1] MICROWAVE CIRCUITS Generalised hybrid arithmetic canonical expansions for completely specified quater- nary functions p201 IC compatible planar inductors on silicon p29 INFORMATION THEORY Space charge induced variation in silicon double drift IMPATT diode parameters 36 Thermal design of gallium arsenide MESFETs for microwave power amplifiers p45 Design methodology for the implementation of multidimensional circular convolu- tion p324 Finite wordlength effects in two-dimensional multirate periodically time-varying fil- MODULATORS AND DEMODULATORS ters p277 Properties and methods of calculating generalised arithmetic and adding transforms CMOS switched current phase-locked loop p75 p249 GaAs MESFET large-signal modelling for multiport Volterra series analysis p40 INSTRUMENTATION AND MEASUREMENT MULTIPROCESSOR SYSTEMS Electrical characteristics of a polyaniline/silicon hybrid field-effect transistor gas sen- Parallel logic simulation with assignable delays on a vector multiprocessor computer sor plil ps INSULATED GATE FIELD EFFECT TRANSISTORS NETWORK ANALYSIS Electrical characteristics of a polyaniline/silicon hybrid field-effect transistor gas sen- 3.3 V mixed-mode IC design using switched-current techniques for speech applica- sor plll tions p367 Noninverting switched-current sample/hold circuit with compensation of the clock- INTEGRATED CIRCUITS feedthrough effect p247 Assessing and comparing fault coverdge when testing analogue circuits p1 NEURAL NETS Delay time sensitivity analysis of multi-generation BiCMOS digital circuits p60 Design and evaluation of a novel enhancement mode FET logic gate configuration in CMOS analogue neurone circuit with programmable activation functions utilising AlGaAs/GaAs/AlGaAs quantum well HEMT technology p243 MOS transistors with optimised process/device parameters p318 Diagnosis of multifaults in analogue circuits using multilayer perceptrons p149 Collective process circuit that sorts p145 Differential register bank design for self timed differential bipolar technology p297 Diagnosis of multifaults in analogue circuits using multilayer perceptrons p149 Full-swing BiCMOS Schmitt trigger p303 Piecewise linear approximation applied to nonlinear function of a neural network High performance asynchronous FIR filter design in GaAs p289 313 IC compatible planar inductors on silicon p29 Systolic implementation of higher-order CMAC and its application in colour calibra- March U: a test for unlinked memory faults p155 tion pl29 Modelling the BiCMOS switching delay including radiation effects p53 Parallel logic simulation with assignable delays on a vector multiprocessor computer 5 NONLINEAR NETWORK ANALYSIS Parallel sparse-matrix solution for direct circuit simulation on a transputer array p335 Finding all DC solutions of nonlinear resistive circuits by exploring both polyhedral Performance-driven macro-block placer for architectural evaluation of ASIC designs and rectangular circuits p17 p190 GaAs MESFET large-signal modelling for multiport Volterra series analysis p40 Self-generating clock using an augmented distribution network p219 Piecewise linear approximation applied to nonlinear function of a neural network Theory and performance of parabolic true logarithmic amplifier p223 p313 LINEAR NETWORK ANALYSIS NUMERICAL ANALYSIS Hierarchical techniques for symbolic analysis of electronic circuits p167 Parallel logic simulation with assignable delays on a vector multiprocessor computer Low-pass impedance transformation networks p284 5 Systolic arrays for the discrete Hilbert transform p259 LOGIC AND SWITCHING CIRCUITS OPTICAL IMAGE PROCESSING Design and evaluation of a novel enhancement mode FET logic gate configuration in AlGaAs/GaAs/AlGaAs quantum well HEMT technology p243 On-chip memory module designs for video-signal processing p138 Design of heuristic algorithms based on Shannon expansion for low-power logic cir- Systolic implementation of higher-order CMAC and its application in colour calibra- cuit synthesis p355 tion p129 Differential register bank design for self timed differential bipolar technology p297 Generalised hybrid arithmetic canonical expansions for completely specified quater- nary functions p201 PARALLEL PROCESSING High-density 16/8/4-bit configurable multiplier p272 High performance asynchronous FIR filter design in GaAs p289 Design methodology for the implementation of multidimensional circular convolu- Knowledge based automatic simulation model generation system p88 tion p324 New static multi-output carry lookahead CMOS adders p350 Systolic arrays for the discrete Hilbert transform p259 Parallel logic simulation with assignable delays on a vector multiprocessor computer 5 Simulator for path-delay faults on mixed-level circuits p236 PARAMETER ESTIMATION Testability aspects of folded source-coupled logic p361 Wired-OR property and improved structure of recovered energy logic (REL) p378 Impr3o9v9e d PIN diode circuit model with automatic parameter extraction technique poe LOGIC DESIGN POWER ELECTRONICS Design of heuristic algorithms based on Shannon expansion for low-power logic cir- cuit synthesis p355 Analysis and design of a fixed-frequency LCL-type series-resonant converter with Generalised hybrid arithmetic canonical expansions for completely specified quater- capacitive output filter p97 nary functions p201 Improved PIN diode circuit model with automatic parameter extraction technique High performance asynchronous FIR filter design in GaAs p289 p329 Knowledge based automatic simulation model generation system p88 Paral5l el logic simulation with assignable delays on a vector multiprocessor computer PRODUCTION ENGINEERING a ee macro-block placer for architectural evaluation of ASIC designs p190 Assessing and comparing fault coverage when testing analogue circuits pl Simulator for path-delay faults on mixed-level circuits p236 March U: a test for unlinked memory faults p155 Testability aspects of folded source-coupled logic p361 Testability aspects of folded source-coupled logic p361 Wired-OR property and improved structure of recovered energy logic (REL) p378 Thermal design of gallium arsenide MESFETs for microwave power amplifiers p45 IEE Proc. - Circuits Devices Syst., Vol 144, 1997 383 PROGRAMMING THEORY Finite wordlength effects in two-dimensional multirate periodically time-varying fil- ters p277 High performance hardware accelerator for design-error simulation p81 Properties and methods of calculating generalised arithmetic and adding transforms Parallel logic simulation with assignable delays on a vector multiprocessor computer Systolic arrays for the discrete Hilbert transform p259 p> SEMICONDUCTOR DEVICE MODELLING SPEECH COMMUNICATION AND PROCESSING 3.3 V mixed-mode IC design using switched-current techniques for speech applica- GInavAess tigMaEtiSoFn ETof sltaergpe--dsoipgenda l chmaondneelll inhge tefroors tmruulcttiuproer t fiVeolldt-eefrfreac t setrriaenss isatnoarl ysips3 09p 40 tions p367 SEMICONDUCTOR DEVICES AND MATERIALS SWITCHING THEORY Design and evaluation of a novel enhancement mode FET logic gate configuration in Parallel logic simulation with assignable delays on a vector multiprocessor computer AlGaAs/GaAs/AlGaAs quantum well HEMT technology p243 ps GaAs MESFET large-signal modelling for multiport Volterra series analysis p40 Improved PIN diode circuit model with automatic parameter extraction technique SYSTEMS THEORY p329 Investigation of step-doped channel heterostructure field-effect transistor p309 CMOS analogue neurone circuit with programmable activation functions utilising Min(iHmBiTs)a tiopn3 75o f base transit time in AlGaAs/GaAs heterostructure bipolar transistor PieMcOewSi set ralnisniesatro rsa ppwirtohx imoapttiimoins eda ppplrioecde ssto/ denvoinclei neapra rafmuentcetriso n po3f1 8a neural network Quality investigation of joint of bipolar transistor chip and lead frame by thermal p313 wave method p78 Schottky barrier diodes from semiconducting polymers p117 Space charge induced variation in silicon double drift IMPATT diode parameters TRANSFORMERS p36 Assessment of active microwave inductors p161 SIGNAL GENERATORS IC compatible planar inductors on silicon p29 Digital sinusoidal oscillator with low and uniform frequency spacing p185 WAVEGUIDE COMPONENTS Self-generating clock using an augmented distribution network p219 Synthesis of single-resistance-controlled oscillators using CFOAs: simple state-varia- Assessment of active microwave inductors p161 ble approach p104 SIGNAL PROCESSING Design methodology for the implementation of multidimensional circular convolu- tion p324 IEE Proc. - Circuits Devices Syst., Vol 144, 1997

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Most books are stored in the elastic cloud where traffic is expensive. For this reason, we have a limit on daily download.