High Voltage Devices and Circuits in Standard CMOS Technologies

293 Pages·1999·25.328 MB·English

by  Hussein Ballan, Michel Declercq

HIGH VOLTAGE DEVICES AND CIRCUITS
IN STANDARD CMOS TECHNOLOGIES
HIGH VOLTAGE DEVICES AND
CIRCUITS IN STANDARD CMOS
TECHNOLOGIES
by
Hussein Ballan
Swiss Federal Institute ofTechnology, Lausanne
and
Michel Declercq
Swiss Federal Institute ofTechnology, Lausanne
SPRINGER-SCIENCE+BUSINESS MEDIA, B.V.
A C.LP. Catalogue record for this book is available from the Library of Congress.
ISBN 978-1-4419-5052-9 ISBN 978-1-4757-5404-9 (eBook)
DOI 10.1007/978-1-4757-5404-9
Printed on acid-free paper
All Rights Reserved
© 1999 Springer Science+Business Media Dordrecht
Originally published by Kluwer Academic Publishers in 1999
No part of the material protected by this copyright notice may be reproduced or
utilized in any form or by any means, electronic or mechanical,
inc1uding photocopying, recording or by any information storage and
retrieval system, without written permission from the copyright owner
CONTENTS
CONTENTS v
FOREWORD ix
1 INTRODUCTION 1
2 SUPPLY VOLTAGE LIMITS IN STANDARD CMOS TECHNOLOGIES 5
2.1 Channel hot carrier effects 6
2.1.1 Substrate current model ............................................................................. 8
2.1.2 Gate current model .................................................................................. 12
2.1.3 MOSFET degradation .............................................................................. 16
2.1.4 Static device lifetime model... .................................................................. 20
2.1.5 Dynamic device lifetime model ............................................................... 21
2.2 Breakdown vOltage 23
2.2.1 A valanche breakdown .............................................................................. 23
2.2.2 Surface breakdown .................................................................................. 35
2.2.3 Snapback breakdown ............................................................................... 39
2.2.4 Gate-oxide breakdown ............................................................................. 42
2.3 Drain Induced Barrier-Lowering (DIBL) 43
2.4 References 48
vi Contents
3 MOSFET HIGH-VOLTAGE TECHNOLOGIES 51
3.1 Isolated high-voltage MOSFETs 53
3.1.1 Vertical buried layer DMOSFET.. ........................................................... 54
3.1.2 Lateral DMOSFETs ................................................................................. 56
3.2 PICs and HVICs in HV device technologies 68
3.2.1 P-N junction isolation .............................................................................. 68
3.2.2 Dielectric isolation ................................................................................... 69
3.3 PICs and HVICs in LV CMOS technologies 71
3.4 References 75
4 DESIGN OF HIGH-VOLTAGE DEVICES USING THE SVX TECHNIQUE77
4.1 Main steps of a standard n-WELL CMOS process 78
4.1.1 The n-WELL implant and drive-in (Mask M26) ..................................... 78
4.1.2 Active areas definition (Mask MIO) ........................................................ 78
4.1.3 Isolation between transistors (Mask MI 1) ............................................... 79
4.1.4 Field oxide growth (LOCOS) .................................................................. 79
4.1.5 Poly silicon gate deposition and gate oxide growth (Mask M40) ............. 79
4.1.6 Source and drain implant (Masks M25 and M24) ................................... 79
4.1.7 CVD Si02 and metall deposition (Masks M50 and M60) ...................... 80
4.1.8 Metal2 deposition and passivation (Masks M51 and M61) ..................... 80
4.2 Design of the SVX devices 85
4.2.1 High-Voltage nMOS transistor (HVNMOS) ........................................... 85
4.2.2 High-voltage pMOS transistor (HVPMOS) ............................................. 91
4.3 Scaling of the high-voltage devices 97
4.3.1 High-voltage nMOS transistor (HVNMOS) ............................................ 97
4.3.2 High-voltage pMOS transistor (HVPMOS) ........................................... 104
4.4 Computer simulations of the high-voltage devices with a specific scaling
of Le• Lg and Ldd 10 6
4.4.1 High-voltage nMOS transistor ............................................................... 107
4.4.2 High-voltage pMOS transistor. .............................................................. 110
4.5 References 116
5 MEASUREMENT AND MODELLING OF THE HIGH-VOLTAGE
DEVICES 117
5.1 Measurement results of the high-voltage devices 118
5.1.1 Static characteristics of the HVNMOS transistor .................................. 118
5.1.2 Dynamic characteristics of the HVNMOS transistor ............................. 126
Contents vii
5.1.3 Static characteristics ofthe HVPMOS transistor .................................. 132
5.1.4 Dynamic characteristics of the HVPMOS transistor ............................. 138
5.2 Device modelling for circuit simulators 143
5.2.1 Theoretical considerations ofthe macro-models ................................... 145
5.2.2 Simulations versus measurements .......................................................... 157
5.3 Layout precautions against parasitic effects 166
5.3.1 Layout rules and precautions at a device leveL .................................... 167
5.3.2 Layout rules and precautions at a circuit leveL ..................................... 172
5.4 References 178
6 HIGH-VOLTAGE ANALOG AND DIGITAL OUTPUT INTERFACES 179
6.1 High-voltage digital output interfaces 180
6.1.1 Basic static level shifter cell .................................................................. 182
6.1.2 Improved static level shifter celL ......................................................... 185
6.1.3 low standby current static level shifter cell ............................................ 188
6. I .4 Transients considerations ....................................................................... 192
6.2 High-voltage analog output interfaces 207
6.2.1 Basic operation al transconductance amplifier (OTA) ............................ 207
6.2.2 Class-AB output stage operational amplifier ......................................... 210
6.2.3 Transients considerations ....................................................................... 219
6.3 References 226
7 12V DELTA-SIGMA CLASS-D AUDIO AMPLIFIER 227
7.1 General system considerations 228
7.2 Modulation stage 231
7.2.1 Theoretical considerations ..................................................................... 231
7.2.2 Switched capacitor implementation ....................................................... 236
7.3 Output stage 242
7.3.1 High-voltage power devices .................................................................. 242
7.3.2 Output drivers ........................................................................................ 246
7.3.3 Protection features ................................................................................. 248
7.4 Measured performances 255
7.4.1 Signal-to-noise ratio ............................................................................... 255
7.4.2 Total harmonie distortion ...................................................................... 258
7.4.3 Intermodulation distortion ..................................................................... 259
7.4.4 Amplifier efficiency ............................................................................... 260
viii Contents
7.5 System improvements 261
7.6 References 265
8 CONCLUSIONS 267
APPENDIXA 271
APPENDIX B 277
INDEX 283
FOREWORD
Standard voltages used in today's IC's may vary from about 1.3V to more than
100V, depending on the technology and the application. High-voltage is therefore a
relative notion.
This book is mainly focused on standard CMOS technologies, where high-voItage
(HV) is defined as any voltage higher than the nominal (low) voltage, i.e. SV, 3.3V,
or even lower. In this standard CMOS environment, IC designers are more and more
frequently confronted with HV problems, particularly at the 110 level of the circuit.
In a first group of applications, a large range of industrial or consumer circuits either
require HV driving capabilities, or are supposed to work in a high-voItage
environment. This includes ultrasonic drivers, flat panel displays, robotics,
automotive, etc. On the other hand, in the emerging field of integrated microsystems,
MEMS actuators mainly make use of electrostatic forces involving voltages in the
typical range of 30 to 60V. Last but not least, with the advent of deep sub-micron
and/or low-power technologies, the operating voItage tends towards levels ranging
from IV to 2.5V, while the interface needs to be compatible with higher voltages,
such as SV.
For alI these categories of applications, it is usually preferable to perform most of the
signal processing at low voltage, while the resulting output is risen to a higher
voltage level. Solving this problem requires some special actions at three levels ;
technology, circuit design and layout. The purpose of this book is to address these
topics. Theoretical background is supported by practical information and design
examples.
1
INTRODUCTION
The increasing integration density of VLSI (Very-Large-Scale-Integrated) circuits
and the low-power requirements of complex signal processing applications, force the
continuous reduction of the power supply voltages in modern ICs (lntegrated
Circuits). While the Iow-voltage CMOS (Complementary Meta I Oxide
Semiconductor) technologies implementing these ICs are optimized for speed,
minimum power consumption and maximum integration density, they cannot meet
the requirements of system applications where high-voltage capabilities are needed.
When electronic signal processing involves high-voltage and/or high-current,
different solutions are selected according to the power level of the application.
High-power systems with a rating above 50 or 100 watts, such as AC motor controls
and factory automation, usually make use of power modules containing discrete
devices, HVICs (high-voltage integrated circuits) and standard signal processing
ICs. Medium-power systems, involving power driving capability up to about 30
watts, can be fully integrated on the basis of a specially dedicated technology. Audio
power amplifiers or some automotive applications enter in this category.
Finally there is a bunch of low-power systems that involve some high-voltage signal
processing. Typical applications are, for instance, drivers for ultrasonic transducers,
display drivers, telecommunication circuits, EEPROM circuits, integrated micro
systems (MEMS), some automotive electronics, small DC motor control, ink-jet
printers, switching regulators, medical instrumentation and many others. Moreover,
5V I/O interfaces can be considered as "high-voltage" parts for deep sub-micron
technologies. This range of applications is specifically addressed by this book.
2 Introduction
For most of these applications, it is usually preferable to perform most of the signal
processing at low voltage, while the resulting output is risen to a higher voltage
level. Solving this problem requires some special actions both at the technology level
and at the circuit design level. These two topics will be adressed in the following
chapters.
At the technology level, two different approaches can be selected. The most
straightforward, but usually not the cheapest one, is to use a CMOS technology
offering a HV option (with HV DMOS devices) at the cost of one or two
supplementary masks and ion implantation steps. While such an approach optimizes
area efficiency, it may result in a significant cost increase.
A more original approach, named SVX (Smart Voltage Extension), consists in
creating high-voltage devices in a standard, unmodified low-voltage CMOS
technology without any process change or addition. In this option, which is
thoroughly addressed in the book, existing technological layers are combined in an
unconventional way, locally using special layout rules for creating "free" high
voltage devices usually capable to sustain about 10 times the nominal voltage of the
technology.
The motivations for extending a low-voltage CMOS technology with high-voltage
features are related to the significant advantages offered by this approach in
comparison to dedicated technologies. From an economical point of view, the access
to the technology is easy and the production cost of the resulting HVICs are as low
as a standard low-voltage CMOS circuit. Moreover, since no modification of the
process parameters is required to combine both features on the same substrate,
existing standard libraries can be used for the low-voltage part of the circuit. CAD
(Computer Aided Design) tools remain unchanged since special layout rules and
models are added for the high-voltage part of the circuit. From a technical point of
view, high-voltage devices with thin gate oxides exhibit standard threshold voltage
values as weil as high current gains. Thus, considering the same current ratings, the
surface density that can be achieved with such devices is maximized.
At the circuit and layout levels, using high-voltage devices and handling high
voltages on a chip require some very special care. As a matter of fact, a high-voltage
transistor is designed to sustain high-voltage between its source and drain terminals,
while the gate-to-source voltage drop is limited to much lower values. This requires
special circuit design techniques for respecting these limits both in steady state and
in transient conditions. On the other hand, special design techniques, such as guard
rings and shields, must be applied as necessary for avoiding latch-up or parasitic
channel problems.
The structure of this book is organized as folIows: