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Handbook of Compound Semiconductors. Growth, Processing, Characterization, and Devices PDF

918 Pages·1996·17.565 MB·English
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Preview Handbook of Compound Semiconductors. Growth, Processing, Characterization, and Devices

Preface This book is a state-of-the-art reference on the growth and process- ing of compound semiconductors. The leading experts in the important growth techniques, processing steps, characterization methods, packaging, and devices have contributed their knowledge. While the scope of the book is compound semiconductors, there are so many different semiconductors being studied and used that complete coverage of all materials is impossible in boonoek . Therefore the emphasis in this book si on gallium-arsenide- and indium-phosphide-based materials. Several other III-V and some II-VI compound semiconductors are discussed where they provide particular insight or illustrate specific properties and/or processes. Chapters in the book provide a complete overview of the technolo- gies necessary to grow bulk single-crystal substrates, and grow hetero- and homoepitaxial films using moleculabre am epitaxy (MBE) omre tal-organic chemical vapor deposition (MOCVD). Technologies necessary to process compound semiconductors into test structures and devices are covered, including electrical contacts, dielectric isolation, interface passivation, ion implantation, wet darnyd etching, and rapid thermal processing. Techniques to characterize the materials and devices using electrons, ions, and photons, are described. While the emphasis of the book si on materials growth and processing, the technologies are placed in perspective by a review of the important electronic and optoelectronic devices, and epitaxial lift-off, and other device packaging issues. vii viii Preface With this complete coverage of the critical topics, we believe the book will be a valuable reference for persons currently performing research on compound semiconductors. It will also be an excellent reference for advanced graduate courses in materials science, electrical engineering, and applied physics. In our judgement, the authors of the chapters have provided exceptionally comprehensive, authoritative work, and for this we are ex- tremely grateful. September, 1995 GainesviUe, Florida Paul .H Holloway Research Triangle Park, Gary E. McGuire North Carolina Contributors Shin-ichi Akai Sidney I. Ingrey Sumitomo Electric Industries Ltd. Bell Northern Research Itami, Hyogo, Japan Ottawa, Ontario, Canada Kambiz Aiavi Nan Marie Jokerst Department of lacirtcelE gnireenignE Microelectronics Research Center University of Texas at Arlington Georgia Institute of Technology Arlington, TX Atlanta, GA Scott A. Chambers Kevin S. Jones Molecular Science Research Center Department of Materials Science & Pacific Northwest Laboratory gnireenignE Richland, WA University of Florida Gainesville, FL Eric Y. Chan Boeing Company Avishay Katz Seattle, WA Standard Motor Products, Inc. Long Island City, NY Stephen W. Downey AT&T Bell Laboratories Richard Y. Koyama Murray Hill, NJ TriQuint Semiconductor Beaverton, OR Paul H. Holloway Department of Materials Science & Derek L. Lile Engineering tnemtrapeD of Electrical gnireenignE University of Florida Colorado State University Gainesville, FL Fort CollinCsO, /x x Contributors Vinod Malhotra Brian J. Skromme tnemtrapeD of lacirtcelE gnireenignE tnemtrapeD of lacirtcelE gnireenignE University of Hawaii Arizona State University Honolulu, HI Tempe, AZ Gary E. McGuire Eberhard Veuhoff Microelectronics Center of North snemeiS AG Carolina Munich, Germany Research Triangle Park, NC Carl W. Wilmsen Stephen J. Pearton tnemtrapeD of lacirtcelE gnireenignE AT&T Bell Laboratories Colorado State University Murray HiNlJl , Fort Collins, OC Rajendra Singh Masamichi Yokogawa tnemtrapeD of lacirtcelE gnireenignE Electric Sumitomo Industries Ltd. Clemson University Itami, Hyogo, Japan Clemson, SC NOTICE To the best of our knowledge the information in this publication is accurate; however the Publisher does not assume any responsibility or liability for the accuracy or completeness of, or consequences arising from, such information. This book is intended for informational purposes only. Mention of trade names or commercial products does not constitute endorsement or recommendation for use by the Publisher. Final determination of the suitability of any information or product for use contemplated by any user, and the manner of that use, is the sole responsibility of the user. We recommend that anyone intending to rely on any recommendation of materials or procedures mentioned in this publication should satisfy himself as to such suitability, and that he can meet all applicable safety and health standards. 1 Bulk Crystal Growth Shin-ichi Akai and Masamichi Yokogawa INTRODUCTION III-V compound semiconductors are widely used as substrates for optical devices such as LED's and laser diodes and for electronic devices such as FET's, HEMT's, HBT's and IC's. These applications are becom- ing key elements ni an advanced information society. In this chapter, our focus is on GaAs and InP and recent advancements in their crystal growth technology. Horizontal Bridgman (liB) and Liquid Encapsulated Czochralski (LEC) are two representative growth methods of III-V compound crystals. The HB method is favorable for reducing the dislocation density and is, therefore, used ni providing substrates for optical devices. The LEC method is advantageous for increasing the crystal diameter and is, therefore, used in providing substrates for electronic devices. Incorporating the advantages of both growth methods, practical applications of early hot wall crystal growth techniques[ll such as Vertical Gradient Freeze ,12[)FGV( Vertical Bridgman 13[)BV( and Liquid Encapsulated Vertical Bridgman (LEVB)Ial have re- centlbye en tried. The basic objectives ni the development of crystal growth technology are larger crystals (diameter and length), reduction of crystal defects (such as dislocation) and higher purity. In addition, stoichiometry control is important ni the case of compound crystals. Compound srotcudnocimeS 1.0 REDUCTION OF DISLOCATION DENSITY Dislocations affect device performance. Therefore, the reduction of dislocation density is a very important issue in crystal growth technology. Various techniques to achieve low dislocation density are summarized in Fig. .1 Among them are the reduction of thermal stress (or reduction of temperature gradient) and the increase of critical resolved shear stress. It has bccn ixWroper by Matsumoto et al. ]5[ that a roof-shaped thermal baffle installed on the top of a heat shield alleviated very strong gaseous convec- tion in a chamber, thus reducing the temperature gradient in the B203 layer to 30 - 60~ This gradient is about one third of the temperature gradient in the conventional LEC method. The radiation effect becomes more significant in LEC-grown crystals having a high melting point. In a conventional single-zone heater puller, the heat outflow from the surface of growing crystals is large because of the heat radiation toward the cold chamber wall. Consequently, the temperature gradient at the solid-liquid interface bex~mes large. On the other hand, in a puller with a multi-zone heater, the heat inflow to the surface of a growing crystal is large because of the heat radiation from the after-heater and consequently, the temperature gradient can be reduced. ]6[ A low temperature gradient means that the Improved hot zone Reduction of , Multizone heater thermal stress ' ' ('Reduction of )-~ FEC (Fully Encapsulated Czochralski) \ temperature gradient Ambient gas Prevention of As (or P) dissociation Control of yrtemoihciots Increase J Melt composition of CRSS Isoelectronic doping , In, B (for GaAs) Ga, As (for InP) erugiF .1 suoiraV sehcaorppa ot eht noitcuder of noitacolsid ni ytisned V-IH dnuopmoc .slatsyr crotcudnocimes Bulk Crystal Growth 3 solidified crystal stays at elevated temperature longer and therefore, the group V element tends to dissociate from the crystal surface. LEC growth with a low temperature gradient requires a special measure to suppress the dissociation of group V elements. Crystal growth in an arsenic (or phospho- rus) atmosphere ~IH7[ and latsyrc growth with lluf noitaluspacne by B203 11I[ haveb een .detpmetta The yrtcmoihciots of eht latsyrc also stceffa eht dislocation density. ]41[']21[ The effect of impurity doping on the dislocation density and dislo- cation mobility in semiconductor crystal is well-known. In order to obtain a semi-insulating crystal for IC applications, an isoeleetronic impurity must be used. For GaAs, these dopants are N, AI, In, Sb, B and ]SB-lSlt.p However, to date, only indium doping has been effective for obtaining low- dislocation, semi-insulating CraAs crystals of an industrially useful size (that is, with a diameter larger than 2 inches and a lot size greater than 50 wafers).[ 112I-]91 Doping with indium, together with the VM-FEC (Vertical Magnetic field applied, Fully Encapsulated Czochralski) method, has en- abled the growth of dislocation-free and striation-free GaAs crystals. [lq A 4" diameter dislocation-free GaAs crystal has been obtained using this method. 122[ While In doping yields materials of high quality, it has the disadvantages of smallleort sizes and higher wafer costs in comparison with conventional undoped crystals. This is due to the fact that a cellular structure is generated during crystal growth, thus greatly reducing material yield. This phenomenon occurs when the In concentration in the melt exceeds a critical value. The melt then goes to a compositional supercooled state. In order to retard the generation of this cellular structure, two techniques have been tried. The first method is the G/R technique ]32[ in which the temperature gradient (G) and the growth rate (R) are simulta- neously controlled, and the second is a double crucible method 142[ in which the segregation coefficient of In in sAm.C is artificially adjusted to unity. The In metdhoopdi ng is also effective in HB sAarC crystal growth. 1~[ Because the HB method has a lower temperature gradient compared to the LEC method, the In concentration necessary for reducing the dislocation density is relatively small. Horizontal Zone Melting fflZM), which can alter an impurity segregation coefficient, has been tried in order to obtain a uniform impurity distribution along the growth ]62t.noitcerid Isoelectronic impurities for InP are Ga, As and Sb. An impurity segregation coefficient is not generally unity, and therefore, the impurity concentration changes along the growth direction. Accordingly, co-doping of two kinds of impurities, where the segregation coefficient of one impurity dnuopmoC srotcudnocimeS is smaller than unity and that of the other impurity is larger than unity, has been trim to obtain a uniformd istribution of total impurity concentration in InP crystal.[ 16 2.0 HB GaAs The HB method is extensively employed as a low dislocation density crystaglr owth technique. This is because reduction of thtee mpera- ture gradient is relatively easy and precise control of the stoichiometry is possible in comparison with the LEC method. Basic approaches to achieve a low dislocation density have already been described in the previous section. This section addresses the methods of cooling a solidified crystal and the solid-liquid interface epahs in order to obtain very low dislocation density CraAs crystals. 2.1 Cooling Methods Figure 2 shows a schematic diagram of the BIF method. An entire ingot is kept in the 2 T zone after solidification at the solid-liquid interface and then gradually cooled to room temperature. A temperature distribution is generated in the crystal during this cooling process, and ~rdingly, thermal stress is induceA in the crystal. Since CraAs is more susceptible to dislocation's generation and propagation at low temperature by lower thermal stress in comparison with i, S optimization of the cooling process is critical for the reduction of dislocation density. Figure 3 shows the influ- ences of the cooling process and crystal diameter on the dislocation density. When the cooling rate is - 5 10~ in the temperature range between 900~ and 1,200~ the etch pit density (EPD) of 2" diameter crystals can be reduced to lower than 5,000 cm .2- However, when the cooling rate is 01 ~ 100~ in the same temperature range, the EPD increases to about twice this value. 2.2 Influence of Solid-Liquid Interface Shape It has been found that the generation of lineage, which is a collection of dislocations, is related to the shape of the solid-liquid interface in LEC ]72[ and GF (Gradient Freeze) growth. ]s2[ We have investigated the relation between the solid-liquid interface shape and the dislocation density by doing Bulk Crystal Growth 5 AB etching[ ]92 on Si-doped HB GaAs crystals. These crystals were grown along the 11[ l] crystallographic direction, and sample wafers werteh en cut along the 12[ l] direction, which is parallel to a free surface ofthe ingot. The results are shown in Fig. 4. The shape of the solid-liquid interface of case (a) is nearly flat and the EPD is quite low across the wafer. On the other hand, the solid-liquid interface shape of case (b) is not synunetric from right to left and shows a strong concavity toward the melt. The EPD in the corresponding region is high. Figure 5 shows the EPD maps of a 2" diameter Si-doped HB GaAs crystal grown in a thermal environment, which makes the solid-liquid interface shape symmetric and fiat. It shows that the entire ingot has an EPD of less than 400 em .2- _~- i 250 ,~T (1240---- ! 245~ ) ~.- t238 - " " ~u 1200 2T (1100...1220oc) -~ t 001 < UJ a. Ts (6Q0----620"C) LU \ Quartz Boat Figure 2. Schematic diagram of three-temperature zone 3]]-1 (Horizontal Bridgman) crystal growth method. dnuopmoC srotcudnocimeS )a( 10 4 4" lE E L) o , t- n 3"~ w A ~ - A 103 A "2 #, I I I I I ,I i 40 60 80 001 DIAMETER OF WAFER [mm] Figure 3. Cooling rate dcpcndcncc of EPD of HB grown CmAs crystal. Cooling rate in the temperature range between 900~ and 1,200~ is (a) 10 ~- 100~ and (b) 5 -- 10~ (a) (21]') plane o.'o+x( )~m 0 O ~ 0 O ! O ~sqOOOO Ave 110cm ~" Max 700cm 2" (b) (2~T) plane (XlO2cm.2) /o o, 2,,,oN X l~176176176176 / middle----.~x \~, t o o (cid:12)9 o o , , +,mz-.~t,,,m. ,,=J/ . kko + o o ,o.,,,.-1/ \\ + 2 t o +o't3ua/ +o.tto,,, Ave e 960cm Max 5,200cm 2" Figure 4. Relationship between solid-liquid interface shape and dislocation density. Solid-liquid interface shape is (a) flat, and (b) not symmetric from fight to left.

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