Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University For other titlespublished inthis series, goto http://www.springer.com/series/7381 Sai-Weng Sin Seng-Pan U Rui Paulo Martins l l Generalized Low-Voltage Circuit Techniques for Very High-Speed Time- Interleaved Analog-to- Digital Converters Sai-WengSin Seng-PanU UniversityofMacau UniversityofMacau FacultyofScienceandTechnology FacultyofScienceandTechnology DeptofElectricalandElectronicsEngin DeptofElectricalandElectronicsEngin Av.PadreTomasPereiraTaipa Av.PadreTomasPereiraTaipa 000Macao 000Macao China,People’sRepublic China,People’sRepublic [email protected] [email protected] Prof.RuiPauloMartins UniversityofMacauandTech. Univ.ofLis FacultyofScienceandTechnology DeptofElectricalandElectronicsEngin Av.PadreTomasPereiraTaipa 000Macao China,People’sRepublic [email protected] ISBN978-90-481-9709-5 e-ISBN978-90-481-9710-1 DOI10.1007/978-90-481-9710-1 SpringerDordrechtHeidelbergLondonNewYork LibraryofCongressControlNumber:2010935169 # SpringerScience+BusinessMediaB.V.2010 Nopartofthisworkmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorbyany means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permissionfromthePublisher,withtheexceptionofanymaterialsuppliedspecificallyforthepurpose ofbeingenteredandexecutedonacomputersystem,forexclusiveusebythepurchaserofthework. Coverdesign:SPiPublisherServices Printedonacid-freepaper SpringerispartofSpringerScience+BusinessMedia(www.springer.com) Thisbookisdedicatedto OurWives . Preface Analog-to-DigitalConverters(ADCs)playanimportantroleinmostmodernsignal processingandwirelesscommunicationsystemswhereextensivesignalmanipula- tion is necessary to be performed by complicated digital signal processing (DSP) circuitry.Thistrendalsocreatesthepossibilityoffabricatingallfunctionalblocks ofasysteminasinglechip(SystemOnChip–SoC),withgreatreductionsincost, chipareaandpowerconsumptionofportabledeviceswhichareinevitablylargeif the corresponding signal-conditioning circuits are implemented with discrete or individual off chip analog elements. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise perfor- mance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technologyscaling,aswellastherequirementofbatteryoperatedportabledevices InterleavedAnalog-to-DigitalConverters. Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specificconsiderations.Thebookisorganizedinsevenchaptersasfollows: Chapter1presentsanoverviewoftheintroductoryaspectsofthecurrentstate- of-the-artlow-voltagehigh-speedADCdesignsanditalsoaddressesthemotivation andobjectivesofthisresearchwork,besidespresentingitsoriginality. Chapter2willdiscusstheimpactsoftheCMOStechnologyscalinginthedesign ofanalogcircuits,atthedevicelevel,withthedegradationofboththeintrinsicgain and the speed of deep-submicron transistors. Besides that, at circuit level, it pre- sentsthedesignchallengesduetothereductionintheanalogsupplyvoltage,which leadstotheproblemsoffloatingswitchesaswellasofreducedvoltageheadroom forlow-voltageopamps.Currentsolutionstotheseissueswillalsobediscussedand acomparisonbetweenadvantagesanddisadvantagesamongthemwillbedrawn. Chapter 3 will present practical considerations of switched-capacitor circuits designwithinalow-voltageenvironment,e.g.thecommon-modefeedbackcircuits, front-end input interfaces to continuous-time input signal, level-shifting techni- ques, process-insensitive biasing as well as gain-and-offset compensation. These vii viii Preface advanced low-voltage circuit techniques greatly relax the speed-power-accuracy trade-offswhichareimposedbythereducedheadroominlow-voltageapplications. Chapter4willaddresstheconceptofTime-Interleaving(TI)whichrepresentsan efficient solution for designing very-high-speed circuits and systems under the speed limitations imposed by the technology. On the other hand, since channel mismatches will severely limit the system performance, four different kinds – offset, gain, timing and bandwidth mismatches will be thoroughly analyzed and discussed. Closed-form spectrumexpressions, as well asthe Signal-to-Noise-and- DistortionRatio,willbederivedforasimplifiedanalysis,atanearlydesignphase, oftheperformanceoftime-interleavedsystemsundervariouschannelmismatches. Chapter 5 will present the design of a low-voltage 1.2 V, 10 b, 60–360 MS/s reconfigurable time-interleaved analog-to-digital converter which is implemented in 0.18 mm CMOS technology. Design considerations about the various ADC’s circuit building blocks, as well as special attention to the layout for high-speed mismatch-insensitivedesign,willalsobeaddressed. Chapter 6 will subsequently illustrate the Printed-Circuit Board (PCB) design thatsupportstheexperimentaltestingsetup,andwillpresentthemeasuredresults oftheprototypeADCchipdescribedinChapter5.Inadditiontothemeasurement summary a comparison with previously reported low-voltage high-speed ADCs willalsobeprovided. Chapter 7 will finally draw the relevant concluding remarks of this book and proposesprospectivefutureresearchworks. Appendixeswillalsobeprovidedtointroduce:(i)theoperationprincipleofthe proposed common-mode feedback techniques, as presented in Chapter 3; (ii) the mathematicderivationfortheSNDRofthebandwidthmismatchinTI-ADCs;(iii) theestimation ofnoiseperformanceinvarious buildingblocksofadvancedreset- opampcircuits;and(iv)amathematicanalysisandproofofthespecialcaseofgain- mismatchanalysispresentedinthemeasurementresultsofChapter6. Macau Sai-WengSin,Terry May2010 Seng-PanU,Ben RuiPauloMartins Acknowledgement We would like to express our thanks to the Research Committee of University of Macau(UM)aswellastotheMacaoScienceandTechnologyDevelopmentFund (FDCT) for the financial support to the research work presented in this book. Furthermore,ourthanksgoalsotoDr.Sai-WengSin’sPhDexaminationcommittee members,Prof.IuVaiPan(UniversityofMacau),Prof.HanYingDuo(Tsinghua University,China),Prof.AkiraMatsuzawa(TokyoInstituteofTechnology,Japan), Prof.Bang-SupSong(UniversityofCalifornia-SanDiego,USA)andProf.Franco Maloberti(UniversityofPavia,Italy)fortheirparticipationintheoraldefenseand their thorough review of the work. We would like also to thank Prof. Mok Kai Meng,Dr.VaiMangI,Dr.MakPengUnandDr.WongManChungfortheirguidance andsuggestions,withinthegraduatestudyperiodatUM. Wewillalwaysremember goodexperiencesofworkingwithourcolleaguesin the Analog and Mixed-Signal VLSI Laboratory, of UM, during the same period. Amongthose,wewouldliketopresentourspecialthankstoAlphaChio,Meshell Ma,AbnerWei,JuliaZhu,IvorChanandVictorWongfortheirvaluablecontribu- tionsonvarioustechnicalpoints,we’vereallyenjoyedsharingthegoodatmosphere existinginourresearchteam.Inparticular,wewouldliketohighlightalsoherethe collaborationofStephenAoIeongandLeoNg,forprovidingcomprehensiveCAD andcomputingsupporttousandthewholeteamwhiletheywerenotspecializedin thisareaand,simultaneously,werequitebusyintheirowngraduatework. We owe our gratitude also to our dear friends from Chipidea Microelectronics Macao,now,partofAnalogIPgroupofSynopsys,CharlesChan,LewisLei,Dustin Chio, Louis Lao, and Norma Vu for their technical and administrative support. Withouttheirhelpwewon’tbeabletofinishthisprojecttimely. Ourfamiliessurelydeservethebiggestthanksfortheirlove,understandingand continuous support. They were always encouraging us in periods of frustration, whileprovidinggreatsupportinhomeoperationswhenwewereabsent;thisbookis dedicatedtothem. ix .
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