Table Of ContentGaN Transistors for Efficient Power Conversion
GaN Transistors for Efficient Power Conversion
Third Edition
Alex Lidow
Efficient Power Conversion Corporation (EPC)
USA
Michael de Rooij
Efficient Power Conversion Corporation (EPC)
USA
Johan Strydom
Kilby Labs
Texas Instruments
USA
David Reusch
VPT, Inc.
USA
John Glaser
Efficient Power Conversion Corporation (EPC)
USA
This edition first published 2020
© 2020 John Wiley & Sons Ltd
Edition History
1e 2012 Power Conversion Publications, 2e 2015 Wiley
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Library of Congress Cataloging‐in‐Publication Data
Names: Lidow, Alex, author. | de Rooij, Michael, author. | Strydom, Johan,
author. | Reusch, David, author. | Glaser, John (Electrical engineer), author.
Title: GaN transistors for efficient power conversion / Alex Lidow, Ph.D.,
Efficient Power Conversion Corporation (EPC), USA, Michael de Rooij, Ph.D.,
Efficient Power Conversion Corporation (EPC), USA, Johan Strydom, Ph.D.,
Kilby Labs, Texas Instruments, USA, David Reusch, Ph.D.,
VPT, Inc., USA, John Glaser, Ph.D.,
Efficient Power Conversion Corporation (EPC), USA.
Description: 3rd edition. | Hoboken, NJ : John Wiley & Sons, Inc., 2020. |
Includes bibliographical references and index. |
Identifiers: LCCN 2019015122 (print) | LCCN 2019017751 (ebook) | ISBN 9781119594376
(Adobe PDF) | ISBN 9781119594420 (ePub) | ISBN 9781119594147 (hardback)
Subjects: LCSH: Field-effect transistors–Materials. | Power transistors–Materials. | Gallium nitride.
Classification: LCC TK7871.95 (ebook) | LCC TK7871.95 .G355 2020 (print) | DDC 621.3815/284–dc23
LC record available at https://lccn.loc.gov/2019015122
Cover Design: Wiley
Cover Image: Courtesy of Efficient Power Conversion Corporation
Set in 10/12pt Warnock by SPi Global, Pondicherry, India
10 9 8 7 6 5 4 3 2 1
In memory of Eric Lidow, the original power conversion pioneer.
vii
Contents
Foreword xv
Acknowledgments xvii
1 GaN Technology Overview 1
1.1 Silicon Power Metal Oxide Silicon Field Effect Transistors 1976–2010 1
1.2 The Gallium Nitride Journey Begins 2
1.3 GaN and SiC Compared with Silicon 2
1.3.1 Bandgap (E ) 3
g
1.3.2 Critical Field (E ) 3
crit
1.3.3 On‐Resistance (R ) 4
DS(on)
1.3.4 The Two‐Dimensional Electron Gas (2DEG) 4
1.4 The Basic GaN Transistor Structure 6
1.4.1 Recessed Gate Enhancement‐Mode Structure 7
1.4.2 Implanted Gate Enhancement‐Mode Structure 8
1.4.3 pGaN Gate Enhancement‐Mode Structure 8
1.4.4 Hybrid Normally Off Structures 8
1.4.5 Reverse Conduction in HEMT Transistors 10
1.5 Building a GaN Transistor 11
1.5.1 Substrate Material Selection 11
1.5.2 Growing the Heteroepitaxy 12
1.5.3 Processing the Wafer 12
1.5.4 Making Electrical Connection to the Outside World 13
1.6 GaN Integrated Circuits 15
1.7 Summary 21
References 21
2 GaN Transistor Electrical Characteristics 25
2.1 Introduction 25
2.2 Device Ratings 25
2.2.1 Drain‐Source Voltage 25
2.3 On‐Resistance (R ) 30
DS(on)
2.4 Threshold Voltage 33
viii Contents
2.5 Capacitance and Charge 34
2.6 Reverse Conduction 37
2.7 Summary 39
References 40
3 Driving GaN Transistors 41
3.1 Introduction 41
3.2 Gate Drive Voltage 44
3.3 Gate Drive Resistance 45
3.4 Capacitive Current‐Mode Gate Drive Circuits for Gate Injection
Transistors 46
3.5 dv/dt Considerations 48
3.5.1 Controlling dv/dt at Turn‐On 48
3.5.2 Complementary Device Turn‐On 49
3.6 di/dt Considerations 51
3.6.1 Device Turn‐On and Common‐Source Inductance 51
3.6.2 Off‐State Device di/dt 53
3.7 Bootstrapping and Floating Supplies 54
3.8 Transient Immunity 57
3.9 High‐Frequency Considerations 59
3.10 Gate Drivers for Enhancement‐Mode GaN Transistors 60
3.11 Cascode, Direct‐Drive, and Higher‐Voltage Configurations 60
3.11.1 Cascode Devices 60
3.11.2 Direct‐Drive Devices 63
3.11.3 Higher‐Voltage Configurations 64
3.12 Summary 64
References 65
4 Layout Considerations for GaN Transistor Circuits 69
4.1 Introduction 69
4.2 Minimizing Parasitic Inductance 69
4.3 Conventional Power‐Loop Designs 72
4.3.1 Lateral Power‐Loop Design 72
4.3.2 Vertical Power‐Loop Design 73
4.4 Optimizing the Power Loop 74
4.4.1 Impact of Integration on Parasitics 75
4.5 Paralleling GaN Transistors 76
4.5.1 Paralleling GaN Transistors for a Single Switch 76
4.5.2 Paralleling GaN Transistors for Half‐Bridge Applications 79
4.6 Summary 83
References 83
5 Modeling and Measurement of GaN Transistors 85
5.1 Introduction 85
5.2 Electrical Modeling 85
5.2.1 Basic Modeling 85
Contents ix
5.2.2 Limitations of Basic Modeling 88
5.2.3 Limitations of Circuit Simulation 90
5.3 Measuring GaN Transistor Performance 91
5.3.1 Voltage Measurement Requirements 94
5.3.2 Probing and Measurement Techniques 96
5.3.3 Measuring Non‐Ground‐Referenced Signals 99
5.3.4 Current Measurement Requirement 100
5.4 Summary 101
References 102
6 Thermal Management 105
6.1 Introduction 105
6.2 Thermal Equivalent Circuits 105
6.2.1 Thermal Resistances in a Lead Frame Package 105
6.2.2 Thermal Resistances in a Chip‐Scale Package 107
6.2.3 Junction‐to‐Ambient Thermal Resistance 108
6.2.4 Transient Thermal Impedance 109
6.3 Improving Thermal Performance with a Heatsink 110
6.3.1 Selection of Heatsink and Thermal Interface Material (TIM) 111
6.3.2 Heatsink Attachment for Bottom‐Side Cooling 112
6.3.3 Heatsink Attachment for Multisided Cooling 113
6.4 System‐Level Thermal Analysis 114
6.4.1 Thermal Model of a Power Stage with Discrete GaN Transistors 115
6.4.2 Thermal Model of a Power Stage with a Monolithic GaN
Integrated Circuit 117
6.4.3 Thermal Model of a Multiphase System 118
6.4.4 Temperature Measurement 120
6.4.4.1 Optical 120
6.4.4.2 Physical Contact 121
6.4.4.3 Temperature‐Sensitive Electrical Parameter 122
6.4.5 Experimental Characterization 122
6.4.6 Application Examples 124
6.5 Summary 128
References 128
7 Hard‐Switching Topologies 131
7.1 Introduction 131
7.2 Hard‐Switching Loss Analysis 131
7.2.1 Hard‐Switching Transitions with GaN Transistors 132
7.2.2 Output Capacitance (C ) Losses 135
OSS
7.2.3 Turn‐On Overlap Loss 138
7.2.3.1 Current Rise Time 139
7.2.3.2 Voltage Fall Time 142
7.2.4 Turn‐Off Overlap Losses 145
7.2.4.1 Current Fall Time 146
7.2.4.2 Voltage Rise Time 147
x Contents
7.2.5 Gate‐Charge (Q ) Losses 147
G
7.2.6 Reverse Conduction Losses (P ) 147
SD
7.2.6.1 Impact of Dead Time Selection on Reverse Conduction Loss 147
7.2.6.2 Adding an Anti‐Parallel Schottky Diode 150
7.2.6.3 Dynamic C ‐Related Reverse Conduction Losses 153
OSS
7.2.7 Reverse Recovery (Q ) Losses 153
RR
7.2.8 Hard‐Switching Figure of Merit 154
7.3 Impact of Parasitic Inductance on Hard‐Switching Losses 154
7.3.1 Impact of Common‐Source Inductance (L ) 154
CS
7.3.2 Impact of Power‐Loop Inductance on Device Losses 157
7.4 Frequency Impact on Magnetics 160
7.4.1 Transformers 160
7.4.2 Inductors 161
7.5 Buck Converter Example 162
7.5.1 Comparison with Experimental Measurements 169
7.5.2 Consideration of Parasitic Inductance 170
7.6 Summary 174
References 174
8 Resonant and Soft‐Switching Converters 177
8.1 Introduction 177
8.2 Resonant and Soft‐Switching Techniques 177
8.2.1 Zero‐Voltage and Zero‐Current Switching 177
8.2.2 Resonant DC–DC Converters 179
8.2.3 Resonant Network Combinations 179
8.2.4 Resonant Network Operating Principles 180
8.2.5 Resonant Switching Cells 181
8.2.6 Soft‐Switching DC–DC Converters 182
8.3 Key Device Parameters for Resonant and Soft‐Switching
Applications 182
8.3.1 Output Charge (Q ) 182
OSS
8.3.2 Determining Output Charge from Manufacturers’ Datasheets 183
8.3.3 Comparing Output Charge of GaN Transistors and Si MOSFETs 184
8.3.4 Gate Charge (Q ) 185
G
8.3.5 Determining Gate Charge for Resonant and Soft‐Switching
Applications 186
8.3.6 Comparing Gate Charge of GaN Transistors and Si MOSFETs 187
8.3.7 Comparing Performance Metrics of GaN Transistors and Si MOSFETs 187
8.4 High‐Frequency Resonant Bus Converter Example 188
8.4.1 Resonant GaN and Si Bus Converter Designs 191
8.4.2 GaN and Si Device Comparison 191
8.4.3 Zero‐Voltage Switching Transition 193
8.4.4 Efficiency and Power Loss Comparison 195
8.4.5 Impact of Further Device Improvements on Performance 197
8.5 Summary 199
References 199
Contents xi
9 RF Performance 201
9.1 Introduction 201
9.2 Differences Between RF and Switching Transistors 202
9.3 RF Basics 204
9.4 RF Transistor Metrics 205
9.4.1 Determining the High‐Frequency Characteristics of RF Transistors 206
9.4.2 Pulse Testing for Thermal Considerations 207
9.4.3 Analyzing the s‐Parameters 209
9.4.3.1 Test for Stability 209
9.4.3.2 Transistor Input and Output Reflection 210
9.4.3.3 Transducer Gain 211
9.4.3.4 Unilateral/Bilateral Transistor Test 211
9.5 Amplifier Design Using Small‐Signal s‐Parameters 212
9.5.1 Conditionally Stable Bilateral Transistor Amplifier Design 213
9.5.1.1 Available Gain 213
9.5.1.2 Constant Available Gain Circles 213
9.6 Amplifier Design Example 214
9.6.1 Matching and Bias Tee Network Design 216
9.6.2 Experimental Verification 219
9.7 Summary 221
References 221
10 DC–DC Power Conversion 223
10.1 Introduction 223
10.2 Non‐Isolated DC–DC Converters 223
10.2.1 The 12 V –1.2 V Buck Converter with Discrete Devices 224
IN OUT
10.2.2 The 12 V –1 V Monolithic Half‐Bridge IC‐Based
IN OUT
Point‐of‐Load Module 228
10.2.3 Very‐High‐Frequency 12 V Monolithic Half‐Bridge IC‐Based
IN
Point‐of‐Load Module 230
10.2.4 The 28 V –3.3 V Point‐of‐Load Module 233
IN OUT
10.2.5 The 48 V –12 V Buck Converter with Parallel GaN Transistors
IN OUT
for High‐Current Applications 233
10.3 Transformer‐Based DC–DC Converters 239
10.3.1 Eighth‐Brick Converter Example 239
10.3.2 High‐Performance 48 V Step‐Down LLC DC Transformer 243
10.3.2.1 Circuit Overview 243
10.3.2.2 GaN Transistor Advantage in the LLC Converter 244
10.3.2.3 A 1 MHz, 900 W, 48 V–12 V LLC Example Using GaN Transistors 245
10.3.2.4 A 1 MHz, 900 W, 48 V–6 V LLC Example Using GaN Transistors 248
10.4 Summary 249
References 250
11 Multilevel Converters 251
11.1 Introduction 251
11.2 Benefits of Multilevel Converters 251
xii Contents
11.2.1 Applying Multilevel Converters to 48 V Applications 252
11.2.2 Multilevel Converters for High‐Voltage (400 V) Applications 254
11.3 Gate Driver Implementation 255
11.4 Bootstrap Power Supply Solutions for GaN Transistors 256
11.5 M ultilevel Converters for PFC Applications 261
11.6 E xperimental Examples 263
11.6.1 Low Voltage 263
11.6.2 High Voltage 264
11.7 S ummary 264
R eferences 265
12 Class D Audio Amplifiers 269
12.1 Introduction 269
12.1.1 Total Harmonic Distortion 271
12.1.2 Intermodulation Distortion 272
12.2 GaN Transistor Class D Audio Amplifier Example 273
12.2.1 Closed‐Loop Amplifier 274
12.2.2 Open‐Loop Amplifier 276
12.3 Summary 278
References 278
13 Lidar 281
13.1 Introduction to Light Detection and Ranging (Lidar) 281
13.2 Pulsed Laser Driver Overview 281
13.2.1 Pulse Requirements 282
13.2.2 Semiconductor Optical Sources 284
13.2.3 Basic Driver Circuits 285
13.2.4 Driver Switch Properties 286
13.3 Basic Design Process 288
13.3.1 Resonant Capacitive Discharge Laser Driver Design 288
13.3.2 Quantitative Effect of Stray Inductance 289
13.4 Hardware Driver Design 290
13.5 Experimental Results 291
13.5.1 High‐Speed Laser Driver Design Example 291
13.5.2 Fastest 292
13.5.3 Highest Current 293
13.5.4 Low Voltage 293
13.6 Other Considerations 294
13.6.1 Resonant Capacitors 294
13.6.2 Charging 295
13.6.3 Voltage Probing 295
13.6.4 Current Sensing 296
13.6.5 Dual‐Edge Control 297
13.7 Summary 299
References 299
