Fairchild Semiconductor. RC Snubber Networks for Thyristor Power Control and Transient Suppression

25 Pages·0.909 MB·English

www.fairchildsemi.com
Application Note AN-3008
RC Snubber Networks for Thyristor Power Control and
Transient Suppression
Introduction
A
A
RC networks are used to control voltage transients that could
falsely turn-on a thyristor. These networks are called snub- IBP IA PE
bers. PNP V
I1 CJP IJ ICP NB
The simple snubber consists of a series resistor and capacitor CJN
CJ C
placed around the thyristor. These components along with ICN IJ I2 dV G PB
dt
the load inductance form a series CRL circuit. Snubber NPN G t
theory follows from the solution of the circuit’s differential IBN CJdV NE
equation. IK dt
IA= 1– (αN + αp)
K
Many RC combinations are capable of providing acceptable
performance. However, improperly used snubbers can cause TWO TRANSOISFTOR MODEL CEFF= 1– (αCNJ + αp) INTEGKRATED
unreliable circuit operation and damage to the semiconduc- SCR STRUCTURE
tor device.
(dV)
Figure 1. Model
Both turn-on and turn-off protection may be necessary for dt s
reliability. Sometimes the thyristor must function with a
(dV)
range of load values. The type of thyristors used, circuit Conditions Influencing
configuration, and load characteristics are influential. dt s
Transients occurring at line crossing or when there is no
Snubber design involves compromises. They include cost, initial voltage across the thyristor are worst case. The
voltage rate, peak voltage, and turn-on stress. Practical collector junction capacitance is greatest then because the
solutions depend on device and circuit physics. depletion layer widens at higher voltage.
Small transients are incapable of charging the self-capaci-
dV
Static tance of the gate layer to its forward biased threshold voltage
dt (Figure 2). Capacitance voltage divider action between the
collector and gate-cathode junctions and built-in resistors
dV that shunt current away from the cathode emitter are respon-
What is Static ?
dt sible for this effect.
dV
Static ------- is a measure of the ability of a thyristor to retain a
dt 180
blocking state under the influence of a voltage transient.
160
MAC 228-10 TRIAC
TJ = 110°C
(dV) 140
Device Physics s)
dt s µV/ 120
(
Static d----V--- turn-on is a consequence of the Miller effect and dVdt100
regenerdattion (Figure 1). A change in voltage across the ATIC 80
T
junction capacitance induces current through it. This current S 60
dV
is proportional to the rate of voltage change -------. It triggers 40
dt
the device on when it becomes large enough to raise the sum 20
20 100 200 300 400 500 600 700 800
of the NPN and PNP transistor alphas to unity.
PEAK MAIN TERMINAL VOLTAGE (VOLTS)
(dV)
Figure 2. Exponential versus Peak Voltage
dt s
REV. 4.01 6/24/02
AN-3008 APPLICATION NOTE
dV (dV)
Static ------- does not depend strongly on voltage for operation Improving
dt dt s
below the maximum voltage and temperature rating.
Avalanche multiplication will increase leakage current and Static d----V--- can be improved by adding an external resistor
dt
dV
reduce ------- capability if a transient is within roughly 50 volts from the gate to MT1 (Figure 4). The resistor provides a path
dt
of the actual device breakover voltage. for leakage and d----V--- induced currents that originate in the
dt
drive circuit or the thyristor itself.
dV
A higher rated voltage device guarantees increased ------- at
dt
140
lower voltage. This is a consequence of the exponential
rating method where a 400 V device rated at 50 V/µs has a
120
dV
higher ------- to 200 V than a 200 V device with an identical MAC 228-10
dt s) 100 800V 110°C
rating. However, the same diffusion recipe usually applies µ
V/
for all voltages. So actual capabilities of the product are not ( 80
much different. dVdt
C 60
TI
Heat increases current gain and leakage, lowering d----V--- , STA 40 RINTERNAL = 600Ω
dt
s
the gate trigger voltage and noise immunity (Figure 3). 20
0
180 10 100 1000 10000
GATE-MT1, RESISTANCE (OHMS)
160
140 MAC 228-10 (dV)
µV/s) 120 VPK = 800 V FigureG 4a. tEe xtpoo MnTentRiaels isdtatnsc eversus
( 1
dVdt100
C Non-sensitive devices (Figure 5) have internal shorting
TATI 80 resistors dispersed throughout the chip’s cathode area. This
S
60 design feature improves noise immunity and high tempera-
ture blocking stability at the expense of increased trigger and
40
holding current. External resistors are optional for non-sensi-
20
tive SCRs and TRIACs. They should be comparable in size
20 100 200 300 400 500 600 700 800
TJ, JUNCTION TEMPERATURE (°C) to the internal shorting resistance of the device (20 to 100
ohms) to provide maximum improvement. The internal resis-
(dV)
Figure 3. Exponential versus Temperature tance of the thyristor should be measured with an ohmmeter
dt s
that does not forward bias a diode junction.
(dV)
Failure Mode 2200
dt s
2000
Occasional unwanted turn-on by a transient may be accept-
able in a heater circuit but isn’t in a fire prevention sprinkler 1800 MAC 16-8
system or for the control of a large motor. Turn-on is destruc- s) VPK = 600 V
tive when the follow-on current amplitude or rate is exces- µ(V/ 1600
sive. If the thyristor shorts the power line or charged dVdt1400
C
capacitor, it will be damaged. ATI 1200
T
S
1000
dV
Static ------- turn-on is non-destructive when series impedance
dt 800
limits the surge. The thyristor turns off after a half-cycle of
600
dV
conduction. High ------- aids current spreading in the thyristor, 50 60 70 80 90 100 110 120 130
dt TJ, JUNCTION TEMPERATURE (°C)
dI
improving its ability to withstand -----. Breakdown turn-on
dt
does not have this benefit and should be prevented. (dV)
Figure 5. Exponential
dt s
versus Junction Temperature
2 REV. 4.01 6/24/02
APPLICATION NOTE AN-3008
Sensitive gate TRIACS run 100 to 1000 ohms. With an gate drive circuit needs to be able to charge the capacitor
dV without excessive delay, but it does not need to supply con-
external resistor, their ------- capability remains inferior to
dt dV
tinuous current as it would for a resistor that increases -------
non-sensitive devices because lateral resistance within the dt
gate layer reduces its benefit. the same amount. However, the capacitor does not enhance
static thermal stability.
Sensitive gate SCRs (I < 200 µA) have no built-in resistor.
GT dV
They should be used with an external resistor. The recom- The maximum ------- improvement occurs with a short.
dt
s
mended value of the resistor is 1000 ohms. Higher values
Actual improvement stops before this because of spreading
dV
reduce maximum operating temperature --d---t-- (Figure 6). resistance in the thyristor. An external capacitor of about 0.1
s
The capability of these parts varies by more than 100 to 1 µF allows the maximum enhancement at a higher value of
depending on gate-cathode termination. RGK.
10 MEG dV
MS) TMAC =R 6252°-C2 One should keep the thyristor cool for the highest --d---t--s.
H Also devices should be tested in the application circuit at the
E (O 10 A highest possible temperature using thyristors with the lowest
C measured trigger current.
N1 MEG V G
A K
T dV
S
SI TRIAC Commutating
E dt
R
E
D dV
O 100K What is Commutating ?
H dt
T
A
C dV
E- The commutating ------- rating applies when a TRIAC has been
T dt
A
G conducting and attempts to turn-off with an inductive load.
10K
The current and voltage are out of phase (Figure 8). The
0.001 0.01 0.1 1 10 100
dV TRIAC attempts to turn-off as the current drops below the
STATIC (V/µs)
dt holding value. Now the line voltage is high and in the oppo-
site polarity to the direction of conduction. Successful turn-
(dV)
Figure 6. Exponential versus off requires the voltage across the TRIAC to rise to the
dt s
instantaneous line voltage at a rate slow enough to prevent
Gate-Cathode Resistance
retriggering of the device.
130
R L
120 MAC 228-10 RENT VLINE i G 2 VMT2-1
110 800V 110°C UR 1
dVµ(V/s)dt100 OLTAGE C PAHNAGSLEE ddtl c VMT2-1
C 90 V
TI φ
A TIME
ST 80 TIME
dV
70 i VLINE dt c
60 (dV)
0.001 0.01 0.1 1 Figure 8. TRIAC Inductive Load Turn-Off
dt c
GATE TO MT1, CAPACITANCE (µF)
(dV) (dV) Device Physics
Figure 7. Exponential dt s versus dt c
Gate to MT Capacitance
1 A TRIAC functions like two SCRs connected in inverse-
parallel. So, a transient of either polarity turns it on.
A gate-cathode capacitor (Figure 7) provides a shunt path for
transient currents in the same manner as the resistor. It also
There is charge within the crystal’s volume because of prior
filters noise currents from the drive circuit and enhances the
conduction (Figure 9). The charge at the boundaries of the
built-in gate-cathode capacitance voltage divider effect. The
REV. 4.01 6/24/02 3
AN-3008 APPLICATION NOTE
dV dV
collector junction depletion layer responsible for ------- is volume charge storage and turn-off becomes limited by ------- .
dt dt
s s
dV dV At moderate current amplitudes, the volume charge begins
also present. TRIACS have lower --d---t-- than --d---t-- because to influence turn-off, requiring a larger snubber. When the
c s
of this additional charge. dV
current is large or has rapid zero crossing, ------- has little
dt
c
dI
G MT1 influence. Commutating ----- and delay time to voltage
dt
TOP reapplication determine whether turn-off will be successful
or not. (Figures 11,12)
N N N N
P
T
N
E
Previously R
Conducting Side R
N U dI
C dt
E/ c
G dV
+ – LTA dt c
O
N N N V TIME
0
RCEUVRERRESNET RPAETCHOVERY MLTAT2ERAL VOLTAGE SFCRTOOONRMDE UPDCO TCSIHOITANIVREGE VMT2-1 CHATORG dEV /DdtUE
DROP VOLUME
STORAGE IRRM
CHARGE
Figure 9. TRIAC Structure and
Current Flow at Commutation
Figure 10. TRIAC Current and Voltage at Commutation
The volume charge storage within the TRIAC depends on
the peak current before turn-off and its rate of zero crossing
dI
-d----t . In the classic circuit, the load impedance and line E
c
frequency determine d-d---I-t . The rate of crossing for sinusoi- E (V) V
c G
dal currents is given by the slope of the secant line between A
T
L
the 50% and 0% levels as: O
V
L
A
d-d---I-t = 6--1--f-0-I--0T---0-M---A/ms RMIN E
c E
T
N
where f = line frequency and ITM = maximum on-state MAI
current in the TRIAC.
VT
Turn-off depends on both the Miller effect displacement 0 td TIME
dV
current generated by ------- across the collector capacitance and
dt Figure 11. Snubber Delay Time
the currents resulting from internal charge storage within the
volume of the device (Figure 10). If the reverse recovery
current resulting from both these components is high, the
0.5
lateral IR drop within the TRIAC base layer will forward
E 0.2
dV M
bias the emitter and turn the TRIAC on. Commutating --d---t-- Y TI 0.2 0.1
A
ctiaopna obfil ictuyr rise nlot wcoenr dwuhcetino ntu brnecinagu soef fo ffr doemv itchee gpeoosmitievtery d. iTrehce- D DELW t)0d 0.1 0.05
gate is on the top of the die and obstructs current flow. E=
LIZ(t d0.05 0.02
Recombination takes place throughout the conduction period RMA 0.03 MRL = = 1 0 0.01
and along the back side of the current wave as it declines to zero. NO 0.02 IRRM = 0 VT
Turn-off capability depends on its shape. If the current ampli- E 0.005
dI 0.0010.002 0.005 0.01 0.02 0.05 0.1 0.20.3 0.5 1
tude is small and its zero crossing -d----t is low, there is little DAMPING FACTOR
c
Figure 12. Delay Time To Normalized Voltage
4 REV. 4.01 6/24/02
APPLICATION NOTE AN-3008
(dV) (dV)
Conditions Influencing Improving
dt c dt c
dV dV dV
Commutating ------- depends on charge storage and recovery The same steps that improve ------- aid ------- except when
dt dt dt
s c
dV stored charge dominates turn-off. Steps that reduce the
dynamics in addition to the variables influencing static ------- .
dt stored charge or soften the commutation are necessary then.
High temperatures increase minority carrier life-time and the
size of recovery currents, making turn-off more difficult.
Larger TRIACS have better turn-off capability than smaller
Loads that slow the rate of current zero-crossing aid turn-off.
ones with a given load. The current density is lower in the
Those with harmonic content hinder turn-off.
larger device allowing recombination to claim a greater pro-
portion of the internal charge. Also junction temperatures are
RS C lower.
i TRIACS with high gate trigger current have greater turn-off
LS ability because of lower spreading resistance in the gate
dl layer, reduced Miller effect, or shorter lifetime.
i dt c DC MOTOR
– + The rate of current crossing can be adjusted by adding a
60 Hz R L
t L> 8.3 µs commutation softening inductor in series with the load.
R Small high permeability “square loop” inductors saturate
causing no significant disturbance to the load current. The
inductor resets as the current crosses zero introducing a large
Figure 13. Phase Controlling a Motor in a Bridge inductor into the snubber circuit at that time. This slows the
current crossing and delays the reapplication of blocking
Circuit Examples
voltage aiding turn-off.
Figure 13 shows a TRIAC controlling an inductive load in a
bridge. The inductive load has a time constant longer than
The commutation inductor is a circuit element that intro-
the line period. This causes the load current to remain con-
duces time delay, as opposed to inductance, into the circuit.

stant and the TRIAC current to switch rapidly as the line
dV
voltage reverses. This application is notorious for causing It will have little influence on observed ------- at the device.
dt
dI The following example illustrates the improvement resulting
TRIAC turn-off difficulty because of high ----- .
dt c from the addition of an inductor constructed by winding 33
turns of number 18 wire on a tape wound core (52000 -1A).
High currents lead to high junction temperatures and rates of This core is very small having an outside diameter of 3/4
current crossings. Motors can have 5 to 6 times the normal inch and a thickness of 1/8 inch. The delay time can be cal-
current amplitude at start-up. This increases both junction culated from:
temperature and the rate of current crossing leading to turn-
off problems. (N A B 10–8)
t = --------------------------------- where:
s E
The line frequency causes high rates of current crossing in
400 Hz applications. Resonant transformer circuits are dou- ts = time delay to saturation in seconds.
bly periodic and have current harmonics at both the primary B = saturating flux density in Gauss
and secondary resonance. Non-sinusoidal currents can lead A = effective core cross sectional area in cm2
N = number of turns.
to turn-off difficulty even if the current amplitude is low
before zero-crossing.
For the described inductor:
(dV) t = (33 turns)(0.076 cm2)(28000 Gauss)(1 x 10-8)/(175 v) = 4.0 µs.
Failure Mode s
dt c
The saturation current of the inductor does not need to be
dV
------- failure causes a loss of phase control. Temporary turn- much larger than the TRIAC trigger current. Turn-off failure
dt
c
on or total turn-off failure is possible. This can be destructive will result before recovery currents become greater than this
if the TRIAC conducts asymmetrically causing a dc current value. This criterion allows sizing the inductor with the
component and magnetic saturation. The winding resistance following equation:
limits the current. Failure results because of excessive surge
current and junction temperature.
REV. 4.01 6/24/02 5
AN-3008 APPLICATION NOTE
H M High load inductance requires large snubber resistors and
IS = -0---.-4--S- --π---- -NL--- where: small snubber capacitors. Low inductances imply small
resistors and large capacitors.
H = MMF to saturate = 0.5 Oersted
S
ML = mean magnetic path length = 4.99 cm. Damping and Transient Voltages
Figure 14 shows a series inductor and filter capacitor
(.5) (4.99) connected across the ac main line. The peak to peak voltage
I = ------------------------ = 60 mA.
S 0.4 π 33 of a transient disturbance increases by nearly four times.
Also the duration of the disturbance spreads because of
Snubber Physics ringing, increasing the chance of malfunction or damage to
the voltage sensitive circuit. Closing a switch causes this
Undamped Natural Resonance behavior. The problem can be reduced by adding a damping
resistor in series with the capacitor.
I
ω = ------------Radians/second
0
LC
100µH 0.05
Resonance determines d----V--- and boosts the peak capacitor 340 V
voltage when the snubbedrt resistor is small. C and L are 0 10µs 0µ.F1 V SVCEOINRLSTCIATUGIIVTEE
related to one another by ω02. d----V--- scales linearly with ω0
dt
+700
when the damping factor is held constant. A ten to one
dV S)
reduction in ------- requires a 100 to 1 increase in either T
dt OL 0
component. V
V (
Damping Factor -700
0 10 20
ρ = -R--- C---- TIME (µs)
2 L
Figure 14. Undamped LC Filter
The damping factor is proportional to the ratio of the circuit Magnifies and Lengthens a Transient
loss and its surge impedance. It determines the trade off
dV dl
between --d---t-- and peak voltage. Damping factors between dt
0.01 and 1.0 are recommended. Non-Inductive Resistor
The snubber resistor limits the capacitor discharge current
The Snubber Resistor dI dI
and reduces ----- stress. High ----- destroys the thyristor even
dV dt dt
Damping and
dt though the pulse duration is very short. The rate of current
When ρ < 0.5, the snubber resistor is small, and d----V--- depends rise is directly proportional to circuit voltage and inversely
dt proportional to series inductance. The snubber is often the
dV major offender because of its low inductance and close
mostly on resonance. There is little improvement in ------- for
dt proximity to the thyristor.
damping factors less than 0.3, but peak voltage and snubber
discharge current increase. The voltage wave has a 1-COS(θ)
With no transient suppressor, breakdown of the thyristor sets
shape with overshoot and ringing. Maximum d----V--- occurs at a the maximum voltage on the capacitor. It is possible to
dt
exceed the highest rated voltage in the device series because
time later than t = 0. There is a time delay before the
high voltage devices are often used to supply low voltage
voltage rise, and the peak voltage almost doubles.
specifications.
When ρ > 0.5, the voltage wave is nearly exponential in
The minimum value of the snubber resistor depends on the
dV
shape. The maximum instantaneous ------- occurs at t = 0. type of thyristor, triggering quadrants, gate current ampli-
dt
tude, voltage, repetitive or non-repetitive operation and
There is little time delay and moderate voltage overshoot.
required life expectancy. There is no simple way to predict
the rate of current rise because it depends on turn-on speed
When ρ > 1.0, the snubber resistor is large and d----V--- depends of the thyristor, circuit layout, type and size of snubber
dt
mostly on its value. There is some overshoot even though the capacitor, and inductance in the snubber resistor. The
circuit is overdamped. equations in Appendix D describes the circuit. However,
6 REV. 4.01 6/24/02
APPLICATION NOTE AN-3008
the values required for the model are not easily obtained Snubber operation relies on the charging of the snubber
except by testing. Therefore, reliability should be verified in capacitor. Turn-off snubbers need a minimum conduction
the actual application circuit. angle long enough to discharge the capacitor. It should be at
least several time constants (R C ).
S S
Table 1 shows suggested minimum resistor values estimated
(Appendix A) by testing a 20 piece sample from the four Stored Energy
different TRIAC die sizes.
Inductive Switching Transients
Table 1. Minimum Non-inductive Snubber Resistor for 1 2
E = --- L I Watt-seconds or Joules
Four Quadrant Triggering. 2 O
dl IO = current in Amperes flowing in the inductor at t = 0.
Peak V dt
C
Resonant charging cannot boost the supply voltage at turn-
TRIAC Type Volts R Ohms A/µS
S
off by more than 2. If there is an initial current flowing in the
Non-Sensitive 200 3.3 170
load inductance at turn-off, much higher voltages are possi-
Gate 300 6.8 250
ble. Energy storage is negligible when a TRIAC turns off
(I > 10mA) 400 11 308
GT because of its low holding or recovery current.
8 to 40 A 600 39 400
(RMS)
800 51 400
The presence of an additional switch such as a relay, thermo-
stat or breaker allows the interruption of load current and the
dl
Reducing generation of high spike voltages at switch opening. The
dt
energy in the inductance transfers into the circuit capacitance
dI
TRIAC ----- can be improved by avoiding quadrant 4 and determines the peak voltage (Figure 15).
dt
triggering. Most optocoupler circuits operate the TRIAC in
quadrants 1 and 3. Integrated circuit drivers use quadrants 2 L
and 3. Zero crossing trigger devices are helpful because they I
prohibit triggering when the voltage is high. R
OPTIONAL
Driving the gate with a high amplitude fast rise pulse VPK
C FAST
dI
increases ----- capability. The gate ratings section defines the SLOW
dt
maximum allowed current.
Inductance in series with the snubber capacitor reduces d----I-. ddVt = CI VPK = I CL
dt
It should not be more than five percent of the load inductance
(a.) Protected Circuit (b.) Unprotected Circuit
dV
to prevent degradation of the snubber’s ------- suppression
dt
Figure 15. Interrupting Inductive Load Current
capability. Wirewound snubber resistors sometimes serve
this purpose. Alternatively, a separate inductor can be added
Capacitor Discharge
in series with the snubber capacitor. It can be small because The energy stored in the snubber capacitor EC= 12---CV2
it does not need to carry the load current. For example, 18
transfers to the snubber resistor and thyristor every time it
turns of AWG No. 20 wire on a T50-3 (1/2 inch) powdered
turns on. The power loss is proportional to frequency
iron core creates a non-saturating 6.0 µH inductor.
(P = 120 E @ 60 H ).
AV C Z
A 10 ohm, 0.33 µF snubber charged to 650 volts resulted in a
Current Diversion
dI
1000 A/µs -----. Replacement of the non-inductive snubber The current flowing in the load inductor cannot change
dt
resistor with a 20 watt wirewound unit lowered the rate of instantly. This current diverts through the snubber resistor
rise to a non-destructive 170 A/µs at 800 V. The inductor dV
causing a spike of theoretically infinite ------- with magnitude
gave an 80 A/µs rise at 800 V with the non-inductive resistor. dt
equal to (I R) or (I R).
RRM H
The Snubber Capacitor
A damping factor of 0.3 minimizes the size of the snubber Load Phase Angle
capacitor for a given value of d--d--V-t--. This reduces the cost and Highly inductive loads cause increased voltage and d--d--V-t-- at
c
physical dimensions of the capacitor. However, it raises
turn-off. However, they help to protect the thyristor from
voltage causing a counter balancing cost increase.
dV
transients and ------- . The load serves as the snubber
dt
s
REV. 4.01 6/24/02 7
AN-3008 APPLICATION NOTE
inductor and limits the rate of inrush current if the device
2.8
dV
does turn on. Resistance in the load lowers --d---t-- and VPK 2.6
E
(Figure 16). 2.4 0-63%
dV
1.4 2.2 dVDdt 2.2 ddVt MAX dt
E N 2.0
ddVt 2.1 GE A 1.8
1.2 2 A
VPK 1.9 OLT 1.6 10-63%
V
K 1.4
dV/ (E W)0dtdVNORMALIZED dt 00..186 M = 1 MMM == =00 ..075.525 111111......876543 MALIZED PEAK VOLTAGEV/EPK NORMALIZED PEA 110000......208642 10-d6dV3t% ddVt o VPK
0.4 1.2 R
O
N 0
M = 0 1.1 0 0.2 0.4 0.6 0.8 1.0 2.2 1.4 1.6 1.8 2.0
DAMPING FACTOR ( ρ )
0.2 1
(RL = 0, M = 1, IRRM = 0)
0 M = RS / (RL + RS) 0.9 NORMALIZED ddVt= dEV ω/d0t NORMALIZED VPK= VEPK
0 0.2 0.4 0.6 0.8 1
dV
DAMPING FACTOR Figure 18. Trade-Off Between V and
PK dt
M = RESISTIVE DIVISION RATIO = RS
RL + RS dV
IRRM = 0 A variety of wave parameters (Figure 18) describe -------.
dt
dV Some are easy to solve for and assist understanding. These
Figure 16. 0 to 63%
dt dV dV
include the initial -------, the maximum instantaneous -------, and
dt dt
Characteristics Voltage Waves
dV
the average ------- to the peak reapplied voltage. The 0 to 63%
dt
Damping factor and reverse recovery current determine the
dV dV
shape of the voltage wave. It is not exponential when the ------- and 10 to 63% ------- definitions on device data sheets
dt dt
snubber damping factor is less than 0.5 (Figure 17) or when s c
are easy to measure but difficult to compute.
significant recovery currents are present.
Non-Ideal Behaviors
ρ= 0 ρ= 0.1
500
S)400 Core Losses
T
L
O300 The magnetic core materials in typical 60 Hz loads introduce
V 0.1
(2-1200 1 0.3 ρ= 0.3 ρ= 1 losses at the snubber natural frequency. They appear as a
MT100 resistance in series with the load inductance and winding dc
V 0
0 dV
0 0.7 1.4 2.1 2.8 3.5 4.2 4.9 5.6 6.3 7 resistance (Figure 19). This causes actual ------- to be less than
dt
TIME (µs) the theoretical value.
0-63% dV = 100 V/µs, E = 250 V,
dt s
RL = 0, IRRM = 0
Figure 17. Voltage Waves for Different Damping Factors
8 REV. 4.01 6/24/02
APPLICATION NOTE AN-3008
Core remanence and saturation cause surge currents. They
L R
depend on trigger angle, line impedance, core characteris-
tics, and direction of the residual magnetization. For exam-
ple, a 2.8 kVA 120 V 1:1 transformer with a 1.0 ampere load
produced 160 ampere currents at start-up. Soft starting the
C
circuit at a small conduction angle reduces this current.
L DEPENDS ON CURRENT AMPLITUDE, CORE Transformer cores are usually not gapped and saturate
SATURATION
easily. A small asymmetry in the conduction angle causes
R INCLUDES CORE LOSS, WINDING R. INCREASES
magnetic saturation and multi-cycle current surges.
WITH FREQUENCY
C WINDING CAPACITANCE. DEPENDS ON
Steps to achieve reliable operation include:
INSULATION, WIRE SIZE, GEOMETRY
1. Supply sufficient trigger current amplitude. TRIACS
Figure 19. Inductor Model
have different trigger currents depending on their quad-
Complex Loads rant of operation. Marginal gate current or optocoupler
LED current causes halfwave operation.
Many real-world inductances are non-linear. Their core
materials are not gapped causing inductance to vary with
2. Supply sufficient gate current duration to achieve
current amplitude. Small signal measurements poorly
latching. Inductive loads slow down the main terminal
characterize them. For modeling purposes, it is best to
current rise. The gate current must remain above the
measure them in the actual application.
specified I until the main terminal current exceeds the
GT
latching value. Both a resistive bleeder around the load
Complex load circuits should be checked for transient volt-
and the snubber discharge current help latching.
ages and currents at turn-on and turn-off. With a capacitive
load, turn-on at peak input voltage causes the maximum 3. Use a snubber to prevent TRIAC d----V--- failure.
dt
surge current. Motor starting current runs 4 to 6 times the c
steady state value. Generator action can boost voltages above 4. Minimize designed-in trigger asymmetry. Triggering
the line value. Incandescent lamps have cold start currents 10 must be correct every half-cycle including the first.
to 20 times the steady state value. Transformers generate Use a storage scope to investigate circuit behavior
voltage spikes when they are energized. Power factor correc- during the first few cycles of turn-on. Alternatively,
tion get the gate circuit up and running before energizing
circuits and switching devices create complex loads. In most the load.
cases, the simple CRL model allows an approximate snubber
design. However, there is no substitute for testing and mea- 5. Derive the trigger synchronization from the line instead
suring the worst case load conditions. of the TRIAC main terminal voltage. This avoids regen-
erative interaction between the core hysteresis and the
Surge Currents in Inductive Circuits triggering angle preventing trigger runaway, halfwave
operation, and core saturation.
Inductive loads with long L/R time constants cause asym-
metric multi-cycle surges at start up (Figure 20). Triggering
6. Avoid high surge currents at start-up. Use a current
at zero voltage crossing is the worst case condition. The
probe to determine surge amplitude. Use a soft start
surge can be eliminated by triggering at the zero current
circuit to reduce inrush current.
crossing angle.
Distributed Winding Capacitance
20 MHY There are small capacitances between the turns and layers of
240 i 0.1 a coil. Lumped together, they model as a single shunt capaci-
VAC Ω tance. The load inductor behaves like a capacitor at frequen-
cies above its self-resonance. It becomes ineffective in
dV
controlling ------- and V when a fast transient such as that
dt PK
90 resulting from the closing of a switch occurs. This problem
S) can be solved by adding a small snubber across the line.
E
R
E 0
P
M Self-Capacitance
i (A ZERO VOLTAGE TRIGGERING, IRMS = 30 A dV
A thyristor has self-capacitance which limits ------- when the
40 80 120 160 200 dt
TIME (MILLISECONDS) load inductance is large. Large load inductances, high power
factors, and low voltages may allow snubberless
Figure 20. Start-Up Surge For Inductive Circuit operation.
REV. 4.01 6/24/02 9
AN-3008 APPLICATION NOTE
Snubber Examples
1A, 60Hz
Without Inductance
10V/µs L = 318 MHY
Rin1 6 180 2.4k 170V
Power TRIAC Example VCC
Figure 2l shows a transient voltage applied to a TRIAC 2 M30O2C0 0.R11µF C1R2 T12V3/2µ2sD
controlling a resistive load. Theoretically there will be an 3021 4
instantaneous step of voltage across the TRIAC. The only φ CNTL
elements slowing this rate are the inductance of the wiring
and the self-capacitance of the thyristor. There is an expo- dV (0.63) (170)
0.63 (170) DESIGN = = 0.45V/µs
nential capacitor charging component added along with a dt (2400) (0.1µF)
decaying component because of the IR drop in the snubber
TIME
240µs
resistor. The non-inductive snubber circuit is useful when the
load resistance is much larger than the snubber resistor. dV(V/µs)
dt
Power TRIAC Optocoupler
RL 0.99 0.35
E e RS Figure 22. Single Snubber For Sensitive Gate TRIAC and
Phase Controllable Optocoupler (ρ = 0.67)
CS
The optocoupler conducts current only long enough to trig-
e τ = (RL + RS) CS ger the power device. When it turns on, the voltage between
E MT2 and the gate drops below the forward threshold voltage
of the opto-TRIAC causing turn-off. The optocoupler sees
RS
Vstep = E RS + RL d----V--- when the power TRIAC turns off later in the conduc-
TIME dt s
t = 0 tion cycle at zero current crossing. Therefore, it is not neces-
e(t = o+) = E RSR +S RL e – t/τ + (1 – e – t/τ) sary to design for the lower optocoupler d--d--V-t--c rating. In this
RESISTOR CAPACITOR example, a single snubber designed for the optocoupler
COMPONENT COMPONENT protects both devices.
Figure 21. Non-inductive Snubber Circuit
1MHY
Opto-TRIAC Examples
100
Single Snubber, Time Constant Design VCC
430
Figure 22 illustrates the use of the RC time constant design 10314 1N4001 MCR265-4 410200 HVz
method. The optocoupler sees only the voltage across the 2C35
snubber capacitor. The resistor R1 supplies the trigger 3MO6 51 MCR265-4 0.022
current of the power TRIAC. A worst case design procedure µF
100
assumes that the voltage across the power TRIAC changes 1N4001
instantly. The capacitor voltage rises to 63% of the maxi- (50 V/µs SNUBBER, ρ = 1.0)
mum in one time constant. Then:
Figure 23. Anti-Parallel SCR Driver
0.63 E dV dV
R1CS = τ = ----d-------V------------ where --d---t--sis the rated static --d---t-- Octocouplers with SCRs
dt s dV
Anti-parallel SCR circuits result in the same ------- across the
dt
for the optocoupler. optocoupler and SCR (Figure 23). Phase controllable opto-
dV
couplers require the SCRs to be snubbed to their lower -------
dt
rating. Anti-parallel SCR circuits are free from the charge
storage behaviors that reduce the turn-off capability of
TRIACs. Each SCR conducts for a half-cycle and has the
next half cycle of the ac line in which to recover. The turn-off
dV
------- of the conducting SCR becomes a static forward block-
dt
dV dV
ing ------- for the other device. Use the SCR data sheet -------
dt dt
s
rating in the snubber design.
10 REV. 4.01 6/24/02