Table Of ContentJean-Pierre Deschamps · Elena Valderrama
Lluís Terés
Digital
Systems
From Logic Gates to Processors
Digital Systems
Jean-Pierre Deschamps (cid:129) Elena Valderrama (cid:129)
Llu´ıs Tere´s
Digital Systems
From Logic Gates to Processors
Jean-PierreDeschamps ElenaValderrama
SchoolofEngineering Escolad’Enginyeria
RoviraiVirgiliUniversity CampusdelaUAB
Tarragona,Spain Bellaterra,Spain
Llu´ısTere´s
MicroelectronicsInstituteofBarcelona
IMB-CNM(CSIC)
CampusUAB-Bellaterra,Cerdanyola
Barcelona,Spain
ISBN978-3-319-41197-2 ISBN978-3-319-41198-9(eBook)
DOI10.1007/978-3-319-41198-9
LibraryofCongressControlNumber:2016947365
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Preface
Digital electronic components are present in almost all our private and
professionalactivities:
(cid:129) Our personal computers, our smartphones, or our tablets are made up of
digitalcomponentssuchasmicroprocessors,memories,interfacecircuits,
andsoon.
(cid:129) Digitalcomponentsarealsopresentwithinourcars,ourTVsets,oreven
inourhouseholdappliances.
(cid:129) They are essential components of practically any industrial
productionline.
(cid:129) Theyarealsoessentialcomponentsofpublictransportsystems,ofsecure
accesscontrolsystems,andmanyothers.
Wecouldsaythatanyactivityinvolving:
(cid:129) Theacquisitionofdatafromhumaninterfacesorfromdifferenttypesof
sensors
(cid:129) Thestorageofdata
(cid:129) Thetransmissionofdata
(cid:129) Theprocessingofdata
(cid:129) Theuseofdatatocontrolhumaninterfacesortocontroldifferenttypesof
actuators(e.g.,mechanicalactuators),canbeperformedinasafeandfast
waybymeansofDigitalSystems.
Thus, nowadays digital systems constitute a basic technical discipline,
essential to any engineer. That’s the reason why the Engineering School of
the Autonomous University of Barcelona (UAB) has designed an introduc-
tory course entitled “Digital Systems: From Logic Gates to Processors,”
available on the Coursera MOOC (Massive Open Online Course) platform.
ThisbookincludesallthematerialpresentedintheabovementionedMOOC.
Digitalsystemsareconstitutedofelectroniccircuitsmadeup(mainly)of
transistors.Atransistorisaverysmalldevice,similartoasimpleswitch.On
the other hand, a digital component, like a microprocessor, is a very large
circuit able to execute very complex operations. How can we build such a
complex system (a microprocessor) using very simple building blocks
v
vi Preface
(the transistors)? The answer to this question is the central topic of a
completecourseondigitalsystems.
This introductory course describes the basic methods used to develop
digital systems, not only the traditional ones, based on the use of logic
gatesandflip-flops,butalsomoreadvancedtechniquesthatpermittodesign
very large circuits and are based on hardware description languages and
simulationandsynthesistools.
Attheendofthiscoursethereader:
(cid:129) Will have some idea of the way a new digital system can be developed,
generallystartingfromafunctionalspecification;inparticular,she/hewill
beableto:
– Designdigitalsystemsofmediumcomplexity
– Describe digital systems using a high-level hardware description
language
– Understandtheoperationofcomputersattheirmostbasiclevel
(cid:129) Will know the main problems the development engineer is faced with,
duringtheprocessofdevelopinganewcircuit
(cid:129) Willunderstandwhichdesigntoolsarenecessarytodevelopanewcircuit
Thiscourseaddresses(atleast)twocategoriesofpeople:ontheonehand,
people interested to know what a digital system is and how it can be
developed and nothing else, but also people who need some knowledge
about digital systems as a previous step toward other technical disciplines,
suchascomputerarchitecture,robotics,bionics,avionics,andothers.
Overview
Chapter 1 gives a general definition of digital systems, presents generic
description methods, and gives some information about the way digital
systemscanbeimplementedundertheformofelectroniccircuits.
Chapter2isdevotedtocombinationalcircuits,aparticulartypeofdigital
circuit (memoryless circuit). Among others, it includes an introduction to
Booleanalgebra,oneofthemathematicaltoolsusedtodefinethebehaviorof
digitalcircuits.
In Chap. 3, a particular type of circuit, namely, arithmetic circuits, is
presented. Arithmetic circuits are present in almost any system so that they
deserve some particular presentation. Furthermore, they constitute a first
example of reusable blocks. Instead of developing systems from scratch, a
commonstrategyinmanytechnicaldisciplinesistoreusealreadydeveloped
parts. This modular approach is very common in software engineering and
canalsobeconsideredinthecaseofdigitalcircuits.Asanexample,thinkof
buildingamultiplierusingaddersandone-digitmultipliers.
Sequentialcircuits,whicharecircuitsincludingmemoryelements,arethe
topicofChap.4.Basicsequentialcomponents(flip-flops)andbasicbuilding
blocks (registers, counters, memories) are defined. Synthesis methods are
Preface vii
presented.Inparticular,theconceptoffinitestatemachines(FSM),amathe-
maticaltoolusedtodefinethebehaviorofasequentialcircuit,isintroduced.
As an example of the application of the synthesis methods described all
along in the previous chapters, the design of a complete digital system is
presented in Chap. 5. It is a generic system, able to execute a set of
algorithms, depending on the contents of a memory block that stores a
program. This type of system is called a processor, in this case a very
simpleone.
Thelasttwochaptersarededicatedtomoregeneralconsiderationsabout
design methods and tools (Chap. 6) and about physical implementations
(Chap.7).
All along the course, a standard hardware description language, namely,
VHDL,isusedtodescribecircuits.AshortintroductiontoVHDLisincluded
in Appendix A. In order to define algorithms, a more informal and not
executable language (pseudocode) is used. It is defined in Appendix B.
Appendix C is an introduction to the binary numeration system used to
representnumbers.
Tarragona,Spain Jean-PierreDeschamps
Bellaterra,Spain ElenaValderrama
Barcelona,Spain Llu´ısTere´s
Acknowledgments
Theauthorsthankthepeoplewhohavehelpedthemindevelopingthisbook,
especially Prof. Merce` Rulla´n who reviewed the text and is the author of
Appendices B and C. They are grateful to the following institutions for
providing them the means for carrying this work through to a successful
conclusion:AutonomousUniversityofBarcelona,NationalCenterofMicro-
electronics (CSIC, Bellaterra, Spain), and University Rovira i Virgili
(Tarragona,Spain).
ix
Contents
1 DigitalSystems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 DescriptionMethods. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.1 FunctionalDescription. . . . . . . . . . . . . . . . . . . . . 4
1.2.2 StructuralDescription. . . . . . . . . . . . . . . . . . . . . . 7
1.2.3 HierarchicalDescription. . . . . . . . . . . . . . . . . . . . 8
1.3 DigitalElectronicSystems. . . . . . . . . . . . . . . . . . . . . . . . 10
1.3.1 RealSystemStructure. . .. . . . . .. . . . .. . . . . .. . 10
1.3.2 ElectronicComponents. . . . . . . . . . . . . . . . . . . . . 11
1.3.3 SynthesisofDigitalElectronicSystems. . . . . . . . . 18
1.4 Exercises. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2 CombinationalCircuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.2 SynthesisfromaTable. . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3 BooleanAlgebra. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.3.1 Definition. . . .. . . . . . . . . . . .. . . . . . . . . . .. . . . 27
2.3.2 SomeAdditionalProperties. . . . . . . . . . . . . . . . . . 30
2.3.3 BooleanFunctionsandTruthTables. . . . . . . . . . . 31
2.3.4 Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.4 LogicGates. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.4.1 NANDandNOR. . . . . . . . . . . . . . . . . . . . . . . . . 35
2.4.2 XORandXNOR. . . . . . . . . . . . . . . . . . . . . . . . . 37
2.4.3 TristateBuffersandTristateInverters. . . . . . . . . . 41
2.5 SynthesisTools. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.5.1 RedundantTerms. . . . . . . . . . . . . . . . . . . . . . . . . 42
2.5.2 CubeRepresentation. . . . . . . . . . . . . . . . . . . . . . . 45
2.5.3 Adjacency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.5.4 KarnaughMap. . . . . . . . . . . . . . . . . . . . . . . . . . . 48
2.6 PropagationTime. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
2.7 OtherLogicBlocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.7.1 Multiplexers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.7.2 MultiplexersandMemoryBlocks. . . . . . . . . . . . . 58
2.7.3 Planes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
2.7.4 AddressDecoderandTristateBuffers. . . . . . . . . . 60
xi
xii Contents
2.8 ProgrammingLanguageStructures. . . . . . . . . . . . . . . . . . 62
2.8.1 IfThenElse. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
2.8.2 Case. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
2.8.3 Loops. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
2.8.4 ProcedureCalls. . . . . . . . . . . . . . . . . . . . . . . . . . 65
2.8.5 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
2.9 Exercises. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3 ArithmeticBlocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.1 BinaryAdder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.2 BinarySubtractor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.3 BinaryAdder/Subtractor. . . . . . . . . . . . . . . . . . . . . . . . . 71
3.4 BinaryMultiplier. . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . 72
3.5 BinaryDivider. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
3.6 Exercises. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4 SequentialCircuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1 IntroductoryExample. . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.2 Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.3 ExplicitFunctionalDescription. . . . . . . . . . . . . . . . . . . . 83
4.3.1 StateTransitionGraph. . . . . . . . . . . . . . . . . . . . . 83
4.3.2 ExampleofExplicitDescription
Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.3.3 NextStateTableandOutputTable. . . . . . . . . . . . 88
4.4 BistableComponents. . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.4.1 1-BitMemory. . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.4.2 LatchesandFlip-Flops. . . . . . . . . . . . . . . . . . . . . 91
4.5 SynthesisMethod. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.6 SequentialComponents. . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.6.1 Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.6.2 Counters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
4.6.3 Memories. . . .. . . . . . . . . . . .. . . . . . . . . . .. . . . 107
4.7 SequentialImplementationofAlgorithms. . . . . . . . . . . . . 113
4.7.1 AFirstExample. . . . . . . . . . . . . . . . . . . . . . . . . . 113
4.7.2 Combinationalvs.Sequential
Implementation. . . . . . . . . . . . . . . . . . . . . . . . . . 116
4.8 Finite-StateMachines. . . . . . . . . . . . . . . . . . . . . . . . . . . 119
4.8.1 Definition. . . .. . . . . . . . . . . .. . . . . . . . . . .. . . . 119
4.8.2 VHDLModel. . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.9 ExamplesofFinite-StateMachines. . . . . . . . . .. . . . . . . . 126
4.9.1 ProgrammableTimer. . . . . . . . . . . . . . . . . . . . . . 126
4.9.2 SequenceRecognition. . . . .. . . . .. . . . .. . . . .. . 129
4.10 Exercises. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
