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DIGITAL PRINCIPLES A D APPLICATIONS Seventh Edition Donald P Leach Santa Clara University Albert Paul Malvino President, Ma/vino Inc. Goutam Saha Associate Professor Department of Electronics and Electrical Communication Engineering Indian Institute of Technology (/IT) Kharagpur Tata McGraw Hill Education Private limited NEW DELHI McGraw-Hill Offices New Delhi New York St Louis San Francisco Auckland Bogota Caracas Kuala Lumpur Lisbon London Madrid Mexico City Milan Montreal San Juan Santiago Singapore Sydney Tokyo Toronto lffllTata McGraw-Hill Special Indian Edition 2011 Adapted in India by arrangement with the McGraw-Hill Compaines, Inc., New York Sales Territories: India, Pakistan, Nepal, Bangladesh, Sri Lanka and Bhutan Digital Principles and Applications, 7e First reprint 201 1 DZXCRRXGRQRQR Copyright© 2011, 2006, 1995, by The McGraw-Hill Companies, Inc. All Right reserved. No part of this publication may be reproduced or distributed in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise or stored in a database or retrieval system without the prior written permission of Tata McGraw-Hill Companies, Inc. including, but not limited to in any network or other electronic storage or transmission, or broadcast for distance learning. This edition can be exported from India only by the publishers, Tata McGraw Hill Education Private Limited. ISBN (13 digit): 978-0-07-014170-4 ISBN (10 digit): 0-07-014170-3 Vice President and Managing Director-McGraw-Hill Education: Asia-Pacific Region: Ajay Shukla Head-Higher Education Publishing and Marketing: Vibha Mahajan Manager: Sponsoring-SEM & Tech Ed: Shalini Jha Asst Sponsoring Editor: Surabhi Shukla Development Editor: Surbhi Suman Executive-Editorial Services: Sohini Mukherjee Jr Manager-Production: A11jali Razdan Dy Marketing Manager: SEM & Tech Ed: Biju Ganesan General Manager-Production: Rajender P Ghansela Asst General Manager-Production: B L Dogra Information contained in this work has been obtained by Tata McGraw-Hill, from sources believed to be reliable. However, neither Tata McGraw-Hill nor its authors guarantee the accuracy or completeness of any information published herein, and neither Tata McGraw-Hill nor its authors shall be responsible for any errors, omissions, or damages arising out ofuse of this information. This work is published with the understanding that Tata McGraw-Hill and its authors are supplying information but are not attempting.to render engineering or other professional services. If such services are required, the assistance of an appropriate professional should be sought. Typeset at Tej Composers, WZ 391, Madipur, New Delhi 110 063 and printed at Pashupati Printers Pvt. Ltd., 1/429/16, Gali No. 1, Friends colony, Industrial Area, G.T. Road, Shahdara, Delhi 110095 Cover Printer: SDR Printers Preface to the Seventh Edition (SIE) Preface 1. Digital Principles Contents 1.1 Definitions for Digital Signals 2 1.2 Digital Waveforms 4 1.3 Digital Logic 8 1.4 Moving and Storing Digital Infom1ation 13 1.5 Digital Operations 17 1.6 Digital Computers 22 1.7 Digital Integrated Circuits 26 1.8 Digital IC Signal Levels 32 Summmy 35 Glossary 35 Problems 36 2. Digital Logic 2.1 The Basic Gates-NOT, OR, AND 40 2.2 Universal Logic Gates-NOR, NAND 48 2.3 AND-OR-Invert Gates 57 2.4 Positive and Negative Logic 59 2.5 Introduction to HDL 61 Summary 68 Glossary 69 Problems 69 Laborat01y Experiment 7 3 3. Combinational Logic Circuits 3.1 Boolean Laws and Theorems 75 3.2 Sum-of-Products Method 81 3.3 Truth Table to Kamaugh Map 84 3.4 Pairs, Quads, and Octets 86 3.5 Kamaugh Simplifications 89 3.6 Don't-care Conditions 93 3.7 Product-of-sums Method 95 3.8 Product-of-sums Simplification 98 3.9 Simplification by Quine-McClusky Method 102 xi xv 1 40 74 3 .1 0 Hazards and Hazard Covers 104 3.11 HDL Implementation Models 108 Contents Problem Solving with Multiple Methods 110 Summary 111 Glossary 112 Problems 112 Laboratory Experiment 116 4. Data-Processing Circuits 4.1 Multiplexers 118 4.2 Demultiplexers 127 4.3 1-of-16 Decoder 130 4.4 BCD-to-decimal Decoders 133 4.5 Seven-segment Decoders 136 4.6 Encoders 138 4.7 Exclusive-OR Gates 141 4.8 Parity Generators and Checkers 143 4.9 Magnitude Comparator 146 4.10 Read-only Memory 148 4.11 Programmable Array Logic 154 4.12 Programmable Logic Arrays 156 4.13 Troubleshooting with a Logic Probe 158 4.14 HDL Implementation of Data Processing Circuits 159 Problem Solving with Multiple Methods 161 Summary 163 Glossary 163 Problems 164 Laboratory Experiment 169 5. Number Systems and Codes 5 .1 Binary Number System 171 5 .2 Binary-to-decimal Conversion 17 3 5 .3 Decimal-to-binary Conversion 17 6 5.4 Octal Numbers 179 5.5 Hexadecimal Numbers 183 5.6 The ASCII Code 190 5.7 The Excess-3 Code 192 5.8 The Gray Code 193 5.9 Troubleshooting with a Logic Pulser 194 5 .10 Error Detection and Correction 196 Problem Solving with Multiple Methods 198 Summary 199 Glossary 200 Problems 200 Laboratory Experiment 205 118 171 Contents 6. Arithmetic Circuits 6.1 Binary Addition 207 6.2 Binary Subtraction 211 6.3 Unsigned Binary Numbers 212 6.4 Sign-magnitude Numbers 214 6.5 2's Complement Representation 216 6.6 2's Complement Arithmetic 220 6.7 Arithmetic Building Blocks 226 6.8 The Adder-subtracter 228 6.9 FastAdder 232 6.10 Arithmetic Logic Unit 235 6.11 Binary Multiplication and Division 237 6.12 Arithmetic Circuits Using HDL 237 Problem Solving with Multiple Methods 239 Summary 240 Glossary 241 Problems 241 Laboratory Experiment 243 206 7. Clocks and Timing Circuits 244 7.1 Clock Waveforms 244 7.2 TTL Clock 249 7.3 Schmitt Trigger 250 7.4 555 Timer-Astable 253 7.5 555 Timer-Monostable 256 7.6 Monostables with Input Logic 258 7.7 Pulse-forming Circuits 262 Problem Solving with Multiple Methods 264 Summa,y 265 Glossary 266 Problems 266 Laborato,y Experiment 268 8. Flip-Flops 270 8.1 RS FLIP-FLOPs 271 8.2 Gated FLIP-FLOPs 276 8.3 Edge-triggered RS FLIP-FLOPs 279 8.4 Edge-triggered D FLIP-FLOPs 281 8.5 Edge-triggered JK FLIP-FLOPs 283 8.6 FLIP-FLOP Timing 285 8.7 Edge Triggering through Input Lock Out 286 8.8 JK Master-slave FLIP-FLOPs 288 8.9 Switch Contact Bounce Circuits 289 8.10 Various Representations of FLIP-FLOPs 290 8.11 Analysis of Sequential Circuits 293 Contents 8.12 Conversion ofFLIP-FLOPs: A Synthesis Example 296 8.13 HDL Implementation of FLIP-FLOP 298 Problem Solving with Multiple Methods 301 Summa;y 303 GlossaTJ' 303 Problems 304 Laborat01y Etperiment 306 9. Registers 9.1 Types of Registers 309 9 .2 Serial In-serial Out 310 9.3 Serial In-parallel Out 313 9 .4 Parallel In-serial Out 316 9.5 Parallel In-parallel Out 320 9.6 Universal Shift Register 324 9.7 Applications of Shift Registers 325 9.8 Register Implementation in HDL 333 Problem Solving with Multiple Methods 334 Summmy 335 Glossmy 336 Problen1s 336 Laborat01y Experiment 339 10. Counters 10.1 Asynchronous Counters 342 10.2 Decoding Gates 346 10.3 Synchronous Counters 349 10.4 Changing the Counter Modulus 357 10.5 Decade Counters 363 10.6 Presettable Counters 368 10.7 Counter Design as a Synthesis Problem 376 10.8 A Digital Clock 381 10.9 Counter Design using HDL 384 Problem Solving with Multiple Methods 386 Summary 387 Glossary 388 Problems 388 Laboratmy Experiment 390 11. Design of Synchronous and Asynchronous Sequential Circuits PART A: Design of Synchronous Sequential Circuit 393 11.1 Model Selection 393 11.2 State Transition Diagram 394 11.3 State Synthesis Table 396 11.4 Design Equations and Circuit Diagram 398 11.5 Implementation using Read Only Memory 400 308 341 392 Contents 11.6 Algorithmic State Machine 404 11. 7 State Reduction Technique 409 PART B: Asynchronous Sequential Circuit 413 11. 8 Analysis of Asynchronous Sequential Circuit 414 11.9 Problems with Asynchronous Sequential Circuits 417 11.10 Design of Asynchronous Sequential Circuit 419 11.11 FSM Implementation in HDL 423 Problem Solving with Multiple Methods 425 Summary 432 Glossary 432 Problems 433 Laboratory Experiment 435 12. D/ A Coversion and AID Conversion 438 12.1 Variable, Resistor Networks 439 12.2 Binary Ladders 442 12.3 DI A Converters 447 12.4. DI A Accuracy and Resolution 454 12.5 AID Converter-Simultaneous Conversion 455 12.6 AID Converter-Counter Method 458 12.7 Continuous ND Conversion 461 12.8 ND Techniques 464 12.9 Dual-slope AID Conversion 467 12.10 AID Accuracy and Resolution 471 Summary 472 Glossary 473 Problems 473 13. Memory 476 13.1 Basic Terms and Ideas 477 13.2 Magnetic Memory 479 13.3 Optical Memory 483 13.4 Memory Addressing 486 13.5 ROMs, PROMs, and EPROMs 491 13.6 RAMs 496 13.7 Sequential Programmable Logic Devices 503 13.8 Content Addressable Memory 506 Summary 507 Glossary 508 Problems 509 14. Digital Integrated Circuits 512 14.1 Switching Circuits 513 14.2 7400 TTL 518 14.3 TTL Parameters 520 14.4 TTL Overview 528 14.5 Open-collector Gates 530 14.6 Three-state TTL Devices 532 14.7 External Drive for TTL Loads 534 14.8 TTL Driving External Loads 537 14.9 74COO CMOS 538 14.10 CMOS Characteristics 541 14.11 TTL-to-CMOS Interface 544 14.12 CMOS-to-TTL Interface 546 14.13 Current Tracers 548 Summary 550 Glossary 551 Problems 552 Contents 15. A!)piications 558 15.l Multiplexing Displays 559 15.2 Frequency Counters 565 15.3 Time Measurement 570 15.4 Using the ADC0804 571 15.5 Microprocessor-compatible AID Converters 577 15.6 Digital Voltmeters 585 Summat)' 591 Problems 591 16. A Simple Computer Design 16.1 Building Blocks 594 16.2 Register Transfer Language 597 16.3 Execution oflnstructions, Macro and Micro Operations 599 16.4 Design of Control Unit 602 16.5 Programming Computer 605 Summary 612 Glossary 612 Problems 613 Appendix 1: Binary-Hexadecimal-Decimal Equivalents 615 Appendix 2: 2's Complement Representation 621 Appendix 3: TTL Devices 625 Appendix 4: CMOS Devices 628 Appendix 5: Codes 630 Appendix 6: BCD Codes 633 Appendix 7: Overview of IEEE Std. 91-1984, Explanation of Logic Symbols 638 Appendix 8: Pinout Diagrams 643 Appendix 9: Answers to Selected Odd-Numbered Problems 647 Index 593 672 Preface to the Seventh Edition (SIE) The seventh edition of Digital Principles and Applications continues with the upgradation of the work started in its previous edition. The job was to build upon the strengths of one of the best introductory and authentic texts in the field of Digital Electronics-its lucid language, down-to-earth approach, detailed analysis and ready-to-use information for laboratory practices. The sixth edition sought improvement primarily by (i) strengthening the design or synthesis aspect that included advanced material, such as a simple computer design, and (ii) incorporating many new topics like Hardware Description Language, Asynchronous Sequential Circuit, Algorithm State Machine chart, Quine-McClusky algorithm, Look Ahead Carry Adder, etc. The tremendous response to the improvements made in the sixth edition from the academic community prompted us to work on their suggestions and come out with this seventh edition. NEW TO THIS EDITION The seventh edition has been revised extensively and restructured to emphasize new and important concepts in Digital Principles and Applications. This edition increases the depth and breadth of the title by incorporat- ing latest infonnation on existing topics like BooleanAlgebra, Schmitt Trigger, 555 Timer, Edge Triggering, Memory Cell, Computer Architecture, and also introduces new topics like Noise Margin, Error Detection and Correction, Universal Shift Register and Content Addressable Memory. The most notable change in this edition is the inclusion of two completely new features-problem solving by multiple methods and laboratory experiments-that will enable the student community develop deeper understanding of the application side of digital principles. Problem solving by multiple methods help students in understanding and appreciating different alternatives to reach a solution, without feeling stuck at any point of time. Laboratmy experiments facilitate experimentation with different analysis and synthesis problems using digital integrated circuits (IC). Each experiment describes its aim, a short reference to theory, apparatus required and different work elements. THE BASIC FEATURES The new edition retains its appeal as a complete self-study guide for a first-level course on Digital Logic and Digital Circuits. It will serve the purpose of a textbook for undergraduate students of CSE, ECE, EEE, Electronics and Instrumentation and IT. It will also be a valuable reference for students of MCA, BCA, DOEACC 'A' Level, as well as BSc/MSc (Computer Science/IT). Preface to the Seventh Edition (SIE) The key features are: >- Presence of various applications and lab experiments considering the common digital circuit design employed in industries ( e.g., LCD display and ADC0804 operation). >- In-depth coverage of important topics like clock and timing circuits, DIA-AID conversion, register, counters and memory. >- Tutorial-based approach with section-end self test questions and problem solving through various methods. >- Useful discussion on TTL and CMOS devices and pin diagrams >- Rich Pedagogy • 180 Solved Examples • 290 Section-end Problems • 500 Chapter-end Problems COMPREHENSIVE WEBSITE An important addition to this title is the accompanying website-http://www.mhhe.com/leach!dpa7, designed to be an exhaustive Online Learning Centre (OLC). This website contains the following: For Students • Downloadable codes for HDL examples in the book • Supplementary Reading material Besides Quine-McClusky code and HDL examples, additional information and discussion on various supplementary materials like five-variable Karnaugh Map and Petrick's Algorithm will be available here. Regular updates on different topics of Digital Electronics will be posted to keep the reader informed about recent changes in this field. For Instructors Instructors who have adopted this textbook can access a password-protected section that offers the following resources. • Solution manual • Chapterwise PowerPoint slides with diagrams and notes ACKNOWLEDGEMENTS I would like to acknowledge the inspiration and support I received from Prof. B N Chatterji (Retd.), Prof. RN Pal (Retd.), Prof.RV Rajakumar, Prof. A Chakraborty, Prof.PP Chakraborty, Prof. D Datta, Prof. S Bannerjee, Prof. P K Biswas, Prof. S S Pathak, Prof. S Mukhopadhyaya, Prof. AS Dhar, Prof. I Chakraborty, Prof. P Mandal, Prof. S Mahapatra, Prof. T K Bhattacharya, and all my faculty colleagues at Indian Institute of Technology (IIT) Kharagapur, especially, from the Department of Electronics and Electrical Communica- tion Engineering and GS Sanyal School of Telecommunications. But for the paucity of space, I would have named many others. Preface to the Seventh Edition (SIE) Thanks are due to my research students-Mr S Ari, Mr Md Sahidullah, Mr Israj Ali, and Mr A Manda! for their contribution at different stages of development of the edition. I acknowledge the benefit derived from my interaction with different batches of students while teaching the Digital Electronics subject-three years at Institute of Engineering and Management, Kolkata and over six years at IIT Kharagpur. I am grateful to the esteemed reviewers for their encouraging comments and valuable suggestions for this edition. Sunil Mathur Maharaj a Agrasen Institute of Technology, New Delhi VKumar Maharaj a Surajmal Institute of Technology, New Delhi Bijoy Bandopadhyay University College of Science & Technology, Kolkata Anita Kanavalli MS Ramaiah Institute of Technology, Bangalore I also thank the entire team of Tata McGraw Hill Education, more specifically Vibha Mahajan, Shalini Jha, Ashes Saha, Surbhi Suman, Anjali Razdan and Baldev Raj for their support. At this point, I humbly remember all my teachers and my father (late) G N Saha who provided me a great learning environment. I also fondly recollect the contributions in my upbringing ofKharagpur Vivekananda Yuva Mahamandal, Vivekananda Study Circle, IIT Kharagpur Campus and Ramakrishna Mission. I must mention the support I always received from my family-my mother, my parents-in-law, my sisters (specially Chhordi), Chhoto Jamaibabu, and last but not the least, my wife, Sanghita, and daughter, Upasana. The effort behind this work was mine but the time was all theirs. GOUTAM SAHA Feedback Due care has been taken to avoid any mistake in the print edition as well as in the OLC. However, any note on oversight as well as suggestions for further improvement sent at

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