Digital Converters for Image Sensors

187 Pages·2015·7.529 MB·English

by  Kenton Veeder

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Tutorial Texts Series
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. OpticalEngineeringFundamentals,SecondEdition,BruceH.Walker,Vol.TT82
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. Logic-basedNonlinearImageProcessing,StephenMarshall,Vol.TT72
. ThePhysicsandEngineeringofSolidStateLasers,YehoshuaKalisky,Vol.TT71
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. ArtificialNeuralNetworks:AnIntroduction,KevinL.PriddyandPaulE.Keller,Vol.TT68
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. Diffractive Optics–Design, Fabrication, and Test, Donald C. O’Shea, Thomas J. Suleski, Alan D.
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Library of Congress Cataloging-in-Publication Data
Veeder, Kenton T.
Digital converters for image sensors / Kenton T. Veeder.
pages cm. – (Tutorial texts in optical engineering ; volume TT97)
Includes bibliographical references and index.
ISBN 978-1-62841-389-2
1. Image converters–Equipment and supplies. 2. Analog-to-digital converters.
3. Image processing–Digital techniques. I. Title.
TK8316.V44 2015
621.39'814–dc23
2014037575
Published by
SPIE
P.O. Box 10
Bellingham, Washington 98227-0010 USA
Phone: [phone]
Fax: [phone]
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Web: http://spie.org
Copyright © 2015 Society of Photo-Optical Instrumentation Engineers (SPIE)
All rights reserved. No part of this publication may be reproduced or distributed in
any form or by any means without written permission of the publisher.
The content of this book reflects the work and thoughts of the author(s). Every effort
hasbeenmadetopublishreliableandaccurateinformationherein,butthepublisheris
not responsible for the validity of the information or for any outcomes resulting from
reliance thereon.
Printed in the United States of America.
First printing
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Introduction to the Series
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James A. Harrington
Rutgers University
v
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Contents
Preface xi
Glossary of Acronyms and Abbreviations xiii
1 Introduction to Digital Image Sensors 1
1.1 Data Converters and Their History 1
1.2 Digital Image Sensors and Closely Related Integrated Circuits 2
1.3 Reasons To Use and Not Use On-Chip Analog-to-Digital Conversion 3
1.4 Parallelism 4
1.4.1 Serial architecture 5
1.4.2 Column-parallel architecture 7
1.4.3 Pixel-parallel architecture 8
1.5 Pseudo-differential Architectures 10
References 11
2 Converter Characteristics 13
2.1 Basics of Data Conversion 13
2.1.1 Sampling, Nyquist sampling, and oversampling 13
2.1.2 Resolution 14
2.1.3 Quantization and full-scale range 15
2.1.4 Quantization error 15
2.1.5 Converter coding 18
2.2 Converter Static Characteristics 19
2.2.1 Introduction to the transfer function 19
2.2.2 Accuracy and precision 20
2.2.3 Gain and offset errors 21
2.2.4 Integral nonlinearity 22
2.2.5 Differential nonlinearity 24
2.3 Converter Dynamic Characteristics 25
2.3.1 Settling and full-scale step response 26
2.3.2 Noise 26
2.3.3 Effects of static nonlinearity on noise 27
2.3.4 Distortion 27
2.3.5 Signal-to-noise ratio 29
2.3.6 Signal-to-noise and distortion ratio, and spurious free
dynamic range 30
vii
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viii Contents
2.3.7 Effective number of bits 32
2.3.8 Dynamic range for Nyquist and oversampled converters 33
2.4 Figures of Merit for ADCs on Imagers 34
2.4.1 Energy figures of merit 34
2.4.2 Data density 35
References 37
3 DACs Used in ADC Architectures and Read-in ICs 39
3.1 Resistor DACs 39
3.1.1 Resistor dividers 40
3.1.2 R-2R ladder DACs 42
3.2 Current-Steering DACs 44
3.2.1 Unary DACs 44
3.2.2 Binary DACs 44
3.2.3 DynamiccalibrationofDACcurrentelementsforhighresolution 45
3.2.4 Switching current elements for improved speed 46
3.3 Switched-Capacitor DACs 47
3.3.1 Capacitive divider 47
3.3.2 Charge redistribution 2-cap DACs 48
3.4 The Specialized Multiplying DAC 49
3.5 Combining Architectures 50
3.6 Characteristics Unique to Digital-to-Analog Converters 50
3.6.1 Pedestal error and droop 51
3.6.2 Glitches 51
References 52
4 ADC Architectures for Image Sensors 55
4.1 Flash ADC (Serial) 55
4.1.1 Interpolation 56
4.2 Folding Technique 57
4.3 Integrating and Sloping Architectures (Pixel and Column Parallel) 58
4.3.1 Single-slope ADC (pixel and column parallel) 59
4.3.2 Multislope ADCs (column parallel) 61
4.4 Successive Approximation ADCs (Column Parallel and Serial) 63
4.5 Sub-rangingandTwo-StepADCs(Serial,andColumnandPixelParallel) 66
4.6 Algorithmic or Cyclic ADCs (Column Parallel and Serial) 67
4.7 Pipeline ADCs (Column Parallel and Serial) 69
4.8 Time-to-Digital Converters (Serial, and Column and Pixel Parallel) 72
4.9 Voltage-ControlledOscillatorADCs(Serial,andColumnandPixelParallel) 74
4.10 Time-Interleaved ADCs (Column Parallel and Serial) 77
4.11 Oversampling Architectures 78
4.11.1 Oversampling with conventional ADCs (pixel and column
parallel, and serial) 78
4.11.2 Pulse frequency modulation ADCs (pixel parallel) 79
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Contents ix
4.11.3 Delta-sigma modulation ADCs (pixel and column parallel) 81
4.11.3.1 Delta-sigma ADCs for digital pixel sensors 83
4.12 Surveys of State-of-the-Art ADCs and Their Design Evolution
Convergence 84
4.12.1 What can be learned from state-of-the-art academic
publications 85
4.12.2 What can be learned from commercially available products 87
References 89
5 Case Study: Pipeline ADCs 95
5.1 Why the Pipeline ADC Is Worth a Special Case Study 95
5.2 Reasons for Image Sensor Professionals to Understand the
Pipeline ADC 96
5.3 Pipeline ADC Architecture 96
5.3.1 The ideal nine-bit structure and transfer function 98
5.3.2 Pipeline delay 100
5.4 Pipeline Pieces 101
5.5 Pipeline Errors and the Need for Redundancy 104
5.5.1 Offset and gain errors 104
5.5.2 Introduction to redundancy 106
5.5.3 An ideal nine-bit ADC with redundancy 109
5.5.4 Redundancy in the 1.5-bit-per-stage ADC and the stage
transfer function 109
5.6 The Real-World Transfer Function 110
5.7 Pipeline ADC Noise Calculations 112
5.7.1 The ADSC surprise 112
5.7.2 Total pipeline ADC noise 113
5.8 Pipeline Stage Optimization 113
5.9 Resource Sharing in Pipeline ADCs 115
References 116
6 Automatic Calibration and Error Correction 119
6.1 Analog Error Correction for the Pipeline ADC 120
6.1.1 MDAC gain trimming 120
6.2 Digitally Calibrating the Pipeline ADC 121
6.2.1 Digital foreground calibration 121
6.2.1.1 Digital self-calibration algorithm 122
6.2.1.2 16-bit digital self-calibration example 124
6.2.1.3 Look-up table values 129
6.2.1.4 Digital self-calibration for the 1.5-bit-per-stage ADC 130
6.2.1.5 Popular digital foreground calibration variants 131
6.2.2 ADC background calibration 132
6.3 ADC Calibration on Image Sensors 133
References 133
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x Contents
7 Testing ADCs on Image Sensors 135
7.1 Test Overview 135
7.1.1 IEEE Standard 1241-2010 135
7.1.2 ADC and image sensor test similarities 136
7.2 Steady State Input Tests 138
7.2.1 Gain error and offset 140
7.2.2 Servo or code edge tests 140
7.2.3 Noise contribution curve 141
7.2.4 Steady state input and linearity measurements 142
7.3 Dynamic Input Tests 143
7.3.1 Histogram testing 145
7.3.2 Linearity from histogram data 146
7.3.3 Noise for image sensor ADCs from dynamic signals 148
7.3.4 ADC and image sensor FSR matching 149
7.3.5 Full-scale step response 150
7.3.6 Out-of-range recovery 151
7.4 In Situ Test and Measurement 151
7.4.1 Power 151
7.4.2 Notes on testing and data acquisition 152
7.5 Built-In Test and Self-Test Circuits for Digital Image Sensors 154
7.5.1 Test taps and signal monitors 154
7.5.2 Self-calibrated ramp for linearity and SNDR 156
References 157
Appendix 159
Index 171
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