Digital Computer Arithmetic Datapath Design Using Verilog HDL

192 Pages·2003·1.24 MB·English

by  James E. Stine

Digital Computer Arithmetic
Datapath Design Using Verilog HDL

DIGITAL COMPUTER ARITHMETIC
DATAPATH DESIGN
JAMESE.STINE
KluwerAcademicPublishers
Boston/Dordrecht/London
Contents
Preface ix
1. MOTIVATION 1
1.1 WhyUseVerilogHDL? 1
1.2 Whatthisbookisnot: MainObjective 2
1.3 DatapathDesign 3
2. VERILOGATTHERTLLEVEL 7
2.1 Abstraction 7
2.2 NamingMethodology 10
2.2.1 GateInstances 11
2.2.2 Nets 12
2.2.3 Registers 12
2.2.4 ConnectionRules 13
2.2.5 Vectors 14
2.2.6 Memory 14
2.2.7 NestedModules 15
2.3 ForceFeedingVerilog: theTestBench 16
2.3.1 TestBenches 18
2.4 OtherOddsandEndswithinVerilog 19
2.4.1 Concatenation 19
2.4.2 Replication 21
2.4.3 WritingtoStandardOutput 21
2.4.4 StoppingaSimulation 21
2.5 Timing: ForWhomtheBellTolls 22
2.5.1 Delay-basedTiming 22
2.5.2 Event-BasedTiming 23
vi DIGITALCOMPUTERARITHMETICDATAPATHDESIGN
2.6 SynopsysDesignWareIntellectualProperty(IP) 24
2.7 Verilog2001 24
2.8 Summary 26
3. ADDITION 27
3.1 HalfAdders 28
3.2 FullAdders 28
3.3 RippleCarryAdders 30
3.4 RippleCarryAdder/Subtractor 31
3.4.1 CarryLookaheadAdders 34
3.4.1.1 BlockCarryLookaheadGenerators 36
3.5 CarrySkipAdders 40
3.5.1 OptimizingtheBlockSizetoReduceDelay 42
3.6 CarrySelectAdders 43
3.6.1 OptimizingtheBlockSizetoReduceDelay 46
3.7 PrefixAddition 47
3.8 Summary 52
4. MULTIPLICATION 55
4.1 UnsignedBinaryMultiplication 56
4.2 Carry-SaveConcept 56
4.3 Carry-SaveArrayMultipliers(CSAM) 60
4.4 TreeMultipliers 61
4.4.1 WallaceTreeMultipliers 61
4.4.2 DaddaTreeMultipliers 65
4.4.3 ReducedArea(RA)Multipliers 68
4.5 TruncatedMultiplication 71
4.6 Two’sComplementMultiplication 78
4.7 Signed-DigitNumbers 82
4.8 Booth’salgorithm 86
4.8.1 BitwiseOperators 87
4.9 Radix-4ModifiedBoothMultipliers 89
4.9.1 SignedRadix-4ModifiedBoothMultiplication 91
4.10 FractionalMultiplication 92
4.11 Summary 93
Contents vii
5. DIVISIONUSINGRECURRENCE 103
5.1 DigitRecurrence 104
5.2 QuotientDigitSelection 105
5.2.1 ContainmentCondition 106
5.2.2 ContinuityCondition 106
5.3 On-the-Fly-Conversion 108
5.4 Radix2Division 112
5.5 Radix4Divisionwithα = 2andNon-redundantResidual 115
5.5.1 RedundantAdder 118
5.6 Radix4Divisionwithα = 2andCarry-SaveAdder 119
5.7 Radix16DivisionwithTwoRadix4OverlappedStages 122
5.8 Summary 126
6. ELEMENTARYFUNCTIONS 129
6.1 GenericTableLookup 131
6.2 ConstantApproximations 133
6.3 PiecewiseConstantApproximation 134
6.4 LinearApproximations 136
6.4.1 RoundtoNearestEven 138
6.5 BipartiteTableMethods 141
6.5.1 SBTMandSTAM 142
6.6 ShiftandAdd: CORDIC 147
6.7 Summary 152
7. DIVISIONUSINGMULTIPLICATIVE-BASED
METHODS 161
7.1 Newton-RaphsonMethodforReciprocalApproximation 161
7.2 Multiplicative-DivideUsingConvergence 166
7.3 Summary 168
References 171
Index 179

Preface
TheroleofarithmeticindatapathdesigninVLSIdesignhasbeenincreasing
in importance over the last several years due to the demand for processors
that are smaller, faster, and dissipate less power. Unfortunately, this means
thatmanyofthesedatapaths willbecomplexbothalgorithmically andcircuit-
wise. Asthecomplexity ofthe chips increases, less importance willbeplaced
on understanding how a particular arithmetic datapath design is implemented
and more importance will be given to when a product will be placed on the
market. This is because many tools that are available today, are automated to
helpthedigital systemdesigner maximizetheir efficiently. Unfortunately, this
mayleadtoproblems whenimplementing particular datapaths.
The design of high-performance architectures is becoming more compli-
cated because the level of integration that is capable for many of these chips
is in the billions. Many engineers rely heavily on software tools to optimize
their work, therefore, as designs are getting more complex less understanding
isgoingintoaparticularimplementationbecauseitcanbegeneratedautomati-
cally. Althoughsoftwaretoolsareahighlyvaluableassettodesigner,thevalue
ofthesetoolsdoesnotdiminishtheimportance ofunderstanding datapath ele-
ments. Therefore,adigitalsystemdesignershouldbeawareofhowalgorithms
canbeimplementedfordatapathelements. Unfortunately, duetothecomplex-
ity of some of these algorithms, it is sometimes difficult to understand how a
particular algorithm isimplemented withoutseeing theactual code.
Thegoalofthistextistopresentbasicimplementations forarithmeticdata-
pathdesignsandthemethodologyutilizedtocreatethem. Therearenocontrol
modules, however, with proper testbench design it should be easy to verify
any of the modules created in this text. As stated in the text, this text is not
a book on the actual theory. Theory is presented to illustrate what choices
are made and why, however, a good arithmetic textbook is probably required
to accompany this text. Utilizing the Verilog code can be paramount along
with a textbook on arithmetic and architecture to make ardent strides towards
x DIGITALCOMPUTERARITHMETICDATAPATHDESIGN
understanding many of the implementations that exist for arithmetic datapath
design.
Wherever possible, structural models are implemented to illustrate the de-
sign principles. The importance for each design is on the algorithm and not
the circuit implementation. Both algorithmic and circuit trade-offs should be
adheredtowhenadesignisunderconsideration. Theideainthistextisimple-
ment each design at the RTL level so that it may be possibly implemented in
manydifferent ways(i.e. standard-cell orcustom-cell).
This text has been used partially as lecture notes for a graduate courses in
Advanced VLSI system design and High Speed Computer Arithmetic at the
Illinois Institute of Technology. Each implementation has been tested with
several thousand vectors, however, there may be a possibility that a module
might have a small error due to the volume of modules listed in this treatise.
Therefore, comments,suggestions, orcorrections arehighly encouraged.
I am grateful to many of my colleagues who have supported me in this
endeavor, asked questions, and encouraged me to continue this effort. In par-
ticular, Ithank MilosErcegovacand MikeSchulteforsupport, advice, andin-
terest. Therearemanyinfluentialworksintheareaofcomputerarithmeticthat
have spanned many years. The interested reader should consult frequent con-
ference on arithmetic such as the IEEE Symposium on Computer Arithmetic,
International Conference on Application-Specific Systems, Architectures, and
Processors (ASAP),Proceedings oftheAsilomarConference onSignals,Sys-
tems, and Computers, and the IEEE International Conference on Computer
Design(ICCD)amongothers.
Iwould also like to thank mystudents who helped withdebugging attimes
as well general support: Snehal Ajmera, Jeff Blank, Ivan Castellanos, Jun
Chen, Vibhuti Dave, Johannes Grad, Nathan Jachimiec, Fernando Martinez-
Vallina, and Bhushan Shinkre. In addition, a special thank you goes to Karen
BrenneratSynopsys, Inc. forsupporting thebook aswell.
I am also very thankful to the staff at Kluwer Academic Publishers who
have been tremendously helpful during the process of producing this book.
I am especially thankful to Alex Greene and Melissa Sullivan for patience,
understanding, and overall confidence in this book. I thank them for their
support ofmeandmyendeavors.
Last but not least, I wish to thank my wife, Lori, my sons, Justyn, Jordan,
Jacob,Caden,andmydaughterRachelwhoprovidedmewithsupportinmany,
manywaysincluding putting upwithmewhileIspentcountless hourswriting
thebook.
J.E.Stine