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Design of Analog Baseband Circuits for Wireless Communication PDF

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Preview Design of Analog Baseband Circuits for Wireless Communication

Design of Analog Baseband Circuits for Wireless Communication Receivers DISSERTATION Presented in Partial Fulfillment of the Requirements for the Degree Doctor of Philosophy in the Graduate School of The Ohio State University By Seoung Jae Yoo, B.S., M.S. * * * * * The Ohio State University 2004 Dissertation Committee: Approved by Mohammed Ismail ElNaggar, Adviser Joanne E. DeGroat Adviser Furrukh Khan Department of Electrical Engineering UMI Number: 3125107 ________________________________________________________ UMI Microform 3125107 Copyright 2004 by ProQuest Information and Learning Company. All rights reserved. This microform edition is protected against unauthorized copying under Title 17, United States Code. ____________________________________________________________ ProQuest Information and Learning Company 300 North Zeeb Road PO Box 1346 Ann Arbor, MI 48106-1346 c Copyright by (cid:13) Seoung Jae Yoo 2004 ABSTRACT This dissertation describes the design and implementation of analog baseband filter and variable gain amplifiers (VGA) for wireless communication receivers. Since discrete high-Q image rejection and IF filters are eliminated, fully integrated receiver architecture demands baseband filters and VGAs which exhibit high linearity and wide dynamic range. In this dissertation, baseband chains for WLAN receivers and base station application, and low voltage transresistance based filter and VGA are presented. For WLAN receiver, three different baseband chains are introduced in chapter 3. First baseband chain is designed based on the feed forward compensated amplifier. Since the amplifier demonstrates high gain bandwidth and phase margin, the opera- tion of filter is not affected by phase error and finite gain bandwidth of the amplifier. The feedforward compensated amplifier based filter and VGA are fabricated in 0.5µ CMOS technology and measured. Second baseband chain is designed based on fully differential buffer. The fully differential buffer shows the characteristics such as wide bandwidth, lowoutputimpedance, andhighlinearity, whicharerequiredinthedesign of wideband filter. Since identical buffer circuits are applied for the design of filter and VGA, design and optimization time are saved. This baseband chain is fabricated in 0.18 µ CMOS technology and test results are presented. Third baseband chain is designed based on the differential difference amplifier(DDA) and folded cascode ii amplifier. The DDA is used to implement wide band width buffer and folded cascode amplifier is used to design variable gain amplifier. The VGA of this baseband chain is fabricated in 0.5 µ CMOS technology and tested. In chapter 4, the band pass filter and VGA for basestation are presented. Since base station requires strong linearity and power compression behavior, the baseband chain must demonstrate high linearity and wide dynamic range. To achieve required linearity, power consumption is increased and the use of nonlinear components is minimized. Seven filter blocks and five attenuators are cascaded for the realization of the baseband chain. The baseband chain is fabricated in 0.5 µ CMOS technology. Finally, in chapter 5, the design of low voltage transresistance amplifier is pre- sented. The amplifier is operated with 1.8 V supply in 5 V CMOS technology. The amplifier is implemented to design Tow-Thomas filter and R2R ladder based VGA. The amplifier and VGA are fabricated in 0.5 µ CMOS technology and tested. iii This is dedicated to my wife and my parents iv ACKNOWLEDGMENTS I would like to express my utmost thanks and gratitude to Dr. Mohammed Ismail forproviding anopportunitytoperformresearch atAnalogVLSIlab., TheOhioState University. Without his guidance, this dissertation would not have been possible. He has helped me earn a lot of knowledge, and has given me confidence in my field of study. I would alos like to thank Prof. Joanne E. DeGroat and Prof. Furrukh Khan for being part of my candidacy examination and Ph. D. dissertation committee. I especially appreciate my wife and parents, who always support me and have made great sacrifice during my study. Without their support and sacrifice, I would not be able to finish my study. I would like to thank my colleagues at Analog VLSI Lab. I appreciate their support and suggestions on my work. v VITA March 6, 1971 ..............................Born - Seoul, Korea March, 1994 - June, 1998 ...................B.S. Electrical Engineering, The Ohio State University, Columbus, Ohio June, 1998 - June, 2000 .....................M.S. Electrical Engineering, The Ohio State University, Columbus, Ohio July, 2000 - Present ........................ Ph. D. Electrical Engineering, The Ohio State University, Columbus, Ohio January, 2000 - June, 2001 ..................Industrial Fellowship, by Nokia, Inc., Helsinki, Finland July, 2001 - Present ........................ Graudate Research Assistant, The Ohio State University, Columbus, Ohio FIELDS OF STUDY Major Field: Electrical Engineering Studies in Analog Microelectronics and IC Design: vi TABLE OF CONTENTS Page Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Dedication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Vita . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi Chapters: 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Analog Baseband Filter and VGA in Wireless Communication . . . 3 1.3 Channel Select Filtering and Tradeoffs . . . . . . . . . . . . . . . . 5 1.4 Organization of the Dissertation . . . . . . . . . . . . . . . . . . . 7 2. Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Receiver Architecture . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1.1 Superheterodyne receiver . . . . . . . . . . . . . . . . . . . 11 2.1.2 Direct Conversion Receiver . . . . . . . . . . . . . . . . . . 14 2.1.3 Wide-Band IF receiver . . . . . . . . . . . . . . . . . . . . . 18 2.1.4 Digital IF receivers . . . . . . . . . . . . . . . . . . . . . . . 20 2.2 Channel Selection Filters . . . . . . . . . . . . . . . . . . . . . . . 21 2.2.1 Channel Selection Filtering and ADC requirements . . . . . 22 2.3 CMOS Continuous Time Filters . . . . . . . . . . . . . . . . . . . . 27 vii 2.3.1 Active RC Filter . . . . . . . . . . . . . . . . . . . . . . . . 30 2.3.2 MOSFET-C Filter . . . . . . . . . . . . . . . . . . . . . . . 33 2.3.3 OTA-C filter . . . . . . . . . . . . . . . . . . . . . . . . . . 37 2.3.4 Tuning of filter . . . . . . . . . . . . . . . . . . . . . . . . . 40 3. Design of Filter and VGA for WLAN . . . . . . . . . . . . . . . . . . . . 45 3.1 FeedforwardcompensatedamplifierbasedfilterandVGAforWLAN application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.1.1 Feed forward compensation technique . . . . . . . . . . . . 47 3.1.2 Feed-forwardcompensateddifferentialdifferenceamplifier(DDA) 50 3.1.3 Design of active RC filter and VGA. . . . . . . . . . . . . . 54 3.1.4 Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 3.2 Fully differential buffer based filter and VGA for WLAN application 66 3.2.1 Fully differential buffer . . . . . . . . . . . . . . . . . . . . . 67 3.2.2 Design of the WLAN filter and VGA . . . . . . . . . . . . . 70 3.2.3 Test results . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 3.3 Folded cascode amplifier and DDA based WLAN VGA and filter . 84 3.3.1 Folded cascode amplifier and Fully differential buffer based on DDA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 3.3.2 DDA based filter and folded cascode amplifier based VGA . 89 3.3.3 Test results . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 4. Design of Filter and VGA for base station . . . . . . . . . . . . . . . . . 101 4.1 The base station architectures . . . . . . . . . . . . . . . . . . . . . 103 4.2 Design Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . 106 4.2.1 Filter and VGA Structure . . . . . . . . . . . . . . . . . . . 107 4.2.2 Trade off between Power consumption and dynamic range . 111 4.3 Design of Filter and VGA . . . . . . . . . . . . . . . . . . . . . . . 116 4.3.1 Fully differential buffer without common mode feedback . . 118 4.3.2 Design of the band pass filter . . . . . . . . . . . . . . . . . 120 4.3.3 Digitally programmable attenuators . . . . . . . . . . . . . 123 4.4 Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 5. Filter and VGA based on a Low Voltage Transresistance Amplifier . . . . 136 5.1 Low Voltage Transresistance Amplifier . . . . . . . . . . . . . . . . 137 5.2 Filter and Variable Gain Amplifier . . . . . . . . . . . . . . . . . . 146 5.3 Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 viii

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architecture demands baseband filters and VGAs which exhibit high linearity and wide dynamic Since identical buffer circuits are applied for the design of filter.
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