Computer-Aided Design of Analog Circuits and Systems

114 Pages·1993·3.734 MB·English

by  L. Richard Carley, Ronald S. Gyurcsik (auth.), L. Richard Carley, Ronald S. Gyurcsik (eds.)

COMPUTER-AIDED DESIGN OF
ANALOG CIRCUITS AND SYSTEMS
edited by
L. Richard Carley
Carnegie Mellon University
s.
Ronald Gyurcsik
International Business Machines
A Special Issue 01
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Reprinted from ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Val. 3, No. 3 (1993)
SPRINGER SCIENCE+BUSINESS MEDIA, LLC
THE KLUWER INTERNATIONAL SERIES
IN ENGINEERING AND COMPUTER SCIENCE
ANALOG CIRCUITS AND SIGNAL PROCESSING
Consulting Editor
Mohammed Ismail
Ohio State University
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Contents
0/
Special Issue on Computer-Aided Design
Analog Circuits and Systems
Guest Editors: L. Richard Carley and Ronald S. Gyurcsik
Guest Editors Introduction .......................... L. Richard Carley and Ronald S. Gyurcsik 1
Sframe: An Efficient System for Detailed DC Simulation of Bipolar Analog Integrated Circuits Using
Continuation Methods ...... Robert Melville, Shahriar Moinian, Peter Feldmann and Layne Watson 3
A Higher Level Modeling Procedure for Analog Integrated Circuits .......................... .
· . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. H. Alan Mantooth and Philip E. Allen 21
Ariadne: A Constraint-Based Approach to Computer-Aided Synthesis and Modeling of Analog
Integrated Circuits .............................................. K. Swings and W. Sansen 37
Analog Integrated Filter Compilation ................... R.K. Henderson, Li Ping and l./. Sewel 57
CAD Tools for the Synthesis and Layout of SC Filters and Networks ......................... .
· . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. Arnold Muralt, Paul Zbinden and George S. Moschytz 69
orA-C Biquad-Based Filter Silicon Compiler ..................................... ; ....... .
· ......................... Michael R. Kobe, &lgar S;mchez-Sinencio and laime Ramirez-Angulo 83
Design of Multibit Noise-Shaping Data Converters ........ lohn G. Kenney and L. Richard Carley 99
Library of Congress Cataloging-in-Publication Data
Computer-aided design of analog circuits and systems / edited by L.
Richard Carley, Ronald S. Gyurcsik.
p. cm. -- (The Kluwer international series in engineering and
computer science. Analog circuits and computer science)
Includes index.
ISBN 978-1-4613-6430-6 ISBN 978-1-4615-3252-1 (eBook)
DOI 10.1007/978-1-4615-3252-1
1. Linear integrated circuits--Design--Data processing.
') Computer-aided design. 1. Carley, L. Richard. H. Gyurcsik,
Ronald S. III. Series.
TK8974.C6454 1993
621.3815--dc20 93-17165
CIP
Copyright © 1993 by Springer Science+Business Media New York
Originally published by Kluwer Academic Publishers in 1993
Softcover reprint of the hardcover 1s t edition 1993
All rights reserved. No part of this publication may be reproduced, stored in
a retrieval system or transmitted in any form or by any means, mechanical,
photo-copying, recording, or otherwise, without the prior written pennission of
the publisher, Springer Science+Business Media, LLC.
Printed on acid-free paper.
Analog Integrated Circuits and Signal Processing 3, 161-162 (1993)
© 1993 Kluwer Academic Publishers, Boston. Manufuctured in The Netherlands.
Guest Editors' Introduction
We are happy to present this special issue on computer-aided design of analog circuits and systems, in the interna
tional journal of Analog Integrated Circuits and Signal Processing. We received 12 very good papers, and have
been able to accept 7 of these for publication in this special issue. The guest editors would like to thank the authors
for their excellent work and for their patience during the reviewing process. We are sure you will enjoy reading
through these fine papers.
On scanning this issue, the reader will find that there are two papers on the topic of simulation, one paper
about the synthesis of general analog circuits, three papers about filter synthesis, and one paper about the synthesis
of multi-bit noise-shaping data converters.
We begin with a paper by Melville, Moinian, Feldman, and Watson that addresses the use of continuation methods
to improve the robustness of dc analysis. In addition, they have implemented automatic generation of derivatives
from computer code for the analytical calculation of sensitivities. The second paper, ''A Higher Level Modeling
Procedure for Analog Integrated Circuits," by Mantooth and Allen, addresses the problems of abstracting higher
level models from circuit models in order to efficiently perform system level simulations. A manual method for
developing higher level models is presented that results in factors of 10-30 speed improvement over circuit simulation.
Next, we move from simulation to automatic synthesis. The third paper focuses on synthesis of general analog
circuits, while the following four papers focus on the synthesis of specific classes of analog circuits. The paper
by Swings and Sansen, presents the ARIADNE system for computer-aided synthesis and modeling of analog cir
cuits. One particularly unique feature of the ARIADNE system is its use of symbolic simulation in order to generate
model equations and its use of automatic tools to manipulate sets of equations into a form suitable for optimization.
The first filter synthesis paper is by Henderson, Ping, and Sewell and provides an excellent overview of the
current state of the art in the automatic design of analog integrated circuit filters, including a comparison of several
filter synthesis programs. The paper "CAD Tools for the Synthesis and Layout of SC Filters and Networks," by
Muralt, Zbinden, and Moschytz describes a specific set of tools that have been developed for the automatic syn
thesis of switched-capacitor discrete-time analog filters, including automatic generation of mask geometry. The
last filter synthesis paper, "OTA-C Biquad-Based Filter Silicon Compiler," is by Kobe, Sanchez-Sinencio, and
Ramirez-Angulo. It describes a filter compiler that generates continuous-time analog filters based on OTA-C (a.k.a.
Gm - C) building blocks.
The final paper, by Kenney and Carley, focuses on automating the design of the loop filter for multi-bit noise
shaping data converters. The paper develops a novel method for analytically predicting the stability of the multi-bit
noise-shaping converter and uses optimization techniques in order to carry out loop filter synthesis.
162 Carley and Gyurcsik
No photo or bio available for Ronald S. Gyurcsik.
L. Richard Carley is a professor of electrical and computer engineer
ing at Carnegie Mellon University. He received the S.B. degree from
the Massachusetts Institute of Technology in 1976 and was awarded
the Guillemin Prize for the best E.E. undergraduate thesis. He re
mained at MIT where he received the M.S. degree in 1978 and the
Ph.D. in 1984. He has worked for MIT's Lincoln Laboratories and
has acted as a consultant in the area of analog circuit design and design
automation for Analog Devices and Hughes Aircraft among others.
In 1984 he joined Carnegie Mellon, and in 1992 he was promoted
to full professor. His current research interests include the develop
ment of CAD tools to support analog circuit design, the design of
high-performance signal processing ICs employing analog circuit
techniques, and the design of low-power high-speed magnetic record
ing channels. He received a National Science Foundation Presiden
tial Young Investigator Award in 1985, a Best Technical Paper Award
at the 1987 Design Automation Conference, and a Distinguished Paper
Mention at the 1991 International Conference on Computer-Aided
Design. He is a senior member of the IEEE.
2
Analog Integrated Circuits and Signal Processing 3, 163-180 (1993)
© 1993 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.
Sframe: An Efficient System for Detailed DC Simulation of Bipolar Analog
Integrated Circuits Using Continuation Methods
ROBERT MELVILLE, SHAHRIAR MOINIAN AND PETER FELDMANN
AT&T Bell Laboratories, Murray Hill, NJ
LAYNE WATSON
Departments of Computer Science and Mathematics, Virginia Polytechnic Institute & State University, Blacksburg, VA 24061-0106
Abstract. This work describes a simulation package for detailed studies of biasing networks for bipolar tran
sistors. A sophisticated transistor model is introduced which captures many second-order effects, but which causes
convergence difficulties for many existing methods used for computing an operating point. Artificial parameter
numerical continuation techniques are introduced, then, as a robust and efficient means of solving bias networks
employing our model. Sensitivity studies and natural parameter continuation studies based on the computed operating
point (or points) are also discussed.
1. Introduction Highlights of our system include:
• Robust computation of the operating point of a circuit
Design analysis of high-performance analog integrated
using an efficient continuation method; moreover,
circuits requires detailed and accurate simulation of the
the method is able to detect multiple operating points.
dc behavior of the chip. Such analysis, which become
Generally speaking, continuation methods for
an even more integral part of the design for advanced
operating point computation have a reputation in the
bipolar transistor technologies, include: computation
simulation communitY for being too slow to be prac
of the dc operating point (or points) of the circuit; sen
tical for any but the smallest of circuits. One of the
sitivity studies of one or more outputs to one or more
conclusions of our work is that, when properly im
circuit parameters; design simulations at the extremes,
plemented, continuation techniques based on modem
dictated by variations in the fabrication process, and
homotopy algorithms for operating point computa
the electrical and environmental conditions in which
tion exhibit unsurpassed robustness with reasonable
the circuit will be operating, such as power supply and
cost.
temperature variations; analyses and optimization of
• A state-of-the-art four-terminal bipolar transistor dc
yield or performance in the face of statistical varia
model which treats various second-order effects not
tion of process parameters. Of course, such analyses
considered in simpler models. This model has been
are only as good as the underlying device models!
appropriately modified for use with continuation
In this paper we describe an experimental system
methods.
called Sframe which is being incorporated into the
• An "incremental" facility which allows the operat
design for manufacturability initiative at the Reading
ing point of a circuit to be updated quickly after a
Works of AT&T Bell Laboratories. Our system is able
relatively small change to one or more simulation
to perform detailed and accurate dc analyses of inte
parameters. This facility is especially useful for
grated circuits containing several hundred transistors
exploration of a "design space" during statistical
to be fabricated in a relatively complex junction isolated
optimization.
complementary technology.
• Parameter studies using continuation methods which
can identify qualitatively different operating modes
The work of the fourth author was supported in part by Department
of the circuit. The numerical codes used to perform
of Energy grant DE-FGOS-88ER2S068, National Science Founda
these studies are able to cope with turning points and
tion grant CTS-8913198, and Air Force Office of Scientific Research
grant 89--0497. folds in the solution manifold, which indicate more
3
164 Melville, Moinian, Feldmann and Uiltson
than one solution for parameter values in a certain All of our examples are taken from current industrial
interval. Such analysis provide insight into both the designs, and some of them are large by analog circuit
quantitative and qualitative behavior of the design. standards (e.g., several hundred transistors).
A facility for continuation to a target point allows
a designer to calculate the exact setting for a circuit
2. Continuation Methods in Simulation
parameter which causes an output variable to equal
a desired value. This is also useful in statistical
Continuation (homotopy) methods [4-6] provide both
design.
a theoretical and implementation basis for dc analysis
• Analytically correct dc sensitivity analyses of a user
of nonlinear networks. Consider the formulation of the
defined performance function to temperature, any
operating point equations using Kirchhoff's laws. In the
device model parameter or any circuit parameter.
so-called modified nodal formulation [7], one intro
Both direct and adjoint techniques are supported.
duces a voltage unknown for each node in the circuit,
These methods are superior to the perturbation
and an additional unknown for the current through each
technique, often used in simulators to estimate
voltage source, then writes an equation which expresses
senstivities, which are too slow and inaccurate for
Kirchhoff's current law at each node and Kirchhoff's
any but the simplest kinds of sensitivity analyses.
voltage law across each voltage source. This gives n
• A novel software architecture in which the user's cir
equations in n unknown voltages and currents.
cuit is described by defining appropriate classes in
The standard form for such equations is
C++. Sframe is designed in a highly modular
fashion, and different numerical codes can be in F(x, a) = 0 (1)
stalled quickly through narrow, well defined inter
where, for the fixed vector of parameters a, F (-, a)
faces. Moreover, the design of Sframe takes advan
is a mapping from Rn into Rn, the set of real n-vectors,
tage of so-called "automatic differentiation" tech
and x is a vector partitioned x = (i; v) for current and
niques which allow derivatives of model expressions
voltage unknowns. The m-vector a represents circuit
to be computed accurately in a fashion which is trans
parameters. These equations can be highly nonlinear
parent to the user. Such derivatives are needed for
and standard Newton-Raphson iteration [8] typically
continuation and sensitivity studies.
exhibits only local convergence. Therefore, we are moti
Section 2 describes the use of numerical continuation vated to consider more robust and globally convergent
methods in our program. A distinction between "artifi procedures for operating point computation. Continua
cial parameter" and "natural parameter" methods is tion theory considers an equation
drawn. The use of artificial parameter continuation for
H(x, /J-, a) = 0 (2)
computation of operating points has been described
elsewhere [1-3] so is reviewed here only briefly. Sec where x and a are as in (1) and the p -vector /J-represents
tion 2.1 describes the various continuation options pro one or more continuation parameters, so that H ( -, a)
vided. Section 2.2 discusses incremental operating in (2) is a mapping from Rn+p into Rn; i.e., there are
point computation, in which the operating point of a more unknowns than equations. In other words, the sys
circuit is to be updated after a relatively small change tem of equations is underdetermined. Thus, a "solution"
to one or more circuit parameters. to (2) is no longer a single point, but rather a curve
In Section 3, we motivate the need for a highly ac or surface in Rn+p. In the remainder of the paper, we
curate and detailed transistor model, and show how a will restrict ourselves to the case p = 1, and assume
continuation parameter is incorporated into the model that the parameter vector a in Rm is fixed. In the se
for robust and efficient operating point computation. quel, unless necessary, a will not be written explicitly.
Section 4 discusses automatic differentiation to device In the continuation paradigm, one designs a func
model equations, and shows how Sframe takes advan tion H such that a solution Xo to the equation H(x, /J-o)
tage of this technique to provide almost any conceivable = 0 is already known or easily obtained for some fixed
sensitivity information in a convenient fashion. In Sec value /J-o; i.e., H(xo, /J-o) = O. If, in addition, H is
tion 5, we describe our experience with writing a simu designed so thatH(x, /J-) = F(x) identically inx when
lation program in the C++ language, also using C++ /J- = /J-j, then a solution to H(x*, /J-j) = 0 provides a
as the input or "netlist" language. Finally, in Section solution to F(x*) = O. Examples of such a construc
6, performance data on several designs are presented. tion will be given later.
4
Sframe: An Efficient System 165
Assuming that such a solution exists, i.e., H(x', {tt) voltage (Vee) as the continuation parameter, {t, and
= 0, supporting theory [9-11] shows that in most "sweep" {t from 0 to 6 V. Figure 2a shows the com
cases, under reasonable assumptions about the smooth plete solution to H(x, {t) = 0 for this example, in which
ness of H and the choice of a, the points (xo, {to) and x is the dc state vector of the circuit. At a critical value
(x', {tt) are connected by a path in (n + 1) of {t (about 0.7 V) the operating point equations exhibit
dimensional space. With a fixed, we can compute x' a bifurcation [14]. The three branches to the right of
by "tracking" this path in (n + I)-dimensional (x, {t) the critical point represent the two stable states of the
space. To take a simple example, suppose that {t flip-flop along with the metastable state. The bifurcation
represents the ambient temperature of a circuit. For {to
= 25°C, a solution to H(x, {to) = 0 represents an
operating point of the circuit at room temperature,
where {t has the dimension of degrees Centigrade. As
{t is varied from 25°C to an elevated temperature, say
50°C, the solution to H(x, {t) = 0 tracks the state of
the circuit at each temperature. Vee Vee
Packaged numerical codes are available to ac Ca) (b)
complish this "curve tracking," i.e., to generate a set Fig. 2. Bifurcation diagrams for symmetric flip-flop.
of points (x, {t) which satisfy H(x, {t) = 0 for {t in the
interval [{to, {ttl and a fixed a. The user supplies an diagram of figure 2a is valid only if the circuit is ex
actly balanced; if there is any asymmetry in the cir
initial point (xo, {to, a), then the curve tracking
cuit, then the bifurcation diagram becomes the unfolded
algorithm takes over. It predicts a local direction vec
tor "along the curve" by evaluating the Jacobian matrix diagram of figure 2b; the bifurcation is gone, and only
of H with respect to x and {t. Iterative application of one solution is accessible from the start state Xo. Such
an unfolding can be accomplished by suitable choice
a predictor-corrector scheme allows the algorithm to
track the curve until {t = {tt. Sophisticated packages, of the parameter vector a mentioned above. For exam
such as HOMPACK [11-12] or PITCON [13], dynam ple, suppose a encodes the values of the resistors and
the scales of the transistors in the circuit. Any physical
ically adjust their step length to adapt to changes in the
realization of the circuit will incur some imbalance in
curvature of the path.
these values which can be modeled by appropriate slight
In order to use such packages, the user must supply
a numerically accurate Jacobian matrix. This matrix perturbations in the a vector.
Another possibility, quite common in analog circuits,
is of the form
aH is a turning point. Consider the circuit of figure 3 taken
[
(3) from Ref. 15, in which the value of the input voltage
ax
is the continuation parameter {t. The output is taken
evaluated at a point (x, {t) along the solution path. Our as the current through this source, and is shown plot
computational experience with dc analyses of bipolar ted against the source voltage. Note that for {t in a cer
tain interval, the circuit exhibits more than one solu
networks indicates the finite-difference approximations
tion. At the end points of this interval, the solution
to this Jacobian matrix are inefficient and unreliable.
manifold turns back on itself. This discussion is meant
The notion of "sweeping" a parameter is intuitive,
to show that the notion of "sweeping" might be a bit
but can be misleading. Consider the symmetric flip
flop shown in figure 1. Suppose we treat the supply more complicated than it first appears. Turning points
and (less often) bifurcations which are not unfolded do
come up in practical analog circuit designs!
RCl=RC2=U< Rei RC2
RB1=RB2=2a<
6.0 VOlta 2.1. Artificial Parameter Continuation for Operating
v Point Computation
In the above examples, the continuation parameter has
a natural circuit interpretation-voltage, temperature,
Fig. 1. Symmetric flip-flop. etc. The Vee continuation of figure 2 can be interpreted
5
166 Melville, Moinian, Feldmann and Uiltson
13mA
+
15k
'"
80k
1k
OA
OV Port voltage 25V
Fig. 3. Negative resistance circuit.
as an operating point computation starting from the equals zero, the model degenerates into a pair of back
trivial point of zero supply voltage and ending when to-back diodes. The transistor model actually used in
the supply is "fully on." Because of the bifurcation, Sframe is much more complicated than figure 4, how
a numerical method used to track the solution manifold ever the continuation parameter is introduced into the
may falter at the point of the bifurcation, or (more complex model in much the same way; the detailed con
likely) continue on through this point to the metastable struction is described in Section 3.
state of the flip-flop. Neither of these situations is Suppose we wish to find the operating point of a
desirable. Instead, Sframe uses the notion of artificial bipolar network containing transistors, diodes, resistors,
parameter continuation to find an operating point. In and independent sources. Imagine all the transistors
this technique a parameter which need not have an ob with the continuation parameter introduced as in figure
vious circuit interpretation is introduced into one or 4. Now, consider_the circuit when A is set to zero. This
more nonlinear element models. Artificial parameter so-called start system has a unique operating point, and
methods [10-11] generate smooth, bifurcation free it is easy to solve. In fact, it can be shown that the
paths which can be traversed quickly to the desired operating point equations are a diffeomorphism when
operating point. A is zero [2]. Thus, norm-reducing Newton methods
As in the Vee continuation above, the computation [8, 16] work quite well, typically solving the circuit
of an operating point when the artificial parameter is in a reasonable number of iterations (less than 30 for
set to zero is trivial; moreover, when the artificial all the examples presented in Section 6). After solving
parameter reaches a value of one, the circuit has been the start system, use a continuation procedure to ad
retured to its original state. Consider, for example, the vance A to 1; at this point, the transistor models are
standard Ebers-Moll transistor model [36] of figure 4. back to their original state. Points along the continua
A continuation parameter A has been introduced which tion path, for values of A less than one, do not have
multiplies the current gains of the transistor. When A much meaning to a designer, since they represent states
of a circuit with a modified transistor model. Hence
the term "artificial" parameter. As a notational con
vention, we use A for such an artificial parameter, rather
Vac than J1-.
11..
- + UF IF A problem with this construction arises if two trans
la
istors are connected in a "cascode" configuration, with
t
the collector of one transistor connected to the collec
+ I.. UR IR
tor of another. When A is set to zero, the transistors
VaE
become simply a pair of diodes; in the cascode config
uration, two diodes are connected anode to anode,
which results in a node which is effectively discon
Fig. 4. Ebers-Moll model with continuation parameter. nected from the rest of the circuit. This problem is
6