Compilation Techniques for Reconfigurable Architectures PDF
230 Pages·2009·3.01 MB·English
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Description:
This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques have been developed in the context of compilation for traditional architectures and high-level synthesis, their application to reconfigurable architectures poses a whole new set of challenges- particularly when targeting fine-grained reconfigurable architectures such as contemporary Field-Programmable Gate-Arrays (FPGAs).Organized in eight chapters, this book provides a helpful structure for practitioners and graduate students in the area of computer science and electrical and computer engineering to effectively map computations to reconfigurable architectures. Key Features:Introduces the reader to hardware compilation and reconfigurable computing architectures.Presents a range of compiler code transformations and mapping techniques focusing on imperative programming languages.Allows the reader to bridge the gap between the software compilation and the hardware compilation and synthesis domains.Brings a number of compilation techniques together into one structured source, and includes representative examples of their applications.Provides a historical perspective on representative compilation research efforts over the last 15 years.
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