Table Of Content

Biolding a Successful Board-Test Strategy This page intentionally left blank Building a Successful Board- Test Strategy Second Edition Stephen F. Scheiber B U T T E R W O R TH E I N E M A N N Boston Oxford Johannesburg Melbourne New Delhi Newnes is an imprint of Butterworth-Heinemann. Copyright © 2001 by Butterworth-Heinemann A member of the Reed Elsevier group All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the publisher. Some material contained herein is derived from IEEE Std. 1014-1987, IEEE Standard for Versatile Backplane Bus: VMEbus, IEEE Std. 1049.1-1990, IEEE Standard Test Methods and Boundary-Scan Architecture, and IEEE Std. 1 1 55-1 992, IEEE Standard VMEbus Exten- sions for Instrumentation: VXIbus, copyrights by the Institute of Electrical and Electronics Engineers, Inc. The IEEE takes no responsibility for and will assume no liability for damages resulting from the reader's misinterpretation of said information resulting from the placement and context in this publication. Information is reproduced with the permission of the IEEE. ©Recognizing the importance of preserving what has been written, Butterworth-Heinemann prints its books on acid-free paper whenever possible. Library of Congress Cataloging-in-Publication Data Scheiber, Stephen F. Building a successful board-test strategy / Stephen F. Scheiber. p. cm. Includes bibliographical references and index. ISBN 0-7506-7280-3 (pbk. : alk. paper) 1. Printed circuits-Testing. I. Title. TK7868.P7S34 2001 621.3815'310287-dc21 2001032680 British Library Cataloguing-in-Publication Data A catalogue record for this book is available from the British Library. The publisher offers special discounts on bulk orders of this book. For information, please contact: Manager of Special Sales Butterworth-Heinemann 225 Wildwood Avenue Woburn, MA 01 801-2041 Tel: 781-904-2500 Fax: 781-904-2620 For information on all Newnes publications available, contact our World Wide Web home page at: http://www.newnespress.com 10 9 8 7 6 5 4 3 21 Printed in the United States of America Contents Preface to the Second Edition x Chapter 1 What Is a Test Strategy? I 1.1 Why Are You Here? 3 1.2 It Isn't Just Testing Anymore 3 1.3 Strategies and Tactics 4 1.3.1 The First Step 5 1.3.2 Life Cycles 6 1.4 The Design and Test Process 9 1.4.1 Breaking Down the Walls 10 1.4.2 Making the Product 15 1.4.3 New Challenges 16 1.5 Concurrent Engineering Is Not Going Away 17 1.6 The Newspaper Model 21 1.6.1 Error Functions 21 1.6.2 What Do You Test? 23 1.6.3 Board Characteristics 26 1.6.4 The Fault Spectrum 28 1.6.5 Other Considerations 34 1.6.6 The How of Testing 37 1.7 Test-Strategy Costs 39 1.7.1 Cost Components 40 1.7.2 Committed vs. Out-of-Pocket Costs 43 1.8 Project Scope 44 1.9 Statistical Process Control 46 1.10 Summary 50 Chapter 2 Test Methods 53 2.1 The Order-of-Magnitude Rule 53 2.2 A Brief (Somewhat Apocryphal) History of Test 55 2.3 Test Options 58 2.3.1 Analog Measurements 59 vi BUILDING A SUCCESSFUL BOARD-TEST STRATEGY 2.3.2 Shorts-and-Opens Testers 60 2.3.3 Manufacturing-Defects Analyzers 61 2.3.4 In-Circuit Testers 62 2.3.5 Bed-of-Nails Fixtures 68 2.3.6 Bed-of-Nails Probe Considerations 71 2.3.7 Opens Testing 76 2.3.8 Other Access Issues 79 2.3.9 Functional Testers 80 2.3.10 Functional Tester Architectures 83 2.3.11 Finding Faults with Functional Testers 88 2.3.12 Two Techniques, One Box 91 2.3.13 Hot-Mockup 92 2.3.14 Architectural Models 93 2.3.15 Other Options 96 2.4 Summary 96 Chapter 3 Inspection as Test 97 3.1 Striking a Balance 98 3.2 Post-Paste Inspection 101 3.3 Post-Placement/Post-Reflow 103 3.3.1 Manual Inspection 107 3.3.2 Automated Optical Inspection (AOI) 108 3.3.3 Design for Inspection 111 3.3.4 Infrared Inspection—A New Look at an Old Alternative 111 3.3.4.1 A New Solution 113 3.3.4.2 Predicting Future Failures 114 3.3.4.3 The Infrared Test Process 115 3.3.4.4 No Good Deed ... 116 3.3.5 The New Jerusalem?—X-Ray Inspection 117 3.3.5.1 A Catalog of Techniques 121 3.3.5.2 X-Ray Imaging 122 3.3.5.3 Analyzing Ball-Grid Arrays 124 3.4 Summary 128 Chapter 4 Guidelines for a Cost-Effective "Test" Operation 129 4.1 Define Test Requirements 129 4.2 Is Automatic Test or Inspection Equipment Necessary? 133 4.3 Evaluate Test and Inspection Options 134 4.4 The Make-or-Buy Decision 137 4.5 Getting Ready 138 4.6 Programming—Another Make-or-Buy Decision 140 4.7 The Test Site 143 4.8 Training 144 4.9 Putting It All in Place 145 Contents vii 4.10 Managing Transition 147 4.11 Other Issues 149 4.12 Summary 149 Chapter 5 Reducing Test-Generation Pain with Boundary Scan 151 5.1 Latch-Scanning Arrangements 151 5.2 Enter Boundary Scan 153 5.3 Hardware Requirements 158 5.4 Modes and Instructions 161 5.5 Implementing Boundary Scan 163 5.6 Partial-Boundary-Scan Testing 166 5.6.1 Conventional Shorts Test 167 5.6.2 Boundary-Scan Integrity Test 167 5.6.3 Interactions Tests 168 5.6.4 Interconnect Test 169 5.7 Other Alternatives 170 5.8 Summary ' 172 Chapter 6 The VMEbus extension for Instrumentation 173 6.1 VME Background 6.2 VXI Extensions 6.3 Assembling VXI Systems 6.4 Configuration Techniques 6.5 Software Issues 6.6 Testing Boards 6.7 The VXIbus Project 6.8 Yin and Yang 6.9 Summary Chapter 7 Environmental-Stress Screening 199 7.1 The "Bathtub Curve" 199 7.2 What Is Environmental-Stress Screening? 201 7.3 Screening Levels 202 7.4 Screening Methods 202 7.4.1 Burn-in 202 7.4.2 Temperature Cycling 204 7.4.3 Burn-in and Temperature-Cycling Equipment 206 7.4.4 Thermal Shock 207 7.4.5 Mechanical Shock and Vibration 208 7.4.6 Other Techniques 210 7.4.7 Combined Screens 210 7.5 Failure Analysis 212 7.6 ESS Costs 212 viii BUILDING A SUCCESSFUL BOARD-TEST STRATEGY 7.7 To Screen or Not to Screen 213 7.8 Implementation Realities 214 7.9 Long-Term Effects 215 7.10 Case Studies 217 7.10.1 Analogic 217 7.10.2 Bendix 217 7.10.3 Hewlett-Packard (now Agilent Technologies) 218 7.11 Summary 218 Chapter 8 Evaluating Real Tester Speeds 219 8.1 Resolution and Skew 220 8.2 Voltage vs. Time 222 8.3 Other Uncertainties 224 8.4 Impact of Test-Method Choices 225 8.5 Summary 228 Chapter 9 Test-Program Development and Simulation 230 9.1 The Program-Generation Process 230 9.2 Cutting Test-Programming Time and Costs 232 9.3 Simulation vs. Prototyping 236 9.4 Design for Testability 237 9.5 Summary 239 Chapter 10 Test-Strategy Economics 241 10.1 Manufacturing Costs 242 10.2 Test-Cost Breakdown 243 10.2.1 Startup costs 244 10.2.2 Operating costs 246 10.2.3 Maintenance and Repair 248 10.3 Workload Analysis 249 10.4 An Order-of-Magnitude Rule Counterexample 251 10.5 Comparing Test Strategies 253 10.6 Break-Even Analysis 256 10.6.1 Payback Period 257 10.6.2 Accounting Rate of Return 258 10.6.3 The Time Value of Money 259 10.6.4 Net Present Value 260 10.6.5 Internal Rate of Return 262 10.7 Estimating Cash Flows 263 10.8 Assessing the Costs 264 10.9 Summary 265 Contents tx Chapter 11 Formulating a Board-Test Strategy 266 11.1 Modern Tester Classifications 267 11,2 Establishing and Monitoring Test Goals 268 11.3 Data Analysis and Management 270 11.4 Indicators of an Effective Strategy 273 11.5 Yin and Yang in Ease of Tester Operation 274 11.6 More "Make-or-Buy" Considerations 275 11.7 General-Purpose vs. Dedicated Testers 278 11.8 Used Equipment 279 11.9 Leasing 280 11.10 "Pay as You Go" 281 11.11 Other Considerations 282 11.12 The Ultimate "Buy" Decision—Contract Manufacturing 282 11.13 Summary 285 Chapter 12 Test-Strategy Decisions 286 12.1 A Sample Test Philosophy 286 12.2 Big vs. Small 288 12.3 Do You Need a High-End Tester? 290 12.4 Assembling the Strategy 291 12.5 The Benefits of Sampling 294 12.6 Tester Trends 295 12.7 Sample Strategies 297 12.8 A Real-Life Example 301 12.9 Changing Horses 304 12.10 Summary 305 Chapter 13 Conclusions 307 Appendix A Time-Value-of-Money Tables 309 Appendix B Acronym Glossary 318 Works Cited and Additional Readings 321 Index 329