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ARIES: Using Annular-Ring Embedded Resistors to Set Capacitor ESR in Power Distribution Networks Valerie St. Cyr*, Istvan Novak*, Nick Biunno**, Jim Howard** *SUN Microsystems, Inc. One Network Drive, MS UBUR03-205, Burlington, MA 01803 Tel: (781) 442 0982, fax: (781) 442 1575 ** Sanmina/Hadco 445 El Camino Real, Santa Clara, CA Tel: (408) 557 7546, fax: (408) 557 7800 St.Cyr,Novak, Biunno, Howard ARIES 1 EPEP, October 2001 Outline • Introduction • Distributed Matched Bypassing • Annular Buried Resistor • ARIES • Test board performance • Implementation • Conclusions St.Cyr,Novak, Biunno, Howard ARIES 2 EPEP, October 2001 Dictionary • DMB = Distributed Matched Bypassing • ABR = Annular Buried Resistor • ARIES = Annular Resistive Interstitial Element, Screened-in St.Cyr,Novak, Biunno, Howard ARIES 3 EPEP, October 2001 Distributed Matched Bypassing (1) log Z first capacitor bank second capacitor bank power source L = = R R 2 (w *C )-1 1 2 1 w C *L 1 2 • DET R R 2 1 • EAVP • AVP f f log f 23 12 St.Cyr,Novak, Biunno, Howard ARIES 4 EPEP, October 2001 Distributed Matched Bypassing (2) • Elements: – Power-ground planes over (thin) laminate – A small number of SAME VALUE capacitors (2.2UF IDC) – Few bulk capacitors • Controlled-ESR capacitors • Smooth impedance profile • Suppresses plane resonances, and • Avoids antiresonances among – Capacitors, and – Capacitors and planes St.Cyr,Novak, Biunno, Howard ARIES 5 EPEP, October 2001 Distributed Matched Bypassing (3) • Conventional designs use C, ESR and ESL Resonances depend on all three >> – Hard to simulate all combinations – ESR for present capacitors cannot be specified • DMB relies on a user-defined series resistance (ABR) of bypass capacitors – Lowest number of capacitors – Straightforward positioning – C and ESL variations matter much less – Fewer combinations >>more predictable result – Components are equal >> increased reliability >> shared dissipation St.Cyr,Novak, Biunno, Howard ARIES 6 EPEP, October 2001 ABR Annular Buried Resistor Plane Resistor Pad Via D2 D1 T St.Cyr,Novak, Biunno, Howard ARIES 7 EPEP, October 2001 ARIES Annular Resistive Interstitial Element, Screened-in Eight-terminal capacitor Top metal layer GND layer PWR layer Printed resistors • Blind vias • 130-180pH loop inductance St.Cyr,Novak, Biunno, Howard ARIES 8 EPEP, October 2001 Test Board • 10”x5” outline • 2 pairs of 2-mil cores • 1” square grid test points (PTH) • Offset 1” square grid for ARIES St.Cyr,Novak, Biunno, Howard ARIES 9 EPEP, October 2001 Test Board Impedance Log-Log Impedance magnitude [ohm] 1.E+00 No-R With-R Bare 1.E-01 Self impedance 2”x2” from corner 1.E-02 1.E-03 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 Frequency [Hz] St.Cyr,Novak, Biunno, Howard ARIES 10 EPEP, October 2001
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