An FPGA Based Enterprise SSD Reference Design Amit Saxena, VP, Engineering PDF
Preview An FPGA Based Enterprise SSD Reference Design Amit Saxena, VP, Engineering
PCIe Gen4 Based Configurable NVMe SSDC Platform Amit Saxena, VP, Engineering “The IP enabled solutions provider” Agenda • PCIe Gen4 based Configurable NVMe SSDC Platform • Design Challenges • Configurable IP Components • Mobiveil Subsystem Solutions • RISC-V Based IoT SoC Platform • Flash Characterization Platform • Summary Copyright Mobiveil, Inc. 2 Mobiveil Configurable NVMe SSDC Platform Device • GPEX – Mobiveil PCIe Gen4.0 FW ARM Core UMMC controller DDR4 PCIe Controller • UNEX –Mobiveil Multiport NVMe Controller • EFC –Mobiveil Enterprise Flash Controller MCC EFC-0 • UMMC – Mobiveil Memory PCIe PCIe Medi L Flash Controller Gen4 PHY DaM Medi D EFC-1 A a GPEX DMMedi UNEX ADaM Me P EFC-2 • MCC - Media Control Cluster ADdiMa C A EFC-n On Chip Data Path On Chip Control Path Copyright Mobiveil, Inc. 3 Mobiveil Configurable NVMe SSDC Platform Copyright Mobiveil, Inc. 4 Unique Subsystem Development Solution • Provides Full NVMe Based Reference Design Using Mobiveil’s Controllers • PCIe Gen4.0 PCIe Controller (GPEX) • Multiport NVMe (UNEX) • LDPC • Enterprise Flash Controller (EFC) • UMMC • Media Control Cluster • Reference FW is also provided • Allows various Flash parts to be used • Customer can add their custom value add in SW or HW Copyright Mobiveil, Inc. 5 IP Design Challenges • Flexible enough to support various requirements • Should be able to handle various target technologies and meet performance targets • Should allow customization for individual implementations • Should provide hooks for SW debug and control • Design Reuse is critical Copyright Mobiveil, Inc. 6 Feature Configurability PCIe NVMe • Number of Virtual Channels • Multipath IO Support • SRIOV Needed • LBA Size • Bifurcation Support • Number of IO Queues • DMA Needed • Vendor Command Support • INT/MSI/MSIX Support • Optional Feature Support • SRNS/SRIS • Vendor specific Arbitration ECC Flash Controller • BCH/LDPC • ONFI/Toggle IF • Code Rate • Full Rate/Half rate/Quarter Rate Support • Programmable Padding/Puncturing • Custom Command Support • User Defined LDPC Matrix • Number of LUNs • Single/Dual Core • Command Arbitration LUN Based • Soft Read Procedure • Suspend/Resume Support Copyright Mobiveil, Inc. 7 Implementation Challenges HW/SW Partitioning Clock Frequency Efficient Buffering Processor Data Path Width Dependency Support Throughput Interfacing with 3rd Balancing Party IPs Interfacing with 3rd Party VIPs Copyright Mobiveil, Inc. 8 Configurable IP Blocks Address all Features Design, Implementation, Verification Effort Area, Frequency Latency, Bandwidth, QOS Copyright Mobiveil, Inc. 9 Mobiveil Configurable IP Blocks Copyright Mobiveil, Inc.
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