Amplifier and data converter techniques for low power sensor interfaces

157 Pages·2017·14.98 MB·English

Amplifier and Data Converter Techniques
M
for Low Power Sensor Interfaces
MAS OF TECHNOLOGY
[
by SEP 28 2016
Frank M. Yaul
LIBRARIES
-RHNS
B.S. and M.Eng., Massachusetts Institute of Technology (2011)
Submitted to the Department of Electrical Engineering and Computer
Science, Massachusetts Institute of Technology in partial fulfillment of
the requirements for the degree of
Doctor of Philosophy in Electrical Engineering
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
September 2016
2016 Massachusetts Institute of Technology. All rights reserved.
Signature redacted
Author .. . . ------W- ---------- ....................
Department of Electrical Engineering and Computer Science
August 31, 2016
Signature redacted
Certified by .........
Anantha P. Chandrakasan
Professor of Electrical Engineering and Computer Science
Thesis Supervisor
Signature redacted
Accepted by.............
/ I/s1 A. Kolodziejski
Professor of Electrical Engineering and Computer Science
Chair, Department Committee on Graduate Students
2 AMPLIFIER AND DATA CONVERTER TECHNIQUES
3
Amplifier and Data Converter Techniques
for Low Power Sensor Interfaces
by
Frank M. Yaul
Submitted to the Department of Electrical Engineering and Computer Science, on
August 31, 2016, in partial fulfillment of the
requirements for the degree of
Doctor of Philosophy in Electrical Engineering
Abstract
Sensor interfaces circuits are integral components of wireless sensor nodes, and im-
provements to their energy-efficiency help enable long-term medical and industrial
monitoring applications. This thesis explores both analog and algorithmic energy-
saving techniques in the sensor interface signal chain.
First, a data-dependent successive-approximation algorithm is developed and is
demonstrated in a low-power analog-to-digital converter (ADC) implementation. When
averaged over many samples, the energy per conversion and number of bitcycles per
conversion used by this algorithm both scale logarithmically with the activity of the in-
put signal, with each N-bit conversion using between 2 and 2N+1 bitcycles, compared
to N for conventional binary SA. This algorithm reduces ADC power consumption
when sampling signals with low mean activity, and its effectiveness is demonstrated
on an electrocardiogram signal. With a 0.6V supply, the 10-bit ADC test chip has a
maximum sample rate of 16 kHz and an effective number of bits (ENOB) of 9.73b.
The ADC's Walden Figure of Merit (FoM) ranges from 3.5 to 20 fJ/conversion-step
depending on the input signal activity.
Second, an ultra-low supply voltage amplifier stage is developed and used to
create an energy-efficient low-noise instrumentation amplifier (LNIA). This chopper
LNIA uses a 0.2V-supply inverter-based input stage followed by a 0.8V-supply folded-
cascode common-source stage. The high input-stage current needed to reduce the
input-referred noise is drawn from the 0.2V supply, significantly reducing power con-
sumption. The 0.8V stage provides high gain and signal swing, improving linearity.
Biasing and common-mode rejection techniques for the 0.2V-stage are also presented.
The analog front-end (AFE) test chip incorporating the chopper LNIA achieves a
power-efficiency figure (PEF) of 1.6 with an input noise of 0.94 PVRMS, integrated
from 0.5 to 670 Hz. Human biopotential signals are measured using the AFE.
Thesis Supervisor: Anantha P. Chandrakasan .
Title: Professor of Electrical Engineering and Computer Science
4 AMPLIFIER AND DATA CONVERTER TECHNIQUES
i l | iI 'll I '1 ||
5
Acknowledgments
Over these past five years, I've been the recipient of much help, support, and kind-
ness, for which I am grateful. I want to thank my advisor, Professor Anantha Chan-
drakasan, for encouraging me, challenging me, and helping me to do my best in this
thesis work. He has helped me transition into the field, given me a great amount
of freedom to explore ideas that interest me, and provided mentorship and guidance
over the years. His insights and perspectives on the high-level aspects and broader
impacts of projects have been helpful to me, and I hope to continue improving my
own understanding in those areas.
I also want to thank my committee members, Professor Harry Lee and Professor
Jacob White. I first met Harry as an undergraduate in his recitation section for the
introductory-level circuits course, so I owe a great deal of my basic circuits knowledge
to his teaching. Over the years he has been helpful and supportive, especially with his
analog expertise. I also want to thank Jacob for his enthusiasm and resourcefulness,
which I was able to witness first hand while helping out with a class he taught. I
want to thank him for discussing issues related to low-power classifiers with me.
Several sources of funding have supported this thesis work. I want to thank
the Department of Defense's Science and Engineering Graduate Fellowship Program,
which provided the initial funding while the course of this thesis work was being set.
I want to thank Shell and Texas Instruments, who sponsored and lended expertise
to the industrial microsensors project. I also received support from Delta Electronics
towards towards the end of this thesis work. Finally, I'm especially grateful the
Taiwan Semiconductor Manufacturing Corporation for fabricating both test chips
through the University Shuttle Program.
I've thoroughly enjoyed working alongside many fellow students throughout my
time at MIT. Michael, thanks for helping me in many ways, from troubleshooting
issues on the lab bench to teaching me about speech recognition. Marcus, thank you
for sharing your time and analog expertise with me. You've directly helped me with
both projects in this thesis, and I've learned so much from your work. Sungjae, it
6 AMPLIFIER AND DATA CONVERTER TECHNIQUES
was an honor sharing a cube with you. You've shown great patience and kindness
even when things were busy and you were balancing being a father, husband, and
researcher. Arun and Nathan, thanks for always being eager to help, and for your
involvement in the microsensors project. Sirma, Harneet, and Taehoon - thanks for
your camaradarie as fellow amplifier and data converter students. Finally, to everyone
in Anantha's group - you make lab a place I enjoy working in. I'm thoroughly grateful
to have met each of you. Also, Jennifer and Professor Yury Polyanskiy - I wish I had
more time to work with both of you. Thanks for all the interesting ideas you've
shared with me.
I am grateful to my friends from the MIT Graduate Christian Fellowship, who
have been with me in both the fun times of research as well as the challenging times,
supporting me in many ways. Ming, Yukkee, Po-Ru, Charis, Kunle, Alex, Becky,
Peng, and Annie - thanks for all the advice and care you've given me over the years.
I'm grateful for being able to befriend and learn from people a few steps ahead in life.
Gerald, Hosea, Megan, Madeline, and Alice - thanks for walking alongside me over
these past few years. I'm grateful for the time we've spent together. Ronny, you fit
somewhere in between those two groups. You've been both a mentor and a peer, and
you always take the time to help me.
I'm also very fortunate to have several friends who have gone through MIT with
me for undergrad and then stayed at MIT for varying amounts of graduate school.
Steve, it's been an honor being your friend all these years. From playing in the pit
orchestra of Next Act, to being roommates in Sidney-Pacific, to going on a run while
discussing algorithms for Boggle, our adventures have taken many forms. Gabriel,
thanks for being a mentor and a friend to me. You've shown great kindness to me
and gone out of your way to look out for me on many occasions. Andrew and Peter,
thanks for your friendship. It's always good to bump into you guys on campus.
Mom and Dad, thanks for always being there for me. You've selflessly supported
me and cared for me all these years, and you've been a constant in all the transitions
throughout my life. Thanks for encouraging my interest in science. Finally, I thank
God for the grace, guidance, provision, and spirit which have brought me to this
7
point. Whether the times are fun or challenging, I will try my best, knowing that
there is something good to be done in any time. Thank you Lord for everything.
Everyone, many thanks - it has been a journey. I hope the ideas introduced in
this thesis will be both interesting and useful to you.
If I take the wings of the morning
and dwell in the uttermost parts of the sea,
even there your hand shall lead me,
and your right hand shall hold me.
If I say, "Surely the darkness shall cover me,
and the light about me be night,"
even the darkness is not dark to you;
the night is bright as the day,
for darkness is as light with you.
Psalm 139:9-12
8 AMPLIFIER AND DATA CONVERTER TECHNIQUES
9
Contents
1 Introduction 23
1.1 Background ............ .. .. ... .. .. 24
1.1.1 Biopotential Monitoring . . . . . . . . . . 26
1.1.2 Vibration Monitoring . . . . . . . . . . . . 28
1.1.3 Strain, Pressure, and Temperature Sensing 29
1.1.4 Voice Activity Detection . . . . . . . . . . 30
1.1.5 Sum mary . . . . . . . . . . . . . . . . . . 30
1.2 Research Goals and Contributions . . . . . . . . . 31
1.3 Thesis Organization . . . . . . . . . . . . . . . . . 32
2 LSB-First Successive Approximation 35
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.2 LSB-first Successive Approximation . . . . . . . . . . . . . . . . . . 38
2.2.1 Algorithm Description . . . . . . . . . . . . . . . . . . . . . 39
2.2.2 Algorithm Details . . . . . . . . . . . . . . . . . . . . . . . . 42
2.3 Algorithm Simulation and Comparison . . . . . . . . . . . . . . . . 43
2.3.1 Fundamental Limits of Bitcycle Reduction . . . . . . . . . . 45
2.4 ADC Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.4.1 Capacitive DAC . . . . . . . . . . . . . . . . . . . . . . . . . 47
2 .4.2 DAC Switches . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.4.3 Dynamic Comparator . . . . . . . . . . . . . . . . . . . . . . 59
2.4.4 Low-leakage Bitcycling Logic . . . . . . . . . . . . . . . . . . 61
2.4.5 Top-Level Simulation and Verification . . . . . . . . . . . . . 63
10 AMPLIFIER AND DATA CONVERTER TECHNIQUES
2.5 ADC Performance Measurement . . . . . . . . . . . . . . . . . . . . . 65
2.5.1 DNL and INL . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
2.5.2 Spectral Measurements . . . . . . . . . . . . . . . . . . . . . . 70
2.5.3 Power Consumption, Sample Rate and Voltage Scaling . . . . 71
2.6 Data-Dependent Energy Savings . . . . . . . . . . . . . . . . . . . . . 74
2.6.1 Logarithmic Power Scaling . . . . . . . . . . . . . . . . . . . . 74
2.6.2 Test Case: Electrocardiogram Input Signal . . . . . . . . . . . 76
2.6.3 Slope-based Prediction . . . . . . . . . . . . . . . . . . . . . . 77
2.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3 A Noise-Efficient Multi-Voltage Instrumentation Amplifier 81
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.2 Noise and Power Consumption Trade-offs . . . . . . . . . . . . . . . . 84
3.3 Noise-Efficient Multi-Voltage Amplifier . . . . . . . . . . . . . . . . . 86
3.3.1 0.2V Squeezed-Inverter Input Stage . . . . . . . . . . . . . . . 89
3.3.2 0.8V Folded-Cascode Common-Source Stage . . . . . . . . . . 91
3.3.3 Feedback, Chopping, and CMR Scheme . . . . . . . . . . . . . 92
3.3.4 Stability Analysis . . . . . . . . . . . . . . . . . . . . . . . . . 94
3.3.5 Interferer Rejection Analysis . . . . . . . . . . . . . . . . . . . 96
3.3.6 Noise Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
3.3.7 Negative Gate Bias Generation . . . . . . . . . . . . . . . . . 100
3.4 AFE Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
3.4.1 Chopper LNIA Details . . . . . . . . . . . . . . . . . . . . . . 105
3.4.2 Chopper OTAs . . . . . . . . . . . . . . . . . . . . . . . . . . 109
3.4.3 PGA and AA Filter . . . . . . . . . . . . . . . . . . . . . . . . 110
3.4.4 Buck Converter . . . . . . . . . . . . . . . . . . . . . . . . . . 112
3.4.5 Current and Voltage References . . . . . . . . . . . . . . . . . 113
3.4.6 Simulation and Verification . . . . . . . . . . . . . . . . . . . 114
3.5 AFE Performance Measurements . . . . . . . . . . . . . . . . . . . . 116
3.5.1 Transfer Functions, Noise and Step Response . . . . . . . . . .1 119