Integrated Circuit Defect-Sensitivity: Theory and Computational Models

181 Pages·1993·5.44 MB·English

by  José Pineda de Gyvez (auth.)

INTEGRATED CIRCUIT
DEFECT-SENSITIVITY:
THEORY AND
COMPUTATIONAL MODELS
THE KLUWER INTERNATIONAL SERIES
IN ENGINEERING AND COMPUTER SCIENCE
MICROELECTRONICS MANUFACTURING
Consulting Editor
Arjun N. Saxena
Rensselaer Polytechnic Institute
INTEGRATED CIRCUIT
DEFECT-SENSITIVITY:
THEORY AND
COMPUTATIONAL MODELS
by
Jose Pineda de Gyvez
Texas A&M University
SPRINGER SCIENCE+BUSINESS MEDIA, LLC
Ubrary of Congress Cataloglng-ln-Publication Data
Pineda de Gyvez, Jose.
lntegrated circuit defect-sensitivity : theory and computational models
1 by Jose Pineda de Gyvez.
p. cm. -- (fhe Kluwer international series in engineering and
computer science; 208. Microelectronics manufacturing)
Includes bibliographical references (p. ) and index.
ISBN 978-0-7923-9306-1 ISBN 978-1-4615-3158-6 (eBook)
DOI 10.1007/978-1-4615-3158-6
1. Integrated circuits--Very large scale integration--Design and
construction--Data processing. 2. Integrated circuits--Very large scale
integration--Defects--Mathematical models. 3. Computer-aided design. 1.
Title. II. Series: Kluwer international series in engineering and computer
science ; SECS 208. III. Series: Kluwer international series in engineering
and computer science.
Microelectronics manufacturing.
TK7874.P53 1993 92-35547
621.3815--dc20 CIP
Copyright © 1993 by Springer Science+Business Media New York
Originally published by Kluwer Academic Publishers in 1993
Softcover reprint ofthe hardcover 1st edition 1993
Ali rights reserved. No part ofthis publication may be reproduced, stored in a retrieval
system or transmitted in any form or by any means, mechanical, photo-copying, record ing,
or otherwise, without the prior written permission of the publisher, Springer Science
+Business Media, LLC
Printed on acid-free paper.
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Table of Contents
Foreword ................................................ xix
Preface ........... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxiii
1
Introduction ....................................... . 1
1. 1 Approaches to Yield Modeling 3
2
Defect Semantics and
Yield Modeling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Microelectronics Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Modeling of Process Induced Defects and Faults ......... 12
2.3 Statistical Characterization of Spot Defects .............. 17
2.4 Brief Overview of Historical Yield Models . . . . . . . . . . . . . . . . . 20
3
Computational Models for
Defect-Sensitivity ................................. 29
3.1 Taxonomy of Defect-Sensitivity Models.. .. . ...... . ...... 30
3.2 Theoretical Foundation of Critical Areas ................. 33
3.3 Susceptible Sites. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.4 Critical Regions and Critical Areas. . . . . . . . . . . . . . . . . . . . . . . 36
3.5 Geometrical Proof of the Construction of Critical Regions. 39
4
Single Defect
Multiple Layer (SDML) Model .................... 49
4.1 Critical Regions for Protrusion Defects . . . . . . . . . . . . . . . . . . . 50
Table of Contents viii
4.2 Critical Regions for Isolated Spot Defects ................ 53
4.3 Critical Regions for Intrusion Defects .................... 55
4.4 A CAD System for SDML Critical Areas .................. 56
4.5 A "Spot-Defect" Language .............................. 56
4.6 Layout Partitioning ..................................... 60
4.7 Extraction of Multi-Layer Susceptible Sites .............. 61
4.8 Defect Mechanisms..................................... 64
4.9 Intrusion Defects ....................................... 66
4.10 Isolated-Spot Defects .................................. 66
4.11 Protrusion Defects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.12 Construction of Multi-Layer Critical Regions. . . . . . . . . . . . 67
4. 13 Computation of Multi-Layer Critical Areas . . . . . . . . . . . . . . 69
4.14 Notes on Implementation .............................. 72
4.15 Examples ............................................. 74
5
Fault Analysis and
Multiple Layer Critical Areas .................... 79
5.1 Failure Analysis and Yield Projection of 6T-RAM Cells... . 80
5.2 Fault Weighting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
5.3 Analysis and Weighting of Defect Induced Faults . . . . . . . . . 88
6
Single Defect
Single Layer (SDSL) Model. . . . . . . . . . . . . . . . . . . . . . . . 93
6.1 Theory of Critical Regions for SDSL Models .............. 94
6.2 Single-Layer Susceptible Sites. . ........ . . ....... . . .... . . 94
6.3 Critical Regions for Bridges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
6.4 Critical Regions for Cuts ................................ 96
6.5 Computation of Critical Areas for SDSL Models .......... 96
6.6 Extraction of SDSL Susceptible Sites.. . ...... .. ..... . . .. 97
6.7 Computation of SDS Critical Areas ...................... 102
6.8 Complexity Analysis .................................... 104
6.9 Examples............................................... 105
7
IC Yield Prediction and
Single Layer Critical Areas....................... 109
7. 1 Sensitivity Analysis ..................................... III
IC Defect Sensitivity
7.9 Yield Arlalysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
8
Single vs. Multiple Layer
Critical Areas ....................................... 125
8.1 Uncovered Situations of the SDSL Model. . . . . . . . . . . . . . . . . 126
8.2 Case Study ............................................. 129
8.2.1 Comparative Results.... .. . . . .. .... . . . ....... . . . ... . .. 131
8.3 Summary and Discussion ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
References .............................................. 137
Appendix 1
Sources of Defect Mechanisms .................. 147
Appendix 2
End Effects of Critical Regions.................. 151
Appendix 3
NMOS Technology File ............................ 159
Index ........... ............................... ........... 163
List of Figures
Figure 1. 1 Features in Yield Models ............................... 5
Figure 2.1 A Silicon Layer Structure....... . .......... ........... 10
Figure 2.2 Defect Mechanisms.
(a) Intrusion. (b) Protrusion. (c) Isolated ............... 16
Figure 2.3 A "typical" defect size distribution
(a) analytical (b) data ................................. 18
Figure 2.4 Probability density function for different
defect densities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 20
Figure 2.5 An area of interest in a wafer ........................ 21
Figure 2.6 Defect densities are averaged for a batch of wafers for
independent concentric regions. ...................... 22
Figure 2.7 Layout defect-sensitivity, layout probability of failure,
and manufacturing defect size distribution . . . . . . . . . . .. 25
Figure 3.1 Taxonomy of Failure Primitives ... . . . . . . . . . . . . . . . . . . .. 30
Figure 3.2 Taxonomy of Defect-Sensitivity Models ............... 32
Figure 3.3 Example of susceptible sites. . . . . . . . . . . . . . . . . . . . . . . . .. 34
Figure 3.4 (a) Three connected point sets.
(b) Corresponding susceptible sites. ................... 35
Figure 3.5 Application of the geometrical failure criterion.
(a) Three islands equally spaced and with the
same width (b) Two bridges with and without the
usage of the failure criterion w. ....................... 37
Figure 3.6 Creation of critical regions from susceptible sites.
The corner critical region is created for a defect size of 3
units, the lateral critical region for a defect size of 3.5
units. ................................................ 39
Figure 3.7 Theorem 3.l.
(a) Three connected point sets. (b) Critical region. ...... 41
Figure 3.8 Theorem 3.3.
(a) Three connected point sets and corresponding
susceptible sites Ei. (b) Critical regions from the
three susceptible sites. (c) Critica] region from
susceptible site E I. (d) Critical region from
susceptible site E2. (e) Critical region from
susceptible site E3. ................................... 43
xii IC Defect Sensitivity
Figure 3.9 Theorem 3.5.
(a) Three connected point sets with three corner
susceptible sites.
(b) Corresponding critical regions ...................... 45
Figure 3.10 Theorem 3.6.
(a) Three connected point sets with three lateral
susceptible sites. (b) Corresponding critical regions. 46
Figure 4.1 Three mutually non-intersecting islands .. . . . . . . . . . . .. 50
Figure 4.2 A multilayer situation is depicted in which three
patterns belonging to three different layers are
characterized by two distinct islands.
(a) a c ~ by Rl(ro) I~. b c ~ by R{J.I.) I~. and c c Lk by
R2(ro) ILk.
(b) Some susceptible sites. ........................... 51
Figure 4.3 Multilayer critical regions for protrusion defects. . . . . .. 53
Figure 4.4 Multilayer critical regions for isolated spot defects. . . .. 55
Figure 4.5 System framework for the computation of critical areas 57
Figure 4.6Syntax of the Spot-Defect Language .................. 59
Figure 4.7 Forming multilayer susceptible sites.
(a) Three different masks.
(b) Susceptible site for mask A
(c) Susceptible site for masks A and B.
(d) Susceptible site for masks A and C
(e) Susceptible site for masks A. B. and C. ............ 65
Figure 4.8 Critical Regions after node and fault splitting ......... 69
Figure 4.9 Static Line Array.
(a) Data structure. (b) Insert operation
(c) Split-<ielete operation. .. . . . .. . . . .. . . .. . . . ... . . ... .. 73
Figure 4.10 Transistor Matrix layout for an NMOS technology . . .. 74
Figure 4.11 Critical regions for protrusions and isolated
spots of poly. ......................................... 75
Figure 4.12 Protrusion defects of diffusion. . . . . . . . . . . . . . . . . . . . . .. 76
Figure 4.13 Critical regions for missing thick oxide. .............. 77
Figure 4.14 Critical regions for intrusion defects of diffusion ..... 78
Figure 5.1 6-T Static RAM. (a) Schematic diagram (b) Layout ..... 81
Figure 5.2 Critical regions for polysilicon defects of 10J.t. (a)
Intrusions (b) Protrusions and isolated .... . . . . . . . . . . .. 81
Figure 5.3 Defect-Sensitivity of the 6-T RAM.
(a) Protrusion and isolated defects.
(b) Intrusion defects ................................... 82
Figure 5.4 Defect-SenSitivity per fault and node.
(a) One defect effecting more than one node.
(b) More than one defect effecting only one node. ...... 83