Class D Audio Amplifier

169 Pages·2008·3.7 MB·English

Class D Audio Amplifier
The design of a live audio Class D audio amplifier with greater than 90%
efficiency and less than 1% distortion.
A Major Qualifying Project
Submitted to the Faculty
of the
WORCESTER POLYTECHNIC INSTITUTE
in partial fulfillment of the requirements for the
Degree of Bachelor of Science
in
Electrical Engineering
by
Briana Morey
Ravi Vasudevan
Ian Woloschin
May 2008
APPROVED:
Professor John McNeill, Advisor Professor Andrew Klein, Advisor
Abstract
The purpose of this project was to design and produce a 90% efficient, 80W Class D audio
amplifier, with less than 1% Total Harmonic Distortion (THD) for the NECAMSID Lab.
The amplifier consisted of a second order, three-level ∆Σ modulator, an H-bridge power
stage, and a second order, passive Butterworth filter. Testing confirmed that the efficiency,
THD, and power specifications were met in the final revision of the design.
ACKNOWLEDGEMENTS
We would like to thank Professor McNeill and Professor Klein for advising this project. We
would also like to thank the NECAMSID lab for sponsoring this project.
Contents
1 Introduction 1
1.1 Project Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Report Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Background 3
2.1 Class D Amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.1 Operation of Class D Audio Amplifiers . . . . . . . . . . . . . . . . . 4
2.1.2 Advantages and Disadvantages of Class D . . . . . . . . . . . . . . . 6
2.1.3 Applying Class D to Audio Design . . . . . . . . . . . . . . . . . . . 7
2.2 The Modulation Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2.1 Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . 9
2.2.2 Delta Sigma Modulation (∆Σ) . . . . . . . . . . . . . . . . . . . . . . 10
2.3 The Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3.1 Half-Bridge Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3.2 H-Bridge Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3.3 A Critical Evaluation of Half- and H-Bridge Amplifiers . . . . . . . . 14
2.3.4 MOSFET Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.4 Noise and the Filtering Stage . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.4.1 Types of Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.4.2 Passive Filters vs. Active Filters . . . . . . . . . . . . . . . . . . . . . 19
2.4.3 Single Ended Filters vs. Balanced Filters . . . . . . . . . . . . . . . . 20
3 Preliminary Design 22
3.1 The Modulation Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1.1 The First Order Delta Sigma Modulator Design . . . . . . . . . . . . 23
3.2 The Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.2.1 Amplifier Configuration . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.2.2 MOSFET Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.2.3 MOSFET Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.3 Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.3.1 Filter Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.4 System Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.4.1 First Order Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.4.2 PCB Layout for Power Stage and Filter . . . . . . . . . . . . . . . . . 35
3.4.3 Full System Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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4 Preliminary Results 38
4.1 Functionality Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.1.1 Modulator Functionality . . . . . . . . . . . . . . . . . . . . . . . . . 39
4.1.2 Power Stage Functionality . . . . . . . . . . . . . . . . . . . . . . . . 40
4.1.3 Filter Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.1.4 System Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.2 Efficiency Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.3 Frequency Response Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.4 Problems with the Preliminary Design and Tests . . . . . . . . . . . . . . . . 49
5 Final Design 51
5.1 The Second Order Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.1.1 System Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.1.2 Physical Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.1.3 Modulation Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.2 The Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.3 Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.3.1 Capacitor Microphonics . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.3.2 Cut-Off Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.3.3 New Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
5.3.4 Filter Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
5.4 Final PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6 Final Results 64
6.1 Functionality Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
6.1.1 Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.2 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.3 Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
6.2 Efficiency Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6.3 Sound Quality Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
6.3.1 Loopback Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
6.3.2 Total Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . . 72
6.3.3 Signal To Noise Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6.3.4 Frequency Response . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
6.3.5 Listening Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
7 Conclusion 77
8 Future Work & Recommendations 80
8.1 High Efficiency Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 80
8.2 PCB Modulator with Full System Feedback . . . . . . . . . . . . . . . . . . 81
8.3 Digital Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
8.4 Multichannel Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Matlab
A First Order ∆Σ Modulation: Simulation Code 86
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Matlab
B Script to Find ‘a’ Coefficients 89
Matlab
C First Order ∆Σ Modulation: Simulation Code 91
D MOSFET Equation Derivations 94
Matlab
E MOSFET Losses: Simulation Code 100
F MOSFET Data Sheet 106
G Preliminary Schematic 116
H Final Schematics 117
Matlab
I Final Test Code 120
I.1 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
I.2 THD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
I.3 SNR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
J Preliminary Efficiency Test Results 127
K Final Efficiency Test Results 131
L Final Sound Quality Test Results 140
L.1 Loopback Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
L.2 Signal Quality Results with 1MHz Modulation Frequency . . . . . . . . . . . 142
L.3 Signal Quality Results with 2MHz Modulation Frequency . . . . . . . . . . . 143
L.4 Signal Quality Results with 5MHz Modulation Frequency . . . . . . . . . . . 145
L.5 Signal Quality Results with 10MHz Modulation Frequency . . . . . . . . . . 146
M Digital Audio 148
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List of Figures
2.1 A Class A audio amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Block Diagram of a Class D Amplifier . . . . . . . . . . . . . . . . . . . . . . 6
2.3 A system model of a first order ∆Σ Modulator. . . . . . . . . . . . . . . . . 10
2.4 A system model of a first order ∆Σ Modulator after the quantizer is replaced
with additive quantization noise for modelling and simulation. . . . . . . . . 10
2.5 An approximate representation of the signal (red) and noise (blue) transfer
functions of a simple delta sigma modulator. . . . . . . . . . . . . . . . . . . 11
2.6 A Half-Bridge Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.7 An H-Bridge Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.8 A 2kHz signal modulated at 10MHz with delta sigma modulation. . . . . . . 16
2.9 A basic active low pass filter. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.10 A basic passive low pass filter. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.11 Single Ended and Balanced Filter [McD01] . . . . . . . . . . . . . . . . . . . 21
3.1 The schematic used to simulate a first order delta sigma modulator. . . . . . 23
3.2 The results of the first order delta sigma simulation, conducted with a 2kHz
sine wave and a 1MHz modulation frequency. . . . . . . . . . . . . . . . . . 25
3.3 A MOSFET timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.4 The curves for each simulated MOSFET. . . . . . . . . . . . . . . . . . . . . 30
3.5 Half circuit model of the second order Butterworth filter.[TI:99] . . . . . . . 32
3.6 Thebread-boardcontaining themodulatorshown intheschematic inFigure3.1. 34
3.7 The PCB of the Power Stage without Components . . . . . . . . . . . . . . 35
3.8 The PCB of the Power Stage with soldered components Components . . . . 36
3.9 The Resistor Used for Testing . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.10 The PCB of the Power Stage without Components . . . . . . . . . . . . . . 37
atlab
4.1 The M simulation of the first order modulator. . . . . . . . . . . . . . 39
4.2 The output of the first order delta sigma modulator, with a 1MHz modulation
frequency and a 10kHz sine wave. . . . . . . . . . . . . . . . . . . . . . . . . 40
4.3 The Power Stage Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.4 The configuration of the test resistor and the oscilloscope probes. . . . . . . 42
4.5 The power stage and filter with a 1kHz square wave input . . . . . . . . . . 43
4.6 The power stage and filter with a 10kHz square wave input. . . . . . . . . . 43
4.7 The full system with a 1kHz sine wave input. . . . . . . . . . . . . . . . . . . 44
4.8 The full system with a 10kHz sine wave input. . . . . . . . . . . . . . . . . . 45
4.9 Efficiency Plot at 11V at the Output . . . . . . . . . . . . . . . . . . . . 46
RMS
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4.10 Efficiency Plot at 25V at the Output . . . . . . . . . . . . . . . . . . . . 47
RMS
4.11 Efficiency Plot at 50Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
4.12 Efficiency Plot at 1200Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
4.13 Efficiency Plot at all Frequencies and Output Voltages . . . . . . . . . . . . 48
4.14 Frequency Response Plots . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.1 The discrete model of a second order delta sigma modulator [ST05]. . . . . . 53
5.2 The results of the system model simulation after adjusting the coefficients. . 53
Matlab
5.3 The intermediate stage between the simulation of the system model
and the final system. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Matlab
5.4 The output of the intermediate stage between the simulation of the
system model and the final system. . . . . . . . . . . . . . . . . . . . . . . . 55
5.5 The Fast-Fourier Transform (FFT) of the intermediate stage output. . . . . 55
5.6 The final spice simulation of the second order delta sigma modulator. . . . . 56
5.7 The output of the second order three-level modulator on a bread-board . . . 57
5.8 Addition of Electrolytic Bypass Capacitor at Rails . . . . . . . . . . . . . . . 58
5.9 Addition of Tantalum Bypass Capacitor at MOSFET . . . . . . . . . . . . . 58
5.10 Preliminary Filter Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
5.11 Final Filter Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.12 Unpopulated Second Revision Printed Circuit Board . . . . . . . . . . . . . 62
5.13 Second Order, Three State Breadboard ∆Σ Modulator . . . . . . . . . . . . 63
5.14 Populated Second Revision Printed Circuit Board . . . . . . . . . . . . . . . 63
6.1 Plot of Efficiency vs. Signal Frequency . . . . . . . . . . . . . . . . . . . . . 68
6.2 Plot of Efficiency vs. Output Peak Voltage . . . . . . . . . . . . . . . . . . . 69
6.3 THD results for Loopback Test . . . . . . . . . . . . . . . . . . . . . . . . . 71
6.4 Frequency Response results for Loopback Test . . . . . . . . . . . . . . . . . 71
6.5 THD results at 5MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 72
6.6 Plot of SNR vs. Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6.7 Plot of Efficiency vs. Output Peak Voltage . . . . . . . . . . . . . . . . . . . 75
G.1 A preliminary schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
H.1 Preliminary Schematic of the Power and Filter Stages . . . . . . . . . . . . . 117
H.2 Final Schematic - Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
H.3 Final Schematic - Power Stage and Filter . . . . . . . . . . . . . . . . . . . . 119
L.1 THD results for Loopback Test . . . . . . . . . . . . . . . . . . . . . . . . . 141
L.2 Frequency Response results for Loopback Test . . . . . . . . . . . . . . . . . 141
L.3 THD results at 1MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 142
L.4 SNR results at 1MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 142
L.5 Frequency Response resuplotlts at 1MHz clock frequency . . . . . . . . . . . 143
L.6 THD results at 2MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 143
L.7 SNR results at 2MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 144
L.8 Frequency Response results at 2MHz clock frequency . . . . . . . . . . . . . 144
L.9 THD results at 5MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 145
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L.10 SNR results at 5MHz clock frequency . . . . . . . . . . . . . . . . . . . . . . 145
L.11 Frequency Response results at 5MHz clock frequency . . . . . . . . . . . . . 146
L.12 THD results at 10MHz clock frequency . . . . . . . . . . . . . . . . . . . . . 146
L.13 SNR results at 10MHz clock frequency . . . . . . . . . . . . . . . . . . . . . 147
L.14 Frequency Response results at 10MHz clock frequency . . . . . . . . . . . . . 147
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List of Tables
1.1 Project Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.1 A Comparison of Half-Bridge and Full-Bridge Amplifiers [HA05] . . . . . . . 14
3.1 MOSFET Comparison Table . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2 The values for the “dummy filter” [TI:99] . . . . . . . . . . . . . . . . . . . . 29
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