Table Of Content

Digital Logic and Computer Design M. MORRIS MANO PREFACE « 1_ BINARY SYSTEMS i 1-1 Digital Computers and Digial Sysiems 7 1-2 Binary Numbers 13 Number Hose Conversions — 6 14 Octal und Hexadecimal Nemben 9 1S Compleweos 20 16 Signed Binary Nuaaters 28 17 Binary Cres a7 148 Binary Storage and Regis 25 19 Buary Luge 28 Refetemes 2 Problems a3 2_BOOLEAN ALGEBRA AND LOGIC GATES 36 24 Basie Detitions 36 22. Aviomie Definition uf Boolean Algehra 3 2A Basic Theorems and Pepetties uf uslean Algebra “ 24 Bxisaa Functions 4 23 Comencal and Stan! Forme 4 26 Or Logie Operations 56 Digital Logie Gans egies Ciouies 62 References? Droblers — 68 2 SIMPLIFICATION OF BOOLEAN FUNCTIONS 7 Bt The Mop Merssl 72 2 Twn and This Vitis Mtups 22 33 Powe Sirihle May 78 4 Five Vaviahle Map 82 BE Penauet ol Sunny Sugl'4caton 84 34 NAND and NOR Tnplememtation AB 37 Otles Foot excl Inmplemetitions — Hf BS Bent Care Cendllone 8 39 The ‘Isbulaton Method OE BllhDsterminali f Prime Iephcte 707 BAL Selactam ai Prime Inplicsats 106 12 Conluding Remarks 108 Rofeuness U0 Prohlems 14 4_COMBINATIONAL LOGIC 4 41 dutnwticton 174 44 Daign Procesue 5 4S Aides 6 44 Sabin 9 45° Goce Crmenion 42 46 Aniys's Picedie 26 47 Mutleyel NANT Ceoms 10 44 Mukiesel NOR Crews 23 49 ExlosiveOR Fonction 442 Relernest 148 Problems 149 5_MSI_AND PLD COMPONENTS 152 Sl Uunwuctisn 152 52 Binaty Adder vod Subwacior 154 SS Decimal Addict 160 54 Magniude Compantor 16 TDecaders wad kacoders 266 Moliphesers £77 Read-Only Meniory (KOM) 280 $8 Prowrammable Logic amsy (PIA) 447 59 Programmable Aray Logic (PAL! £92 Referun 197 Probleme 197 6_ SYNCHRONOUS SEQUENTIAL LOGIC 202 G1 mode 202 62 FpFlops 204 63 Triggecing of Flip-Flops 240 6-4 Analysis af Ciockod Sarpental Civ 228 65 Sule Reduction and Atsignnent 228, 66 FlipFlop Essai Tubes 237 87 Desiga Provo — 26 6¥ Design of Coumers 247 Refrenecs 281 Problem 252 7_REGISTERS, COUNTERS, AND THE MEMORY UNIT 257 MM 14 Innructon Registers 2s7 258 Stull Magisters 264 opal Sychiomis Counters 277 je Comers 272 ie 1 Seyuences 285 anda Assess Morory TRAM) 288 eumiry Decoding 202 Envoomrecting Coles 240 Reiesnces 32 Pecblems 303 8 ALGORITHMIC STATE MACHINES (ASN) 307 ft Ingoducuoa 307 2 ASM Chu 308 83 Tuning Consideratume 302 84 Cnc! Implementation 37 BK Pesign with Mutliplonors 333 Ri PLAConlinn 3M Keieenoss 338 Prublems 297 9_ASYNCHRONOUS SEQUENTIAL LOGIC 341 a $2 os ot 5 3 oT “8 Tweroduction 347 Acuigyse Pracedure 348 ‘Grovits wie Latches 22 Design Procedine 359 Reduction of Svc al Flew Tables 366 Receive State Assignment! 374 Mseaus 9 Toesign Example 88 Relerances 39 Probleas 392 10_DIGITAL INTEGRATED CIRCUTTS. 399 AWA Imretection 399 102 Special Charscusicce 401 103 Ripule-Trunssur Charustriniss 495. Wo4 RTLundDTLCreoxs 409 WS TansisiorTrusistor Loris (TTL) $72 3066 Eimmincr-Caopled Logie (BCL) 422 30.7 Metl-Oxide Semiomnduowe (MOS! 424 108 Complementary MOS (CMOS! 27 10 CMOS Transmission Gate Circus 43 References 409 Proves 484 11_ LABORATORY EXPERIMENTS. 436, 0 et Inwodustion 1 Fxgeciments 438 Binary and Decimal Nombre 442 Digit Logic Gares es Simpliieation of Boolean Fonetons 446 Coobinsional Chests 447 Cole Canvenses 4a Design wih Mutiplesces 464 Adders and Sobicluns #52 Hip Flops 45S Sequential Cucuits 458 Cewalers 58 Shift Ropises 462 Serial Addin — 464 Memory Unit 48 soy Hutball 467 CClock-Pulse Ceueraur 474 Panic Addce 473 iney Muliplier 475 Aejnchronms Seed City 477 12_ STANDARD GRAPHIC SYMEOLS 479 TI Revtangba Shans Spode 47 Gosling Symes a8 Pepenfcsey Nettion 484 Symbols (or Combimlonal Eheecu's 86 Stub toy Pig Flops 489 Syeabols fox Reiners 497 Svmbots for Counsss #4 Symbol for RAM 96 Releveares Problems 497 ANSWERS TO SELECTED PROBLEMS 499 512 i ious. The sjost inal knoe by otter names such as loge esi, digital logic, svching cinco, an gil eysoans, Digilal scuts are cmployol i tbe sign of sytane such as gta ‘conmputers, contol systems. dtu commanteaions. aad many ther speciosa Te- ire electronic digital Yariwae. ‘ois bank peers Une bin: cole fer desien of Agta cites and previds etl ad procedures stale To variety of gt de Sgn applicains Many (alu uf the sond editoa sami the stra hose uf the fst ediion, "he mattis sill orvanize in the san mouner. "he fit tvs chapter cave com ‘aiona eres. The next lorax chapters deal with evachrooaus sloshed vequenoa ct- ib. Asnshronms sequential creults are inthe atx. The It three chapters deal wide vuriow asoce: of connercallyauilahteftegraled cic. “The sexo edilog, however, offers several improvements aver tbe Hs ction, ‘Mang soctinny have been rewiten to clarify He presentation. Chapters (through ‘aud Chapter 10 have heen evised by adding ae Wpto-date mara deleting ob Slot subjects. New probleme hive been Toemlstad fe he int seve chapom. These replace the problem set fv she Lrsl edition. Throe nes capetizaents ve horn aod in Chapter 11. Chapter 12,1 new chapter, plewnls the ERE sandats grapiac rob Zi lle eden ‘Lhe following i bref description of the aubjets tl are covered in cach clupter ‘wid an emphss on the seesons ta were made i th sab eon, Chapter presents th aris nary sons suitable fr seprencng inneaon in Sighs syctoras, Ty binary number eyes expla! abd hinary sie av IN fencd. A now ecto has Boe aed oo sigved Boary runes ‘Chapter 2 urodices the bute plates of Uoolesa egshrs ans sbow< the correla tion betwee Baslcan exprseswre nd thir corespanng logic Gagraus ATL oosile Toute uperans fe co tris ars Eavestigaed fro hay the st seh gic dgaes tke inthe design of digital ssems a¢e determine Ue sharacterstes ul we Gai inn putes are mcotine fa hn chapler9u1 meee datas ata oF che lsctrene sito of he ges dane in Crapter “1 ‘Chapter 4 cover the hist and Uuliion medheds Tur sxapifyiag Boolean expres sions, The map meth slo ued 39 saglify dig circuits wnsted itn AND x, NAND. cc NOR gals, all other esi trlovel pte cirwits une cupeiead we eer metbod of implemen ure nar Frm for ey renee ‘Chapler 4 nance the fac precedes fr Gi analysis and deny of enmbiow ional semis. Sone base vormpanente weed in the docign uf cg ems. uth a Inder and ond: vooverters, are inact dsign uamples. Th seta on alt Ikyel NAND and NOR dplomertti fine hoe fesised to sbow simpler proces e iia srting ASD OF diatems to NAND 9r NOR tyne Chapter § presets varias mihi sede interaloy (MSI une) and pew pumeble le device (ELD! coripments. Lneqieatly used igi gie funotions ich an pnalil adder so sthiicary, deol, encoder ae queers, are ex Ped, ae ther ase m the design of wounetonal zeus stated with exam les Ih adk-oun tothe prgsamraablefead oely memes {VRONC and programmable Miyie arcay iPt Ay eke Book om saree the inetd aesietion ofthe reguaamo: tay logic Pal, These cace PLD stvnponerts are exlonssely teed a tr dasign snd Implemeovion of conaplen digital ecu ‘Chapter 6 outlines Ue fra proceoes free analyss wa’ dssiga of ache syn inate sequentisl cre. The gate siete oF several Types of Mip-Dupe pe Seoted ragosfar wu a discus en the ifcence bebwcta pase Tes and pub m= Sion triggering, Spife cramples ave nsed (show the derivation af be sae table Sho wate Uigran hten anlyeing a s3qoeoro! elt. A amber vt desig examples fre preseaiod wt ee! sean mae cuits tha st. D yp Mipsope, Chapter 7 presen varius seyncnlial digital vomponents sch: wughets, htt reginets al gounets, Three use! componsnss age te hasc Budi biusks or {Sineh move complex digit sen are cenasuvka. The sccons om tke acon a= {ss momerg RAMI Inve Ran oonepetl’ eeviscd wod a new eatin soi te iananing eer oreting cou. “Chapter H pessoa te ayn sare machine {ASME allo of igh desigr ‘ke ASM ceat isa spel Pow chart sua fe deseibing Brat sequen! ws at let opeexions wth dite Inclvare, A numberof dei exaziplss emesis Theos (fe ASM ekart ip ite dbsipn sf tate machines, (Chapter 9 greene tarmal proves fo the analysis sad ssign of asynchrony sequen croft Sedov ace uns th sta boot an vsyachrancus sequential si cuit canbe implemented aa combinations circuit with teedheck. An alent imple- entation olga deseibed thar uscs SR. Tes 26 the storage demas an ayn creas sequential ere (Chapter 10 presents the most common incgrate cit digital ogi Families. The leccronie cucusoft conimen gle en each fami is analyzed sing electrical Seah heory. basic knowodge of electric crit is necessary to fly uadersand the mate ia this chapter. To new sections ae ineuded in the neoand edition. Oae ve tion shoms Yow to evaluate the cumaceal values of four electri] harasses oF fe. The ole aston intreduces che CMOS vansmasan gale al gives a few exae es of ice ufos inthe oosizctin of digital cris. (Chapter TT outlines 18 experiments tat ean be performed i te bontory with bacdeare that is ecaily aud expensively ola commecilly Thine experiments tse standard integrate ieee of the TEL type. ‘The operation of the integrated <1 ‘lis explained by ceferring to diagtans i previous chapters pcre sic cape ‘ends are originals watreduced. Bach xps ban yresenied focally rather thn {2 wop-hysizp fashion su that he sauder i expected pee Ue deals ofthe cit ‘uit diagram and formulate a procedure fer shocking the eperution of the circuit nh borers. ‘Chapter (2 presents the tandard guaphic symbols for lie funsrions sestemmeode by ANSLIDIE: Standard L-1984. These graphic symbols bave been devleped for SSI and MST components su Ul the user cin recognize each fnction trem the Urigue graphic oymbel esigns toi. The best time te loam he staard symbols is we ‘eanning aboot digial sem. Chapter IZ shows the sandard graphic symbols ofall the integrated circuits used in he buraory experiments of Chapt 1) “The various digital componct thal ave sepreented throught ds hey sind to connneria M81 eacuite. Hovacwer, the tet does net mention epecitic intra ait except in Chapters 11 and 12. The practical applcaion af tit design will he ‘abanced by doing Ue suggeste experiments Chapt 11 hie tying the theory seated i te text. Each shaper inthe bork has a it of rfecnees and se af problems. Anes © mort of the problems appeur in the Appendix ta ail the sludent und to help eho ind pendent reader. A valine mana! i wale orth isto rom tbe publishes M, Morris Mono