Tradeoffs and Optimization in Analog CMOS Design

632 Pages·2008·10.68 MB·English

by  David Binkley

Tradeoffs and Optimization in
Analog CMOS Design
David M. Binkley
University of North Carolina at Charlotte, USA

Tradeoffs and Optimization in Analog
CMOS Design

Tradeoffs and Optimization in
Analog CMOS Design
David M. Binkley
University of North Carolina at Charlotte, USA
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LibraryofCongressCataloginginPublicationData
Binkley,DavidM.
TradeoffsandoptimizationinanalogCMOSdesign/DavidM.Binkley.
p. cm.
Includesbibliographicalreferencesandindex.
ISBN978-0-470-03136-0
1. Metaloxidesemiconductors,Complementary—Designandconstruction.
I. Title.
TK7871.99.M44.B562007
621.3815(cid:2)2—dc22
2007037318
BritishLibraryCataloguinginPublicationData
AcataloguerecordforthisbookisavailablefromtheBritishLibrary
ISBN978-0-470-03136-0
Typesetin9/11ptTimesbyIntegraSoftwareServicesPvt.Ltd,Pondicherry,India
PrintedandboundinGreatBritainbyAntonyRoweLtd,Chippenham,Wiltshire
To my wife Jacqueline, children Anna and Christopher, and father
Jerry Binkley.
TothememoryofmymotherCarolBinkley,herparentsWilliamandLucieDexter,andmy
father’s parents Robert and Oneda Binkley.
To the memory of my teachers Charles Eason, Harry Kroll, John
Abel, and T. Vaughn Blalock.

Contents
Foreword xvii
Preface xxi
Acknowledgments xxiii
ListofSymbolsandAbbreviations xxv
1 Introduction 1
1.1 ImportanceofTradeoffsandOptimizationinAnalogCMOSDesign 1
1.2 IndustryDesignersandUniversityStudentsasReaders 2
1.3 OrganizationandOverviewofBook 3
1.4 FullorSelectiveReadingofBook 5
1.5 ExampleTechnologiesandTechnologyExtensions 6
1.6 LimitationsoftheMethods 6
1.7 Disclaimer 7
PARTI MOSDevicePerformance,TradeoffsandOptimizationforAnalogCMOS
Design 9
2 MOSDesignfromWeakthroughStrongInversion 11
2.1 Introduction 11
2.2 MOSDesignComplexityComparedtoBipolarDesign 12
2.3 BipolarTransistorCollectorCurrentandTransconductance 12
2.4 MOSDrainCurrentandTransconductance 13
2.4.1 InWeakInversion 13
2.4.2 InStrongInversionwithoutVelocitySaturationEffects 14
2.4.3 InStrongInversionwithVelocitySaturationEffects 16
2.4.4 InModerateInversionandAllRegionsofOperation 18
2.5 MOSDrain–SourceConductance 23
2.6 AnalogCMOSElectronicDesignAutomationToolsandDesignMethods 25
2.6.1 ElectronicDesignAutomationTools 25
2.6.2 DesignMethods 28
2.6.3 PreviousApplicationofDesignMethodsPresentedinthisBook 29
References 30
3 MOSPerformanceversusDrainCurrent,InversionCoefficient,andChannelLength 33
3.1 Introduction 33
3.2 AdvantagesofSelectingDrainCurrent,InversionCoefficient,andChannelLength
inAnalogCMOSDesign 34
viii CONTENTS
3.2.1 OptimizingDrainCurrent,InversionCoefficient,andChannelLength
Separately 35
3.2.2 DesigninModerateInversion 35
3.2.3 DesignInclusiveofVelocitySaturationEffects 36
3.2.4 DesignwithTechnologyIndependence 36
3.2.5 SimplePredictionsofPerformanceandTrends 36
3.2.6 MinimizingIterativeComputerSimulations–“PreSPICE”Guidance 37
3.2.7 ObservingPerformanceTradeoffs–TheMOSFETOperatingPlane 37
3.2.8 Cross-CheckingwithComputerSimulationMOSModels 39
3.3 ProcessParametersforExampleProcesses 40
3.3.1 CalculationofCompositeProcessParameters 40
3.3.2 DC,Small-Signal,andIntrinsicGateCapacitanceParameters 42
3.3.3 FlickerNoiseandLocal-AreaDCMismatchParameters 44
3.3.4 Gate-OverlapandDrain–BodyCapacitanceParameters 45
3.3.5 TemperatureParameters 46
3.4 SubstrateFactorandInversionCoefficient 46
3.4.1 SubstrateFactor 47
3.4.2 InversionCoefficient 50
3.4.2.1 Traditionalinversioncoefficient 50
3.4.2.2 Fixed–normalizedinversioncoefficient 51
3.4.2.3 Usingthefixed–normalizedinversioncoefficient
indesign 52
3.4.2.4 Regionsandsubregionsofinversion 53
3.5 TemperatureEffects 55
3.5.1 BandgapEnergy,ThermalVoltage,andSubstrateFactor 55
3.5.2 Mobility,TransconductanceFactor,andTechnologyCurrent 57
3.5.3 InversionCoefficient 59
3.5.4 ThresholdVoltage 60
3.5.5 DesignConsiderations 60
3.6 SizingRelationships 61
3.6.1 ShapeFactor 62
3.6.2 ChannelWidth 64
3.6.3 GateAreaandSiliconCost 65
3.7 DrainCurrentandBiasVoltages 67
3.7.1 DrainCurrent 67
3.7.1.1 Withoutsmall-geometryeffects 68
3.7.1.2 Withvelocitysaturationeffects 70
3.7.1.3 WithVFMReffects 72
3.7.1.4 WithvelocitysaturationandVFMReffects 72
3.7.1.5 Theequivalentvelocitysaturationvoltage 75
3.7.1.6 Predictedandmeasuredvalues 76
3.7.1.7 Theextrapolatedthresholdvoltage 79
3.7.2 EffectiveGate–SourceVoltage 80
3.7.2.1 Withoutsmall-geometryeffects 80
3.7.2.2 WithvelocitysaturationandVFMReffects 82
3.7.2.3 Predictedandmeasuredvalues 86
3.7.2.4 Summaryoftrends 88
3.7.3 Drain–SourceSaturationVoltage 89
3.7.3.1 Physicalversuscircuitdefinition 89
3.7.3.2 Withoutsmall-geometryeffects 90
3.7.3.3 Withvelocitysaturationeffects 92