TPS65094x PMIC for Intel™ Apollo Lake Platform

92 Pages·2016·1.77 MB·English

Product Order Technical Tools & Support &
Folder Now Documents Software Community
TPS65094
ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019
适适用用于于 Intel™ Apollo Lake 平平台台的的 TPS65094 PMIC
1 器器件件概概述述
1.1 特特性性
1
• 5.6V至21V 的宽输入电压范围 (V1P24A)，输出电流为2A
• 三个可变输出电压同步 • 三个具有可调输出电压的LDO稳压器
降压控制器D-CAP2™拓扑 – LDOA1：I2C可选输出电压为1.35V 至3.3V，输
– 对于BUCK1(VNN)，电流为5A；对于BUCK6 出电流高达200mA
(VDDQ)，电流为7A，对于典型应用中使用外部 – LDOA2 和LDOA3：I2C可选输出电压为0.7V 至
FET的BUCK2(VCCGI)，电流为21A 1.5V，输出电流高达600mA
– 针对BUCK1和BUCK2 • 适用于DDR存储器终端的VTTLDO
– 对于BUCK6(VDDQ)，提供OTP 可编程默认输 • 三个具有压摆率控制功能的负载开关
出电压 – 输出电流高达400mA，压降小于标称输入电压的
• 三个可变输出电压同步 1.5%
降压转换器，采用DCS-Control拓扑技术并支持 – 输入电压为1.8V 时，R <96mΩ
DSON
I2CDVS功能 • I2C接口（器件地址0x5E）支持：
– 输入电压范围为4.5V至5.5V – 标准模式(100kHz)
– 对于BUCK3(VCCRAM)，输出电流为3A – 快速模式(400kHz)
– 对于典型应用中的BUCK4(V1P8A) 和BUCK5 – 快速模式+(1MHz)
1.2 应应用用
• 2节、3 节或4节锂离子电池供电产品（NVDC 或 • 平板电脑、超极本™和笔记本电脑
非NVDC） • 移动PC和移动互联网设备
• 壁式供电设计，特别是12V电源
1.3 说说明明
TPS65094器件是一款单芯片解决方案电源管理集成芯片(PMIC)，专为最新的Intel™处理器进行设计，这
些处理器以通过2节、3 节或4节锂离子电池组（NVDC 或非NVDC电源架构）供电的平板电脑、超极
本、笔记本、工业计算机和物联网(IOT)应用以及壁式供电的应用为目标。
TPS65094器件用于合并低电压轨的必需系统，以获得最小的尺寸和成本最低的系统电源解决方案。
TPS65094器件可提供基于Intel 参考设计的完整电源解决方案。由上电序列逻辑控制六个高效降压稳压器
(VR)、一个灌/拉LDO(VTT)、以及一个负载开关，以提供正确的电源轨、定序和保护—包括DDR3和
DDR4存储器电源。两个稳压器（BUCK1和BUCK2）支持动态电压调节(DVS)，可最大限度地提高效率
（包括支持联网待机功能）。高频VR采用小型电感和电容来减小解决方案体积。凭借I2C接口，可通过嵌
入式控制器(EC)或片上系统(SoC)轻松实现控制功能。
PMIC 采用带散热焊盘的8mm×8mm单行VQFN 封装，因此散热性能良好，电路板布线简单。
器器件件信信息息(1)
器器件件型型号号 封封装装 封封装装尺尺寸寸（（标标称称值值））
TPS65094 VQFN(64) 8.00mmx8.00mm
(1) 如需了解所有可用封装，请参阅产品说明书末尾的可订购产品附录。
1
本文档旨在为方便起见，提供有关TI产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问www.ti.com，其内容始终优先。TI不保证翻译的准确
性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
EnglishDataSheet:SWCS133
TPS65094
ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019 www.ti.com.cn
1.4 功功能能方方框框图图
Optional(a)
Required(b) LDO5V
EC PSSMLLPPIC__SSE34NBB LDOA1 1.352L1 0DV.80 O t VomA (3bA1).3 V DRV5V_2_A1 DRV5V_1_6VSEENT DApeBTpfUyalpiuCcilactK:at 1i1ol Vn BDDORRSVOVWHTL1111 VSYS VNN
SLP_S0B Control EN 0.5 VU stoa g1e.4:5 V FBVOUT1
LSDWOAL1S__EENN(b()a) Inputs (D5V AS) PGNDSNS1
ILIM1
THERMTRIPB
V1P8A VSYS
BOOT2
CLK DRVH2
SoC DATA I2C CTRL DeBfUauCltK: 20V SW2 VCCGI
V1P8A VSET DRVL2
EN Typical
Control Application FBVOUT2
Outputs Usage:
IRQB 0.5 V to 1.45 V PGNDSNS2
(DVS)
RPCSMH_RPSWTBROKIInntteerrrnuaplt CNTL 21 A FBGILNIMD22
PROCHOT Events UPT_ BUCK5V
GPO INTERR RTEEGSOTIST CTPTERRLS VSEENT DefaBuU3ltC :A 1K.305 V <PGND_BUCPKV3FLI>NXB333 VCCRAM
BUCK5V
PVIN4
VSYS
BUVCSKY5SV V5ANA Digital Core VSEENT DefBaUu2lC tA: K14.8 V FLBX44 V1P8A
LDO5V LLDDOO53P3 REFSYS nPUC <PGND_BUCK4> BUCK5V
VREF PVIN5
VSEENT DefaBuU2ltC :A 1K.524 V FLBX55 V1P24A
<PGND_BUCK5>
AGND
VSYS
Thermal
monitoring BOOT6
Thermal shutdown DRVH6
VSEENT DDeeBfapUueClnt:Kd Oe6TntP DRSVWL66 VDDQ
7 A FBVOUT6
PGNDSNS6
ILIM6
PVINVTT
EN ILIM½V Ts×Te V_t DLbDyD OOQTP VTTVFTBT VTT
VSET EN VSET EN EN EN EN
0.76 LV0D 0tOo m A1A2.5 V 0.76 LV0D 0tOo m A1A3.5 V LO3A0D0 SmWAA1 LO4A0D0 SmWAB1 LO4A0D0 SmWAB2
LDOA2 PVINLDOA2_A3 LDOA3 PVINSWA1 SWA1 SWB1 PVINSWB1_B2 SWB2
V1P8A(1)
Dashed connections optional. 0.5 V to 3.3 V 0.5 V to 3.3 V(2)
Refer to Pin Attributes for
connection if unused.
((((12ba)))) LDLLPDDDDOORDAA3RL11 31‡$ aROnZW(cid:3)d‡D$ \LOVZP(cid:3)2DD\DQV·R(cid:3)24Q· 0.5 V to 3.3 V SWA1 (1)V1P8U (2)SWB1_2
Copyright © 2016, Texas Instruments Incorporated
图图1-1.PMIC功功能能框框图图
2 器件概述 版权©2015–2019,TexasInstrumentsIncorporated
TPS65094
www.ti.com.cn ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019
内内容容
1 器器件件概概述述.................................................... 1 5.15 Switching Characteristics........................... 26
1.1 特性................................................... 1 5.16 Typical Characteristics.............................. 27
1.2 应用................................................... 1 6 DetailedDescription................................... 28
1.3 说明................................................... 1 6.1 Overview............................................ 28
1.4 功能方框图............................................ 2 6.2 FunctionalBlockDiagram........................... 29
2 修修订订历历史史记记录录............................................... 3 6.3 FeatureDescription................................. 31
3 DeviceOptions........................................... 5 6.4 DeviceFunctionalModes........................... 48
..................................... ........................................
3.1 OTPComparison 5 6.5 Programming 48
4 PinConfigurationandFunctions..................... 6 6.6 RegisterMaps....................................... 52
5 Specifications........................................... 10 7 ApplicationandImplementation.................... 71
......................... ..............................
5.1 AbsoluteMaximumRatings 10 7.1 ApplicationInformation 71
........................................ ..................................
5.2 ESDRatings 10 7.2 TypicalApplication 71
............... ................
5.3 RecommendedOperatingConditions 11 7.3 SpecificApplicationforTPS650944 80
................................. .....................................
5.4 Thermal Information 11 7.4 Do'sandDon'ts 81
5.5 ElectricalCharacteristics:TotalCurrent 8 PowerSupplyRecommendations.................. 81
........................................
Consumption 11 9 Layout.................................................... 82
5.6 ElectricalCharacteristics:ReferenceandMonitoring ...................................
.............................................. 9.1 Layout Guidelines 82
System 12
.....................................
......... 9.2 Layout Example 82
5.7 ElectricalCharacteristics:BuckControllers 13
10 器器件件和和文文档档支支持持.......................................... 83
5.8 ElectricalCharacteristics:SynchronousBuck
Converters........................................... 17 10.1 器件支持 ............................................ 83
5.9 ElectricalCharacteristics:LDOs.................... 20 10.2 文档支持............................................. 83
5.10 ElectricalCharacteristics:LoadSwitches........... 24 10.3 接收文档更新通知................................... 83
5.11 DigitalSignals:I2CInterface........................ 25 10.4 社区资源............................................. 83
5.12 DigitalInputSignals(LDOLS_EN,SWA1_EN, 10.5 商标.................................................. 83
THERMTRIPB,PMICEN,SLP_S3B,SLP_S4B, 10.6 静电放电警告........................................ 83
...........................................
SLP_S0B) 25 .............................................
10.7 Glossary 83
5.13 DigitalOutputSignals(IRQB.,..R.S..M..R..S.T..B.,........... 11 机机械械、、封封装装和和可可订订购购信信息息............................... 83
PCH_PWROK, PROCHOT) 25
.........................
............................... 11.1 PackageOptionAddendum 84
5.14 TimingRequirements 25
2 修修订订历历史史记记录录
注：之前版本的页码可能与当前版本有所不同。
ChangesfromRevisionB(February2017)toRevisionC Page
• 已更改在标题中将TPS65094x更改为TPS65094............................................................................... 1
• 已删除删除了每页顶部的型号...................................................................................................... 1
• Added"BUCK3-5Mode"rowand"TPS650945"columntoSummaryofTPS65094xOTPDifferencestable........... 5
• ChangedthedescriptionoftheVTTFBpininthePinFunctionstable........................................................ 8
• ChangedVSYStoPVINintheefficiencygraphsforBUCK3,BUCK4,andBUCK5intheTypicalCharacteristics
section................................................................................................................................ 27
• AddedtothedescriptionofthedeassertionconditionthatcausesanemergencyshutdownintheEmergency
Shutdownsection................................................................................................................... 47
• AddedTPS650945settingstoSection6.6...................................................................................... 52
• ChangedOCPeventtopowerfaulteventintheOCPbitdescriptionintheOFFONSRCRegisterField
Descriptionstable................................................................................................................... 54
• ChangedsecondreferenceofTPS650940toTPS650944forthebitresetvaluesintheLDOA2VIDRegister
FieldDescriptionsandLDOA3VIDRegisterFieldDescriptionstables....................................................... 61
• ChangedthebitvaluesoftheLDOA3_SLPVID[0]andLDOA3_VID[0]bitsintheLDOA3VIDRegisterfigure......... 61
版权©2015–2019,TexasInstrumentsIncorporated 修订历史记录 3
TPS65094
ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019 www.ti.com.cn
ChangesfromRevisionA(June2016)toRevisionB Page
• UpdatedthePROCHOTpindescriptioninthePinFunctionstable............................................................ 9
• ChangedthevaluesforLX3,LX4,LX5from–1Vand7Vto–2Vand8VintheAbsoluteMaximumRatingstable 10
• ChangedtheresetvalueoftheLDOA2VIDregister(LDOA2VID)toOTPdependent.................................... 61
• 已添加接收文档更新通知部分.................................................................................................... 83
• 已更改静电放电注意事项声明.................................................................................................... 83
ChangesfromSeptember11,2015toJune2,2016(from*Revision(September2015)toARevision) Page
• 将完整版产品说明书发布为SWCS133A版本（以前为SWCS130B版本）.................................................. 1
• 已更改将器件状态更改为PROD_DATA .......................................................................................... 1
• 已更改更改了建议最低输入电压.................................................................................................... 1
• 已更改特性完善转换器的说明.................................................................................................... 1
• 已更改特性达到400mA的负载开关输出电流................................................................................... 1
• 已更改功能框图以包含TPS65094x系列......................................................................................... 2
• 已更改更改了功能框图以在PROCHOT引脚上包含一个逆变器.............................................................. 2
• ChangedPROCHOTBtoPROCHOTthroughoutthedocument............................................................... 6
• Changedminimumabsolute-maximum-ratingvalueforSW1,SW2,andSW6inSection5.1............................ 10
• ChangedVSYSinSection5.3,RecommendedOperatingConditions ...................................................... 11
• DeletednominalvaluefromPVINVTTinSection5.3,RecommendedOperatingConditions ........................... 11
• Deleted(nu=symbolforefficiency) ............................................................................................. 13
• ChangedBUCK1DCoutputvoltagestepsizetoshowfullrangeandbeconsistentinSection5.7 .................... 13
• Changedtypotomatchcorrectdefaultof1VforΔV inSection5.7 ................................................. 13
OUT_TR
• ChangedBUCK2DCoutputvoltagetoshowfullrangeandbeconsistentinSection5.7................................ 14
• ChangedsetconditionforBUCK6forV rangeinSection5.7tomatchBUCK1andBUCK2 ........................ 15
OUT
• UpdatedformattingandaddednewOTPinformationforBUCK6inSection5.7........................................... 15
• UpdatedformattingforBUCK3DCoutputvoltageinSection5.8............................................................ 17
• ChangedDCoutputvoltageformattingforBUCK4inSection5.8 ........................................................... 18
• ChangedmaximumI valueforBUCK4inSection5.8tomatchdevicecapabilities ................................... 18
OUT
• ChangedI andΔV /ΔI forVTTLDOinSection5.9fornewOTPs................................................. 23
OUT OUT OUT
• ChangedtestconditionsforVTTLDOovercurrentprotectioninSection5.9............................................... 23
• ChangedSection5.10toshowSWB1_2R isspecifiedperoutput .................................................... 24
DSON
• Changedf valuesinSection5.15toprovidemorevalues ................................................................. 26
SW
• Changedcurrentto1.9AtomatchSoCrequirementsinTable6-1......................................................... 28
• ChangedBUCK6,LDOA2,LDOA3typicaloutputvoltagerangeto:OTPDependentinTable6-1...................... 28
• ChangedtablenotetoincludeadditionalDDRtypesinTable6-1........................................................... 28
• ChangedPMICFunctionalBlockDiagramtomatchspecificationstable ................................................... 30
• ChangedPROCHOTBtoPROCHOTintheApolloLakePowerMap ....................................................... 30
• ChangedcurrentratingsinApolloLakePowerMap........................................................................... 30
• DeletedSWBxPGfromPGofPCH_PWROKinTable6-2................................................................... 31
• ChangedBUCK1–2toallBUCKsandLDOAsinSection6.3.3.3............................................................ 36
• AddedTable6-5andTable6-6toSection6.3.4.2............................................................................. 38
• AddedmoreDDRvaluestothetablenoteinTable6-7....................................................................... 39
• ChangedSection6.3.5toincludeLDOA1andresetinformation............................................................. 40
• ChangedSection6.6toincludemultipleDDRs................................................................................. 40
• ChangedFigure6-7andFigure6-8toincludealternateSWB1_2Timing.................................................. 42
• ChangedSWB1_2from:V3P3Ato:V1P8UinTable6-10.................................................................... 42
• ChangedVDDQvoltagetoOTPDependentandSWBxtoSWB1_2inTable6-11 ....................................... 44
• UpdatedFigure6-10toincludealternateSWB1_2Timing.................................................................... 45
• ChangedSection6.3.5.5toincludealternateSWB1_2Timing............................................................... 46
• ChangedSection6.3.5.6toincludeTHERMTRIPB ........................................................................... 47
• AddedtheTPS65094xfamilyOTPvaluestoSection6.6..................................................................... 52
• ReplacedVIDvalueswithlinktofullVIDtableinTable6-18andTable6-19.............................................. 55
• UpdatednamingofbitsintheTEMPHOTregister.............................................................................. 70
4 修订历史记录 Copyright©2015–2019,TexasInstrumentsIncorporated
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094
TPS65094
www.ti.com.cn ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019
3 Device Options
3.1 OTP Comparison
Table3-1summarizesthedifferencesbetweenthevariousTPS65094xfamilyOTPs.
Table3-1.SummaryofTPS65094xOTPDifferences
TPS650940 TPS650941 TPS650942 TPS650944 TPS650945
DDR LPDDR4 LPDDR3 DDR3L LPDDR4 LPDDR4
BUCK6Voltage 1.1V 1.2V 1.35V 1.1V 1.1V
VTTDisabled Yes No No Yes Yes
VTTIOCP(minimum) 0.95A 0.95A 1.8A 1.8A 0.95A
SWB1_2controlledbySLP_S4B
Yes Yes No Yes Yes
(V1P8U)
SWB1_2controlledbySLP_S3B No No Yes No No
Pin14Usage LDOLS_EN LDOLS_EN LDOLS_EN SWA1_EN LDOLS_EN
LDOA1AlwaysOn No No No Yes No
LDOA1DefaultVoltage 3.3V 3.3V 3.3V 1.8V 3.3V
LDOA2DefaultVoltage 1.2V 1.2V 1.2V 0.7V 1.2V
LDOA3DefaultVoltage 1.25V 1.25V 1.25V 0.7V 1.25V
PMICENLowForcesReset Yes Yes Yes No Yes
DEVICEIDRegister 8h 29h 1Ah 0Bh 8h
BUCK3-5Mode Auto Auto Auto Auto ForcedPWM
Copyright©2015–2019,TexasInstrumentsIncorporated DeviceOptions 5
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094
TPS65094
ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019 www.ti.com.cn
4 Pin Configuration and Functions
RSKPackage
64-PinVQFNWithThermalPad
TopView
3
B A
P _
RI A2
B B B T O
ILIM2 SLP_S4 SLP_S3 SLP_S0 THERM DATA CLK V5ANA LDO5P0 VSYS LDO3P3 VREF AGND LDOA2 PVINLD LDOA3
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
FBGND2 1 48 VTTFB
FBVOUT2 2 47 VTT
DRVH2 3 46 PVINVTT
SW2 4 45 ILIM6
BOOT2 5 44 FBVOUT6
PGNDSNS2 6 43 DRVH6
DRVL2 7 42 SW6
DRV5V_2_A1 8 TOP VIEW 41 BOOT6
PGND/Thermal Pad
LDOA1 9 40 PGNDSNS6
LX3 10 39 DRVL6
PVIN3 11 38 DRV5V_1_6
FB3 12 37 DRVL1
PMICEN 13 36 PGNDSNS1
LDOLS_EN or
14 35 BOOT1
SWA1_EN
IRQB 15 34 SW1
RSMRSTB 16 33 DRVH1
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1 2 2 5 5 5 4 4 4 O K T 1 1 1 1
SWB NSWB1_B SWB LX PVIN FB FB PVIN LX GP H_PWRO PROCHO FBVOUT ILIM SWA PVINSWA
VI PC
P
NOTE: Thethermalpadmustbeconnectedtothesystempowergroundplane.
6 PinConfigurationandFunctions Copyright©2015–2019,TexasInstrumentsIncorporated
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094
TPS65094
www.ti.com.cn ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019
PinFunctions
PIN SUPPLY,OP
I/O VOLTAGE DESCRIPTION
NO. NAME LEVEL
SMPSREGULATORS
RemotenegativefeedbacksenseforBUCK2controller.ConnecttoVCCGIVSS
1 FBGND2 I
SENSEsentfromtheSoCtothePMIC.
RemotepositivefeedbacksenseforBUCK2controller.ConnecttoVCCGIVCC
2 FBVOUT2 I
SENSEsentfromtheSoCtothePMIC.
3 DRVH2 O VSYS+5V High-sidegatedriveroutputforBUCK2controller
4 SW2 I SwitchnodeconnectionforBUCK2controller
BootstrappinforBUCK2controller.Connecta100-nFceramiccapacitorbetween
5 BOOT2 I VSYS+5V
thispinandSW2pin.
PowerGNDconnectionforBUCK2.Connecttogroundterminalofexternallow-
6 PGNDSNS2 I
sideFET.
7 DRVL2 O 5V Low-sidegatedriveroutputforBUCK2controller
5-VsupplytoBUCK2gatedriverandLDOA1.Bypasstogroundwitha2.2-µF
8 DRV5V_2_A1 I 5V
(typical)ceramiccapacitor.ShortedonboardtoLDO5P0pin.
SwitchnodeconnectionforBUCK3converter.Connecttoa0.47-µH(typical)
10 LX3 O
inductorwithlessthan50-mΩDCR.
PowerinputtoBUCK3converter.Bypasstogroundwitha10-µF(typical)ceramic
11 PVIN3 I 5V
capacitor.
RemotefeedbacksenseforBUCK3converter.Connecttopositiveterminalof
12 FB3 I
outputcapacitor.
SwitchnodeconnectionforBUCK5converter.Connecttoa0.47-µH(typical)
20 LX5 O
inductorwithlessthan50-mΩDCR.
PowerinputtoBUCK5converter.Bypasstogroundwitha10-µF(typical)ceramic
21 PVIN5 I 5V
capacitor.
RemotefeedbacksenseforBUCK5converter.Connecttopositiveterminalof
22 FB5 I
outputcapacitor.
RemotefeedbacksenseforBUCK4converter.Connecttopositiveterminalof
23 FB4 I
outputcapacitor.
PowerinputtoBUCK4converter.Bypasstogroundwitha10-µF(typical)ceramic
24 PVIN4 I 5V
capacitor.
SwitchnodeconnectionforBUCK4converter.Connecttoa0.47-µH(typical)
25 LX4 O
inductorwithlessthan50-mΩDCR.
RemotefeedbacksenseforBUCK1controller.ConnecttoVNNVCCSENSEsent
29 FBVOUT1 I
fromtheSoCtothePMIC.
CurrentlimitsetpinforBUCK1controller.Fitaresistorfromthispintogroundto
30 ILIM1 I
setcurrentlimitofexternallow-sideFET.
33 DRVH1 O VSYS+5V High-sidegatedriveroutputforBUCK1controller
34 SW1 I SwitchnodeconnectionforBUCK1controller
BootstrappinforBUCK1controller.Connecta100-nFceramiccapacitorbetween
35 BOOT1 I VSYS+5V
thispinandSW1pin.
PowerGNDconnectionforBUCK1.Connecttogroundterminalofexternallow-
36 PGNDSNS1 I
sideFET.
37 DRVL1 O 5V Low-sidegatedriveroutputforBUCK1controller
5-VsupplytoBUCK1andBUCK6gatedrivers.Bypasstogroundwitha2.2-µF
38 DRV5V_1_6 I 5V
(typical)ceramiccapacitor.ShortedonboardtoLDO5P0pin.
39 DRVL6 O 5V Low-sidegatedriveroutputforBUCK6controller
PowerGNDconnectionforBUCK6.Connecttogroundterminalofexternallow-
40 PGNDSNS6 I
sideFET.
BootstrappinforBUCK6controller.Connecta100-nFceramiccapacitorbetween
41 BOOT6 I VSYS+5V
thispinandSW6pin.
42 SW6 I SwitchnodeconnectionforBUCK6controller
43 DRVH6 O VSYS+5V High-sidegatedriveroutputforBUCK6controller
Copyright©2015–2019,TexasInstrumentsIncorporated PinConfigurationandFunctions 7
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094
TPS65094
ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019 www.ti.com.cn
PinFunctions (continued)
PIN SUPPLY,OP
I/O VOLTAGE DESCRIPTION
NO. NAME LEVEL
RemotefeedbacksenseforBUCK6controller.Connecttopositiveterminalof
44 FBVOUT6 I
outputcapacitor.
CurrentlimitsetpinforBUCK6controller.Fitaresistorfromthispintogroundto
45 ILIM6 I
setcurrentlimitofexternallow-sideFET.
CurrentlimitsetpinforBUCK2controller.Fitaresistorfromthispintogroundto
64 ILIM2 I
setcurrentlimitofexternallow-sideFET.
LDOandLOADSWITCHES
LDOA1output.Bypasstogroundwitha4.7-µF(typical)ceramiccapacitor.Leave
9 LDOA1 O 1.35–3.3V
floatingwhennotinuse.
0.5–3.3V
OutputofloadswitchB1.Bypasstogroundwitha0.1-µF(typical)ceramic
17 SWB1 O (1.8-V
capacitor.ShortwithSWB2.
Typical)
0.5–3.3V PowersupplytoloadswitchB1andB2.Bypasstogroundwitha1-µF(typical)
18 PVINSWB1_B2 I (1.8-V ceramiccapacitortoimprovetransientperformance.Connecttogroundwhennot
Typical) inuse.
0.5–3.3V
OutputofloadswitchB2.Bypasstogroundwitha0.1-µF(typical)ceramic
19 SWB2 O (1.8-V
capacitor.ShortwithSWB1.Leavefloatingwhennotinuse.
Typical)
OutputofloadswitchA1.Bypasstogroundwitha0.1-µF(typical)ceramic
31 SWA1 O 0.5–3.3V
capacitor.Leavefloatingwhennotinuse.
PowersupplytoloadswitchA1.Bypasstogroundwitha1-µF(typical)ceramic
32 PVINSWA1 I 0.5–3.3V
capacitortoimprovetransientperformance.Connecttogroundwhennotinuse.
PowersupplytoVTTLDO.Bypasstogroundwitha10-µF(minimum)ceramic
46 PVINVTT I VDDQ
capacitor.Connecttogroundwhennotinuse.
OutputofloadVTTLDO.Bypasstogroundwith2×22-µF(minimum)ceramic
47 VTT O VDDQ/2
capacitors.Leavefloatingwhennotinuse.
RemotefeedbacksenseforVTTLDO.Connecttopositiveterminalofoutput
48 VTTFB I VDDQ/2
capacitor.ShorttoGNDwhennotinuse.
OutputofLDOA3.Bypasstogroundwitha4.7-µF(typical)ceramiccapacitor.
49 LDOA3 O 0.7–1.5V
Leavefloatingwhennotinuse.
PowersupplytoLDOA2andLDOA3.Bypasstogroundwitha4.7-µF(typical)
50 PVINLDOA2_A3 I 1.8V
ceramiccapacitor.Connecttogroundwhennotinuse.
OutputofLDOA2.Bypasstogroundwitha4.7-µF(typical)ceramiccapacitor.
51 LDOA2 O 0.7–1.5V
Leavefloatingwhennotinuse.
Outputof3.3-VinternalLDO.Bypasstogroundwitha4.7-µF(typical)ceramic
54 LDO3P3 O 3.3V
capacitor.
Outputof5-VinternalLDOoraninternalswitchthatconnectsthispintoV5ANA.
56 LDO5P0 O 5V
Bypasstogroundwitha4.7-µF(typical)ceramiccapacitor.
External5-VsupplyinputtointernalloadswitchthatconnectsthispintoLDO5P0
57 V5ANA I 5V pin.Bypassthispinwithanoptionalceramiccapacitortoimprovetransient
performance.
8 PinConfigurationandFunctions Copyright©2015–2019,TexasInstrumentsIncorporated
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094
TPS65094
www.ti.com.cn ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019
PinFunctions (continued)
PIN SUPPLY,OP
I/O VOLTAGE DESCRIPTION
NO. NAME LEVEL
INTERFACE
PMICcold-bootpin.Atassertionrisingedgeofthesignalofthispinpowerstate
13 PMICEN I
transitionsfromG3toS4/S5.DrivingthepintoLshutsdownallVRs.
EnablepinforLDOA2,LDOA3,andSWA1whenOTPisconfiguredto
LDOLS_EN.EnablepinforjustSWA1whenOTPisconfiguredtoSWA1_EN.
LDOLS_ENor
14 I Resourcesturnonatassertion(H)andturnoffatdeassertion(L)ofthepin.
SWA1_EN
Optionally,whenthepinispulledlow,thehostcanwritetoenablebitsinReg
0xA0–Reg0xA1tocontroltherails.
Open-drainoutputinterruptpin.RefertoSection6.6.3,IRQ:PMICInterrupt
15 IRQB O
Register,fordefinitions.
Open-drainoutputAlways-ON-railPowerGood.Itreflectsavalidstatewhenever
16 RSMRSTB O
VSYSisavailable.
Open-drainoutputcontrolledbyanI2CregisterbitdefinedinSection6.6.26,
26 GPO O GPO_CTRL:GPOControlRegister,bytheuser,whichthencanbeusedasan
enablesignaltoanexternalVR.
Open-drainoutputglobalPowerGood.ItreflectsavalidstatewheneverVSYSis
27 PCH_PWROK O
available.
Optionalopen-drainoutputforindicatingPMICthermalevent.Invertbefore
28 PROCHOT O connectingtoSoCifused,otherwiseleavefloating.Thispinistriggeredwhenany
ofthePMICdietemperaturesensorsdetectstheT temperature.
HOT
58 CLK I I2Cclock
59 DATA I/O I2Cdata
60 THERMTRIPB I ThermalshutdownsignalfromSoC
Powerstatepin.PMICgoesintoConnectedStandbyatfallingedgeandexitsfrom
61 SLP_S0B I
ConnectedStandbyatrisingedge.
Powerstatepin.PMICgoesintoS3atfallingedgeandexitsfromS3,transitions
62 SLP_S3B I
intoS0atrisingedge.
Powerstatepin.PMICgoesintoS4atfallingedgeandexitsfromS4,transitions
63 SLP_S4B I
intoS3atrisingedge.
REFERENCE
Band-gapreferenceoutput.Stabilizeitbyconnectinga100-nF(typical)ceramic
53 VREF O 1.25V
capacitorbetweenthispinandquietground.
Analogground.Donotconnecttothethermalpadgroundontoplayer.Connectto
52 AGND —
groundofVREFcapacitor.
SystemvoltagedetectionandinputtointernalLDOs(3.3Vand5V).Bypassto
55 VSYS I
groundwitha1-µF(typical)ceramiccapacitor.
THERMALPAD
ConnecttoPCBgroundplaneusingmultipleviasforgoodthermalandelectrical
— Thermalpad —
performance.
Copyright©2015–2019,TexasInstrumentsIncorporated PinConfigurationandFunctions 9
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094
TPS65094
ZHCSFJ2C–SEPTEMBER2015–REVISEDFEBRUARY2019 www.ti.com.cn
5 Specifications
5.1 Absolute Maximum Ratings
overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)
MIN MAX UNIT
ANALOG
VSYS Inputvoltagefrombattery –0.3 28 V
PVIN3,PVIN4,PVIN5,LDO5P0,DRV5V_1_6,DRV5V_2_A1,DRVL1,DRVL2,DRVL6 –0.3 7 V
V5ANA –0.3 6 V
PGNDSNS1,PGNDSNS2,PGNDSNS6,AGND,FBGND2 –0.3 0.3 V
DRVH1,DRVH2,DRVH6,BOOT1,BOOT2,BOOT6 –0.3 34 V
SW1,SW2,SW6 –5(2) 28 V
LX3,LX4,LX5 –2(3) 8 V
BOOTxtoSWx Differentialvoltage –0.3 5.5 V
VREF,LDO3P3,FBVOUT1,FBVOUT2,FBVOUT6,FB3,FB4,FB5,ILIM1,ILIM2,ILIM6,PVINVTT,
–0.3 3.6 V
VTT,VTTFB,PVINSWA1,SWA1,PVINSWB1_B2,SWB1,SWB2,LDOA1
PVINLDOA2_A3,LDOA2,LDOA3 –0.3 3.3 V
DIGITALIOs
DATA,CLK,PCH_PWROK,RSMRSTB,GPO –0.3 3.6 V
PMICEN,SLP_S4B,SLP_S3B,SLP_S0B,LDOLS_EN,SWA1_EN,THERMTRIPB,IRQB,PROCHOT –0.3 7 V
Storagetemperature,T –40 150 °C
stg
(1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings
only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating
Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2) Transientforlessthan5ns.
(3) Transientforlessthan20ns.
5.2 ESD Ratings
VALUE UNIT
Electrostatic HumanBodyModel(HBM),perANSI/ESDA/JEDECJS001(1) ±1000
V V
ESD discharge ChargedDeviceModel(CDM),perJESD22-C101(2) ±250
(1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
(2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess.
10 Specifications Copyright©2015–2019,TexasInstrumentsIncorporated
SubmitDocumentationFeedback
ProductFolderLinks:TPS65094