THERMAL STRESS AND STRAIN IN MICROELECTRONICS PACKAGING THERMAL STRESS AND STRAIN IN MICROELECTRONICS PACKAGING Edited by John H. Lau fnDBI VAN NOSTRAND REINHOLD ~ _ _ N ewYork Copyright © 1993 by Van Nostrand Reinhold Softcover reprint of the hardcover 1s t edition 1993 Library of Congress Catalog Card Number 92-43285 ISBN 978-1-4684-7769-6 ISBN 978-1-4684-7767-2 (eBook) DOl 10_1007/978-1-4684-7767-2 All rights reserved_ No part of this work covered by the copyright hereon may be reproduced or used in any form or by any means - graphic, electronic, or mechanical, including photocopying, recording, taping, or information storage and retrieval systems - without written permission of the publisher. I(f)P Van Nostrand Reinhold is a division of International Thomson Publishing. ITP logo is a trademark under license. Van Nostrand Reinhold 115 Fifth Avenue New York, New York 10003 International Thomson Publishing Berkshire House 168-173 High Holborn London WCIV 7AA, England Thomas Nelson Australia 102 Dodds Street South Melbourne 3205 Victoria, Australia Nelson Canada 1120 Birchmount Road Scarborough, Ontario MIK 5G4, Canada 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Library of Congress Cataloging-in-Publication Data Thermal stress and strain in microelectronics packaging / edited by John H. Lau. p. cm. Includes bibliographical references and index. ISBN 978-1-4684-7769-6 1. Electronic packaging. 2. Microelectronic packaging. 3. Thermal stresses. I. Lau, John H. TK7870.15.T48 1993 621.381'046--dc20 92-43285 CIP Contents Preface xvii Acknowledgments xxi 1. Thermomechanics for Electronics Packaging 1 1.1 Introduction 1 1.2 Fundamental Equations of Thermoelasticity for Electronics Packaging 2 1.2.1 Assumptions 2 1.2.2 Fundamental Equations of Thermoelasticity 2 1.3 Governing Equations of Thermoelasticity for Electronics Packaging 4 1.3.1 Coupled Thermoelasticity 4 1.3.2 Coupled-Quasi-Static Thermoelasticity 4 1.3.3 Uncoupled-Quasi-Static Thermoelasticity 5 1.3.4 Theory of Isotropic Thermal Stresses 6 1.3.5 Temperature-Dependent Strain Energy Density 8 1.4 Boundary Value Problems for Electronics Packaging 9 1.5 Thermoelastic Example Problems for Electronics Packaging 9 1.5.1 Chip on a Semi-infinite Substrate 9 1.5.2 Chip on a Finite Substrate 12 1.6 Analysis of Stress 17 1.6.1 Three-dimensional Stress State 17 1.6.2 Two-dimensional Stress State 20 1. 7 Analysis of Strain 22 v vi CONTENTS 1.7.1 Three-dimensional Strain State 22 1.7.2 Two-dimensional Strain State 24 1.8 Geometric Nonlinearity 25 1.8.1 Strain Components in Lagrangian Coordinates 25 1.8.2 Strain Components in Eulerian Coordinates 26 1.8.3 Large-Deflection Example Problem for Electronics Packaging 26 1.9 Material Nonlinearity 31 1.9.1 Hyperelasticity 32 1.9.2 Plasticity 38 1.9.3 Viscoelasticity 61 1.9.4 Viscoplasticity 62 1.9.5 Creep 63 1.10 Summary and Recommendations 70 References 72 2. Thermal Expansivity and Thermal Stress in Multilayered Structures 78 2.1 Introduction 78 2.2 Analysis 80 2.3 Spreadsheet Calculation of Stress in N Layers 85 2.3.1 The Axisymmetric Assumption 92 2.4 Conclusion 93 References 93 3. Thermal Stresses in Anisotropic Multilayered Structures 95 3.1 Introduction 95 3.2 Elasticity of an Orthotropic Layer Referred to the Global Coordinates of the Laminate 98 3.3 Thermal Stress Problem of a Rectangular Laminate 101 3.4 Stress Functions: Interface and Boundary Conditions 105 3.5 Generalized Plane Deformation of a Laminated Strip 107 3.6 The Principle of Complementary Virtual Work 108 3.7 Polynomial Approximations of the Stress Functions 110 3.8 Differential Equations and Boundary Conditions for the Coefficient Functions 112 e 3.9 Determination of the Deformation Parameters B, C, and 113 3.10 Solution of the Eigenvalue Problem 115 3.11 Isotropic and Specially Orthotropic Laminates 116 3.12 Thermal Stress in the Vicinity of a Curved Free Edge 117 CONTENTS vii 3.13 Layered Beams 118 3.14 Refinement and Regression of the Polynomial Approximation 120 3.15 Measures of the Criticality of the Interlaminar Stresses 121 3.16 Examples: Three-Layer Anisotropic Laminates and Isotropic Beams 123 3.17 Concluding Remarks 127 Nomenclature 130 Appendix 3A 131 References 137 4. Transient Thermal Stresses in Multilayered Devices 139 4.1 Introduction 139 4.2 Transient Heat Transfer Solutions 141 4.3 Variational Principle for the Thermoelasticity Problem 143 4.4 Asymptotic Thermal Stress Distribution Near Free Edge 146 4.4.1 Homogeneous Asymptotic Solution 148 4.4.2 Particular Asymptotic Solution 150 4.5 Formulations of Hybrid Singular Element 151 4.5.1 Formulation 151 4.5.2 Verification of the Special Hybrid Element 154 4.6 Green's Function Integration Method 158 4.7 Transient Behaviors of Multilayered Devices 163 4.8 Design Based on Transient Thermal Stresses 167 4.8.1 Crack Initiation 168 4.8.2 Thermal Fatigue 168 4.9 Discussion and Summary 169 References 170 5. Temperature Dependence of Thermal Expansion of Materials for Electronics Packages 173 5.1 Introduction 173 5.2 Theory 174 5.3 Experimental 176 5.4 Results and Discussion 180 5.4.1 Ceramics 180 5.4.2 Metals 183 5.4.3 Sandwiches (Cu-Invar-Cu and Cu-Mo-Cu) 184 5.4.4 Organic Boards and Packages 189 5.5 Summary 190 References 192 viii CONTENTS 6. Thermal Stress Considerations in Die-Attachment 194 6.1 Introduction 194 6.2 Properties of Die-Attach Materials for Various Applications 195 6.3 Analytical Consideration of Thermal Stresses in Die-Attach 197 6.3.1 Timoshenko and Other Models 197 6.3.2 Calculation of Maximum Die Stress 199 6.3.3 Suhir's Model 205 6.3.4 Numerical Calculation of Die Stress 209 6.4 Die Stress Measurement 210 6.4.1 Piezoresistive Stress Sensors 211 6.4.2 Fractional Fringe Moire Interferometry 211 6.5 Quality of Die-Attach (Effect of Voids) and Relationship to Die Stress 212 6.5.1 Voids and Die Stress 212 6.5.2 Nondestructive Determination of Die-Attach Quality 214 6.5.3 Methods of Improving Die-Attach Quality 215 6.6 Conclusion 215 Nomenclature 216 References 216 7. Die Stress Measurement Using Piezoresistive Stress Sensors 221 7.1 Introduction 221 7.2 Theory of Piezoresistive Sensors 223 7.2.1 Background 223 7.2.2 Phenomenological Theory 224 7.2.3 Theory of the Piezoresistive Coefficients 232 7.3 Experimental Measurements of Piezoresistive Coefficients 240 7.4 Stress Sensor Geometries 247 7.5 Experimental Designs and Calibration 255 7.5.1 Chip Layout 255 7.5.2 Calibration 259 7.6 Experimental Stress Measurements 261 7.7 Summary 267 References 268 8. Analysis of the Thermal Loading on Electronics Packages by Enhanced Moire Interferometry 272 8.1 Introduction 272 8.1.1 Displacement Measurements 273 8.2 Essentials of Moire Interferometry 274 CONTENTS ix 8.2.1 Specimen Grating 274 8.2.2 Moire Interferometry 276 8.3 Digital Image Analysis Enhanced Moire Interferometry 280 8.3.1 Mechanism of Fringe Formation 281 8.3.2 Fractional Fringe Analysis 284 8.3.3 Digital Image Processing 286 8.4 Full-Field Analysis of Thermally Induced Deformations 287 8.4.1 Thermal Strain Measurements in IC-Packages 288 8.4.2 Effect of Conformal Coating on Strain Relief in Packages 297 8.5 Conclusions and Future Trends 299 References 303 9. Correlation of Analytical and Experimental Approaches to Determination of Thermally Induced Printed Wiring Board (PWB) Warpage 305 9.1 Introduction 305 9.2 Finite Element Analysis for PWB Warpage 306 9.2.1 PWB Geometric Configurations 307 9.2.2 Modeling Assumptions and Techniques 308 9.2.3 Sensitivity Analysis for Mechanical Properties 312 9.2.4 Mechanical Property Measurements 314 9.2.5 Discussion of Analytical Results 316 9.3 Experimental Verification of PWB Warpage 318 9.3.1 Overview of Experimental Technique - Shadow Moire 318 9.3.2 Sample Preparation 319 9.3.3 Experimental Setup 320 9.3.4 Experimental Procedures 321 9.3.5 Comparison of Experimental and Analytical Results 322 9.3.6 Implications and Ramifications 326 9.4 Conclusions 327 References 327 10. Thermal Stress-Induced Open-Circuit Failure in Microelectronics Thin-Film Metallizations 329 10.1 Introduction 329 10.2 Thermodynamics of Stressed Solids 332 10.3 A Stress-Induced Diffusion Failure Model 335 10.4 Discussion of Experimental Results of Isothermal Aging 341 10.4.1 Temperature Effect 341 x CONTENTS lO.4.2 Line Width Effect 343 10.4.3 Line Thickness Effect 343 10.4.4 Passivation Effect 344 10.5 Failure of Interconnects Under Thermal Fatigue 346 lO.5.1 Sample Preparation 346 lO.5.2 Testing and Results 348 lO.5.3 Comparison of Experiment and Theoretical Prediction 350 lO.6 Summary 351 Appendix lOA 352 Nomenclature 354 References 355 11. Thermal Stress and Stress-Induced Voiding in Passivated Narrow Line Metallizations on Ceramic Substrates 360 11.1 Introduction 360 11.2 Measurement of Stresses in Metallizations 362 11.2.1 Wafer Curvature Methods 362 11.2.2 X-Ray Diffraction Stress Measurement 363 11.3 Estimation of Thermal Stresses in Passivated Line Metallizations 365 11.3.1 Eshelby Theory of Inclusions 365 11.3.2 Reduction to Two-Dimensional Problem 367 11.3.3 The Problem of the Heterogeneous Inclusion 371 11.3.4 The Effects of Finite Passivation 372 11.4 Stress Relaxation and Void Formation 373 11.4.1 Stresses After Redistribution 374 11.4.2 Void Nucleation 375 11.4.3 Stress Relaxation by Void Growth 376 11.5 Summary 381 References 382 12. Predicted Bow of Plastic Packages of Integrated Circuit (IC) Devices 385 12.1 Introduction 385 12.2 Thin Plastic Package 386 12.2.1 Basic Equations 386 12.2.2 Curvature 389 12.2.3 Maximum Bow 389 12.2.4 Zero Bow Condition 390 12.2.5 Special Case: Bimaterial Assembly 392 12.2.6 Numerical Examples and Discussion 392