Marijn Heule Sean Weaver (Eds.) Theory and Applications 0 4 of Satisfiability Testing – 3 9 S C SAT 2015 N L 18th International Conference Austin, TX, USA, September 24–27, 2015 Proceedings 123 Lecture Notes in Computer Science 9340 Commenced Publication in 1973 Founding and Former Series Editors: Gerhard Goos, Juris Hartmanis, and Jan van Leeuwen Editorial Board David Hutchison Lancaster University, Lancaster, UK Takeo Kanade Carnegie Mellon University, Pittsburgh, PA, USA Josef Kittler University of Surrey, Guildford, UK Jon M. Kleinberg Cornell University, Ithaca, NY, USA Friedemann Mattern ETH Zurich, Zürich, Switzerland John C. Mitchell Stanford University, Stanford, CA, USA Moni Naor Weizmann Institute of Science, Rehovot, Israel C. Pandu Rangan Indian Institute of Technology, Madras, India Bernhard Steffen TU Dortmund University, Dortmund, Germany Demetri Terzopoulos University of California, Los Angeles, CA, USA Doug Tygar University of California, Berkeley, CA, USA Gerhard Weikum Max Planck Institute for Informatics, Saarbrücken, Germany More information about this series at http://www.springer.com/series/7407 Marijn Heule Sean Weaver (Eds.) (cid:129) Theory and Applications fi – of Satis ability Testing SAT 2015 18th International Conference – Austin, TX, USA, September 24 27, 2015 Proceedings 123 Editors Marijn Heule SeanWeaver University of Texas TrustedSystems Research Group Austin, TX Fort Meade, MD USA USA ISSN 0302-9743 ISSN 1611-3349 (electronic) Lecture Notesin Computer Science ISBN 978-3-319-24317-7 ISBN978-3-319-24318-4 (eBook) DOI 10.1007/978-3-319-24318-4 LibraryofCongressControlNumber:2015948854 LNCSSublibrary:SL1–TheoreticalComputerScienceandGeneralIssues SpringerChamHeidelbergNewYorkDordrechtLondon ©SpringerInternationalPublishingSwitzerland2015 Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartofthe material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilarmethodologynow knownorhereafterdeveloped. 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Printedonacid-freepaper SpringerInternationalPublishingAGSwitzerlandispartofSpringerScience+BusinessMedia (www.springer.com) Preface This volume contains the papers presented at the 18th International Conference on Theory and Applications of Satisfiability Testing (SAT 2015), held during September 24–27,2015inAustin,Texas,USA.SAT2015wascolocatedwithFormalMethodsin Computer-AidedDesign(FMCAD2015)andwashostedbytheUniversityofTexasat Austin. The International Conference on Theory and Applications of Satisfiability Testing (SAT) is the primary annual meeting for researchers focusing on the theory and applications of the propositional satisfiability problem, broadly construed: Besides plain propositional satisfiability, it includes Boolean optimization (including MaxSAT and Pseudo-Boolean (PB), constraints), Quantified Boolean Formulas (QBF), Satisfi- ability Modulo Theories (SMT), and Constraint Programming (CP) for problems with clear connections to propositional reasoning. Many hard combinatorial problems can be tackled using SAT-based techniques, including problems that arise in formal veri- fication, artificial intelligence, operations research, biology, cryptology, data mining, machine learning, mathematics, etc. Indeed, the theoretical and practical advances in SAT research over the past 20 years have contributed to making SAT technology an indispensable tool in various domains. SAT 2015 welcomed scientific contributions addressing different aspects of SAT, including(butnotrestrictedto)theoreticaladvances(includingexactalgorithms,proof complexity, and other complexity issues), practical search algorithms, knowledge compilation, implementation-level details of SAT solvers and SAT-based systems, problemencodingsandreformulations,applications,aswellascasestudiesandreports on insightful findings based on rigorous experimentation. Atotalof70papersweresubmittedtoSAT2015,distributedinto44regularpapers (up to 15 pages excluding references), 17 short papers (up to eight pages excluding references), and nine tool papers (up to six pages excluding references). In contrast to recent SAT conferences, no paper submission was found to be out of scope for the conference. All 70 submissions were assigned for review to at least four Program Committee members and their selected external reviewers. Continuing the procedure initiated in SAT 2012, the review process included an author-response period, during which the authors of submitted papers were given the opportunity to respond to the initial reviews for their submissions. For reaching final decisions, a Program Com- mittee discussion period followed the author-response period. This year, external reviewerssupportingtheProgramCommitteewerealsoinvitedtoparticipatedirectlyin the discussions for the papers they reviewed. In the end, the Program Committee decidedtoaccept21regularpapers,twoshortpapers,andseventoolpapers.Twoshort papers were downgraded to tool papers. In addition to presentations on the accepted papers, the scientific program of SAT 2015 included three invited talks: VI Preface – Dimitris Achlioptas (University of California Santa Cruz, USA) Random Formulas are Irrelevant, Right? – Anna Slobodova (Centaur Technology, USA) Pragmatic Approach to Formal Verification – Aaron Tomb (Galois, Inc., USA) Applying Satisfiability to the Analysis of Cryptography SAT 2015 hosted various affiliated events, including two workshops on September 23: – Sixth International Workshop on Pragmatics of SAT (PoS 2015) Organizers: Daniel Le Berre and Allen Van Gelder; – Third International Workshop on Quantified Boolean Formulas (QBF 2015) Organizers: Florian Lonsing and Martina Seidl; and three competitions and system evaluations: – SAT Race 2015 Organizers: Tomas Balyo, Carsten Sinz, and Markus Iser; – Max-SAT Evaluation 2015 Organizers: Josep Argelich, Chu-Min Li, Felip Manya, and Jordi Planes; – Pseudo-Boolean Evaluation 2015 Organizers: Norbert Manthey and Peter Steinke We would like to thank everyone who contributed to making SAT 2015 a success. FirstandforemostwewouldliketothankthemembersoftheProgramCommitteeand theadditionalexternalreviewersfortheircareful andthoroughwork,withoutwhichit would not have been possible for us to put together such an outstanding conference program. We also wish to thank all the authors who submitted their work for our consideration. We thank the SAT Association chair Armin Biere, vice chair John Franco, and treasurer Hans Kleine Büning for their help and advice in organizational matters. We wish to thank the workshop chair Albert Oliveras. The EasyChair con- ference system provided invaluable assistance in coordinating the submission and reviewprocess,aswellasintheassemblyoftheseproceedings.Wealsothankthelocal organization team for their efforts with practical aspects of local organization. Finally,wegratefullythanktheUniversityofTexasatAustin,theSATAssociation, the Artificial Intelligence journal, CyberPoint, Galois, Inc., Intel, and Microsoft Research for financial and organizational support for SAT 2015. July 2015 Marijn Heule Sean Weaver Organization Program Committee Fahiem Bacchus University of Toronto, Canada Olaf Beyersdorff University of Leeds, UK Armin Biere Johannes Kepler University, Austria Leonardo De Moura Microsoft Research, USA Uwe Egly Vienna University of Technology, Austria John Franco University of Cincinnati, USA Enrico Giunchiglia DIST - University of Genova, Italy Youssef Hamadi Microsoft Research, UK Marijn Heule The University of Texas at Austin, USA Holger Hoos University of British Columbia, Canada Alexander Ivrii IBM, Israel Jie-Hong Roland Jiang National Taiwan University, Taiwan Matti Järvisalo University of Helsinki, Finland Oliver Kullmann Swansea University, UK Daniel Le Berre CNRS - Université d’Artois, France Ines Lynce INESC-ID/IST, University of Lisbon, Portugal Sharad Malik Princeton University, USA Panagiotis Manolios Northeastern University, USA Norbert Manthey TU Dresden, Germany Joao Marques-Silva University College Dublin, Ireland Alexander Nadel Intel, Israel Nina Narodytska Samsung Research America, USA Jakob Nordström KTH Royal Institute of Technology, Sweden Albert Oliveras Technical University of Catalonia, Spain Karem Sakallah University of Michigan, USA Roberto Sebastiani DISI, University of Trento, Italy Martina Seidl Johannes Kepler University Linz, Austria Bart Selman Cornell University, USA Laurent Simon Labri, Bordeaux Institute of Technology, France Carsten Sinz Karlsruhe Institute of Technology, Germany Stefan Szeider Vienna University of Technology, Austria Sean Weaver Department of Defense, USA Xishun Zhao Institute of Logic and Cognition, Sun Yat-Sen University, China VIII Organization Additional Reviewers Abío, Ignasi Lonsing, Florian Aleksandrowicz, Gadi López-Ibáñez, Manuel Arbel, Eli Manquinho, Vasco Audemard, Gilles Marek, Victor Balabanov, Valeriy Martins, Ruben Balyo, Tomáš Mencía, Carlos Bapst, Victor Miksa, Mladen Bayless, Sam Morgado, Antonio Ben-Haim, Yael Nevo, Ziv Berkholz, Christoph Nieuwenhuis, Robert Bingham, Jesse Oetsch, Johannes Bova, Simone Oikarinen, Emilia Cao, Weiwei Ordyniak, Sebastian Chamarthi, Harsh Raju Previti, Alessandro Creignou, Nadia Ray, Sayak Diller, Martin de Rezende, Susanna F. Elffers, Jan Ryvchin, Vadim Fawcett, Chris Shen, Yuping Fröhlich, Andreas Slivovsky, Friedrich Ganian, Robert Steinke, Peter de Haan, Ronald Strichman, Ofer Ignatiev, Alexey Subramanyan, Pramod Jain, Mitesh Trentin, Patrick Janota, Mikolas Tu, Kuan-Hua Kim, Eun Jung Van den Broeck, Guy Kotthoff, Lars Vinyals, Marc Krakovski, Roi Vizel, Yakir Lagniez, Jean-Marie Wang, Hung-En Lauria, Massimo Wetzler, Nathan Lee, Nian-Ze Widl, Magdalena Li, Chu-Min Yamada, Akihisa Lonca, Emmanuel Yue, Weiya Pragmatic Approach to Formal Verification Anna Slobodova CentaurTechnology, Taipet, Taiwan [email protected] After more than two decades of hard work by researchers in academia and industry, formal methods have been accepted as a viable part of the hardware design and vali- dation process. We now have a better understanding of what is a cost-effective use of formal methods, and companies even set aside some resources for the further devel- opment offormal tools. Spreading formal methods into industrial scale software ver- ification broadened the user population and increased motivation for development of such tools. Centaur Technology is one of the companies that adopted formal verification (FV)asapartoftheirproductionflow.OurcompanydesignsIntelcompatible x86-64 microprocessors. It does it with a relatively small team. To assure the quality of the design, a lot of effort is spent in the process of validation. Since new additions to x86-64 architecture widened the data on which instructions are performed, classic simulationprovidesevenlesscoveragewithrespecttoallpossibleinputstothesystem thanafewyearsago.TheFVteamatCentaurTechnologywascreatedasareactionto thistrendaswellasthefactthatthecapacityofformaltoolshasreachedalevelwhere they can be successful even on industrial scale designs. There are also more publicly available off-shelf formal point tools (SAT, SMT, Model-checkers, etc.) that can be incorporated into more complex validation framework. A pilot project [1] that dis- coveredacornercasebuginfloating-pointarithmeticwasconvincingenoughtojustify investing in a small FV team. Our verification framework is built on top of the ACL2 theorem prover [2]. There aremanydecisionproceduresbuiltinthelogicofACL2andprovedcorrectwithinthis logic. For example, packages exist, defined inside the logic, for Binary Decision Diagrams (BDD) [3] and for And-Inverter Graph (AIG) manipulation [4]. It has a symbolic simulator called GL [5] that can automate the proof of theorems over finite domains. GL can be combined with word-level symbolic simulation of a hardware model to relate that model to its specification. While we strive for rigorous analysis, our verification approach is very pragmatic. Weconnectedsome“trusted”toolstoACL2,forinstancevariousSatisfiabilitysolvers (e.g.,Glucose,Penelope,Lingeling,Riss3G),ortheABCmodel/equivalencechecking tool [6]. The results from these tools are tagged as “trusted” (unverified) by ACL2. However, for tools that provide a proof trace, in some cases, we can verify the cor- rectness of those results within ACL2. We prefer this approach to blindly trusting the tools. However, when we exhaust approaches that have verifiable results, we are willing to use unverified methods as well. Our team has worked on a variety of design and verification problems [7, 8] including microcode verification [9] and transistor-level validation. Our main focus