The PSP compact MOSFET model - MOS-AK

32 Pages·2006·0.85 MB·English

The PSP compact MOSFET model
An update
Gert-Jan Smit, Andries Scholten, D.B.M. Klaassen — NXP Semiconductors
Ronald van Langevelde — Philips Research Europe
Gennady Gildenblat, Weimin Wu, Xin Li, Amit Jha, Hailing Wang*
— Arizona State University; *now at IBM
MOS-AK, Montreux, September 22, 2006
Affiliations
founded by Philips Semiconductors
http://pspmodel.asu.edu
http://www.nxp.com/Philips_Models/mos_models/psp/
2
MOS-AK,Montreux, September 22, 2006
Outline
History & overview
DC verification on 65nm technology
Symmetry and distortion
Non-quasi static effects
Summary & references
3
MOS-AK,Montreux, September 22, 2006
Outline
History & overview
DC verification on 65nm technology
Symmetry and distortion
Non-quasi static effects
Summary & references
4
MOS-AK,Montreux, September 22, 2006
History
April 2005: First PSP version (100.0) released. Created from
– MOS Model 11 (Philips)
– SP (Penn State)
December 2005: CMC elects PSP as “next generation compact
MOSFET model” (i.e. successor of BSIM3/4)
June 2006: First CMC-standardized version (PSP 102.0) was released
Future: PSP extended to complete family of models
– Bulk CMOS
– Varactor
– PD-SOI
– FD-SOI
– FinFETs
– …
5
MOS-AK,Montreux, September 22, 2006
Model overview
PSP is a surface potential based – overlap capacitances (ψ -based)
s
compact MOSFET model, suitable for – impact ionization current
– gate leakage current
digital, analog and RF design
– gate-induced drain/source leakage
– non-uniform lateral/vertical doping
(GIDL, GISL)
– field-dependent mobility
– junction diode I-V and C-V (forward
– velocity saturation
and reverse)
– conductance effects (CLM, DIBL,
– diode reverse breakdown
etc.)
– noise (1/f, thermal, induced gate and
– series-resistance
shot noise)
– short-channel effects (incl. RSCE)
– non-quasi-static effects
– narrow-width effects
– gate and bulk resistances
– gate poly-depletion
– STI stress effect
– quantum-mechanical corrections
See also MOS-AK 2005
6
MOS-AK,Montreux, September 22, 2006
Update PSP 102.0
Changes PSP 100.0 (cid:198) 102.0
– Binning
– Improved Gummel symmetry (modified CLM-model and V -clamping)
B
– Replaced lateral gradient factor
– More flexible geometry scaling
– Improved mobility model (CS, FETA, scaling)
– Improved forward bulk-bias behavior
– BSIM-like instance parameters for JUNCAP2 (AS, AD, PS, PD)
– Several minor improvements, bug fixes, and maintenance
– October 2006: PSP 102.1 includes first C-implementation of NQS-model
Partly based on useful feedback by Jazz, Infineon, Freescale, STm,
RFMD, Analog Devices, …
7
MOS-AK,Montreux, September 22, 2006
Outline
History & overview
DC verification on 65nm technology
Symmetry and distortion
Non-quasi static effects
Summary & references
8
MOS-AK,Montreux, September 22, 2006
Long channel (65nm technology)
Drain current and output conductance
measurement
W/L = 10/1µm, V = 0…1V
PSP
GS
1.0
-2
10
-3
0.8 10
-4
10

) )
A 0.6 V
m A/ 10-5
( (
0.4 S -6
D 10
D

I g
-7
10
0.2
-8
10
0.0 -9
10
0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.2 0.4 0.6 0.8 1.0
V (V) V (V)
DS DS
9
MOS-AK,Montreux, September 22, 2006
Short channel (65nm technology)
Drain current and output conductance
measurement
W/L = 10/0.04µm (poly length = 40nm), V = 0…1V PSP
GS
8 -1
10
-2
10
6
-3
10
) )
A V
m /
4 A -4
10
( (
D S
D
I g 10-5
2
-6
10
0 -7
10
0.0 0.2 0.4 0.6 0.8 1.0
0.0 0.2 0.4 0.6 0.8 1.0
V (V) V (V)
DS DS
10
MOS-AK,Montreux, September 22, 2006