The Definitive Guide to ARM® Cortex®-M3 and Cortex®-M4 Processors, Third Edition

1055 Pages·2013·105.76 MB·English

by  Joseph Yiu

The Definitive Guide to
Ò Ò
ARM Cortex -M3 and
Cortex-M4 Processors
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The Definitive Guide to
Ò Ò
ARM Cortex -M3 and
Cortex-M4 Processors
Third Edition
Joseph Yiu
ARM Ltd., Cambridge, UK
AMSTERDAM • BOSTON • HEIDELBERG • LONDON
NEW YORK • OXFORD • PARIS • SAN DIEGO
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Contents
Foreword .................................................................................................................xxi
Preface ................................................................................................................. xxiii
Synopsis .................................................................................................................xxv
About this Book.................................................................................................. xxvii
Contributor Bio-Paul Beckmann ..........................................................................xxix
Acknowledgments.................................................................................................xxxi
Terms and Abbreviations................................................................................... xxxiii
Conventions .........................................................................................................xxxv
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CHAPTER 1 Introduction to ARM Cortex -M Processors............ 1
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1.1. What are the ARM Cortex -M processors? ................................2
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1.1.1. The Cortex -M3 and Cortex-M4 processors.......................2
1.1.2. The CortexÒ-M processor family.........................................3
1.1.3. Differences between a processor and a microcontroller......4
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1.1.4. ARM and the microcontroller vendors..............................5
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1.1.5. Selecting Cortex -M3 and Cortex-M4 microcontrollers ....6
1.2. Advantages of the CortexÒ-M processors ......................................8
1.2.1. Low power ..........................................................................8
1.2.2. Performance ........................................................................9
1.2.3. Energy efficiency................................................................9
1.2.4. Code density .......................................................................9
1.2.5. Interrupts.............................................................................9
1.2.6. Ease of use, C friendly .......................................................9
1.2.7. Scalability .........................................................................10
1.2.8. Debug features ..................................................................10
1.2.9. OS support ........................................................................10
1.2.10. Versatile system features ..................................................10
1.2.11. Software portability and reusability .................................10
1.2.12. Choices (devices, tools, OS, etc.).....................................10
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1.3. Applications of the ARM Cortex -M processors......................11
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1.4. Resources for using ARM processors and ARM
microcontrollers ............................................................................12
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1.4.1. What can you find on the ARM website .........................12
1.4.2. Documentation from the microcontroller vendors.............12
1.4.3. Documentation from tools vendors....................................14
1.4.4. Other resources ...................................................................14
1.5. Background and history................................................................15
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1.5.1. A brief history of ARM ...................................................15
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1.5.2. ARM processor evolution ................................................16
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1.5.3. Architecture versions and Thumb ISA ............................18
v
vi Contents
1.5.4. Processor naming................................................................22
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1.5.5. About the ARM ecosystem..............................................23
CHAPTER 2 Introduction to Embedded Software Development ... 25
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2.1. What are inside typical ARM microcontrollers?.......................25
2.2. What you need to start..................................................................26
2.2.1. Development suites.............................................................26
2.2.2. Development boards ...........................................................27
2.2.3. Debug adaptor.....................................................................27
2.2.4. Software device driver........................................................29
2.2.5. Examples.............................................................................29
2.2.6. Documentation and other resources ...................................30
2.2.7. Other equipment .................................................................30
2.3. Software development flow ..........................................................30
2.4. Compiling your applications.........................................................32
2.5. Software flow ................................................................................36
2.5.1. Polling.................................................................................36
2.5.2. Interrupt driven ...................................................................36
2.5.3. Multi-tasking systems.........................................................38
2.6. Data types in C programming ......................................................39
2.7. Inputs, outputs, and peripherals accesses .....................................40
2.8. Microcontroller interfaces.............................................................45
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2.9. The Cortex microcontroller software interface
standard (CMSIS) .........................................................................46
2.9.1. Introduction of CMSIS.......................................................46
2.9.2. Areas of standardization in CMSIS-Core ..........................48
2.9.3. Organization of CMSIS-Core.............................................50
2.9.4. How do I use CMSIS-Core? ..............................................50
2.9.5. Benefits of CMSIS-Core ....................................................53
2.9.6. Various versions of CMSIS ................................................54
CHAPTER 3 Technical Overview .............................................. 57
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3.1. General information about the Cortex -M3 and Cortex-M4
processors ......................................................................................57
3.1.1. Processor type.....................................................................57
3.1.2. Processor architecture.........................................................58
3.1.3. Instruction set .....................................................................59
3.1.4. Block diagram ....................................................................61
3.1.5. Memory system ..................................................................63
3.1.6. Interrupt and exception support .........................................64
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3.2. Features of the Cortex -M3 and Cortex-M4 processors .............64
3.2.1. Performance ........................................................................65
3.2.2. Code density .......................................................................65
Contents vii
3.2.3. Low power ........................................................................66
3.2.4. Memory system ................................................................67
3.2.5. Memory protection unit....................................................67
3.2.6. Interrupt handling .............................................................68
3.2.7. OS support and system level features ..............................69
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3.2.8. Cortex -M4 specific features ...........................................69
3.2.9. Ease of use........................................................................70
3.2.10. Debug support...................................................................71
3.2.11. Scalability .........................................................................72
3.2.12. Compatibility ....................................................................73
CHAPTER 4 Architecture......................................................... 75
4.1. Introduction to the architecture ....................................................76
4.2. Programmer’s model .....................................................................76
4.2.1. Operation modes and states................................................76
4.2.2. Registers..............................................................................78
4.2.3. Special registers..................................................................81
4.2.4. Floating point registers .......................................................90
4.3. Behavior of the application program status register (APSR) ......92
4.3.1. Integer status flags ..............................................................93
4.3.2. Q status flag ........................................................................94
4.3.3. GE bits ................................................................................95
4.4. Memory system.............................................................................97
4.4.1. Memory system features ....................................................97
4.4.2. Memory map.......................................................................98
4.4.3. Stack memory.....................................................................99
4.4.4. Memory protection unit (MPU) .......................................103
4.5. Exceptions and interrupts ...........................................................104
4.5.1. What are exceptions? .......................................................104
4.5.2. Nested vectored interrupt controller (NVIC)...................106
4.5.3. Vector table .......................................................................107
4.5.4. Fault handling ...................................................................108
4.6. System control block (SCB) .......................................................109
4.7. Debug ..........................................................................................109
4.8. Reset and reset sequence ............................................................113
CHAPTER 5 Instruction Set ................................................... 117
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5.1. Background to the instruction set in ARM Cortex -M
processors ....................................................................................118
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5.2. Comparison of the instruction set in ARM Cortex -M
processors ....................................................................................120
5.3. Understanding the assembly language syntax............................123
5.4. Use of a suffix in instructions.....................................................128
viii Contents
5.5. Unified assembly language (UAL) .............................................129
5.6. Instruction set..............................................................................131
5.6.1. Moving data within the processor..................................132
5.6.2. Memory access instructions ...........................................134
5.6.3. Arithmetic operations .....................................................146
5.6.4. Logic operations .............................................................148
5.6.5. Shift and rotate instructions ...........................................148
5.6.6. Data conversion operations
(extend and reverse ordering).........................................150
5.6.7. Bit-field processing instructions.....................................152
5.6.8. Compare and test ............................................................154
5.6.9. Program flow control ......................................................154
5.6.10. Saturation operations ......................................................164
5.6.11. Exception-related instructions ........................................165
5.6.12. Sleep mode-related instructions .....................................168
5.6.13. Memory barrier instructions...........................................169
5.6.14. Other instructions ...........................................................170
5.6.15. Unsupported instructions................................................172
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5.7. Cortex -M4-specific instructions ...............................................173
5.7.1. Overview of enhanced DSP extension in
Cortex-M4.........................................................................173
5.7.2. SIMD and saturating instructions.....................................175
5.7.3. Multiply and MAC instructions .......................................175
5.7.4. Packing and unpacking.....................................................179
5.7.5. Floating point instructions................................................181
5.8. Barrel shifter ...............................................................................184
5.9. Accessing special instructions and special registers in
programming ...............................................................................189
5.9.1. Overview...........................................................................189
5.9.2. Intrinsic functions .............................................................190
5.9.3. Inline assembler and embedded assembler ......................190
5.9.4. Using other compiler-specific features.............................191
5.9.5. Access of special registers ...............................................191
CHAPTER 6 Memory System.................................................. 193
6.1. Overview of memory system features........................................193
6.2. Memory map...............................................................................194
6.3. Connecting the processor to memory and peripherals...............194
6.4. Memory requirements .................................................................202
6.5. Memory endianness ....................................................................202
6.6. Data alignment and unaligned data access support ...................205
6.7. Bit-band operations.....................................................................206
6.7.1. Overview ..........................................................................206
6.7.2. Advantages of bit-band operations ..................................210
Contents ix
6.7.3. Bit-band operation of different data sizes .......................211
6.7.4. Bit-band operations in C programs..................................216
6.8. Default memory access permissions ..........................................217
6.9. Memory access attributes ...........................................................217
6.10. Exclusive accesses ......................................................................220
6.11. Memory barriers .........................................................................223
6.12. Memory system in a microcontroller .........................................224
CHAPTER 7 Exceptions and Interrupts ................................... 229
7.1. Overview of exceptions and interrupts.......................................230
7.2. Exception types...........................................................................231
7.3. Overview of interrupt management ............................................233
7.4. Definitions of priority .................................................................235
7.5. Vector table and vector table relocation.....................................242
7.6. Interrupt inputs and pending behaviors ......................................246
7.7. Exception sequence overview.....................................................250
7.7.1. Acceptance of exception request .....................................250
7.7.2. Exception entrance sequence ...........................................250
7.7.3. Exception handler execution............................................251
7.7.4. Exception return ...............................................................251
7.8. Details of NVIC registers for interrupt control..........................252
7.8.1. Summary ..........................................................................252
7.8.2. Interrupt enable registers..................................................253
7.8.3. Interrupt set pending and clear pending ..........................253
7.8.4. Active status .....................................................................255
7.8.5. Priority level.....................................................................255
7.8.6. Software trigger interrupt register ...................................257
7.8.7. Interrupt controller type register......................................258
7.9. Details of SCB registers for exception and interrupt
control .........................................................................................259
7.9.1. Summary of the SCB registers ........................................259
7.9.2. Interrupt control and state register (ICSR) ......................259
7.9.3. Vector table offset register (VTOR) ................................259
7.9.4. Application interrupt and reset control register
(AIRCR) ...........................................................................259
7.9.5. System handler priority registers
(SCB->SHP[0 to 11]) ......................................................263
7.9.6. System handler control and state register
(SCB->SHCSR)...............................................................264
7.10. Details of special registers for exception or interrupt
masking .......................................................................................265
7.10.1. PRIMASK ......................................................................265
7.10.2. FAULTMASK ................................................................266
7.10.3. BASEPRI........................................................................267