Switched-Capacitor Networks for Implementation

284 Pages·2007·14.31 MB·English

Switched-Capacitor Networks for
Image Processing: Analysis,
Synthesis, Response Bounding, and
Implementation
by
Mark N. Seidel
S.B. (EE & CS), Massachusetts Institute of Technology (1985)
S.M. (EE & CS), Massachusetts Institute of Technology (1985)
Submitted to the Department of Electrical Engineering and Computer Science
in partial fulfillment of the requirements for the degree of
Doctor of Science
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
February 1994
@ Massachusetts Institute of Technology 1994
Signature of Author
Department of Electrical Engineering and Computer Science
January 29, 1994
Certified by
John L. Wyatt, Jr.
Professor
S // Thesis Supervisor
Certified by 'omas
T F. Knight, Jr.
Principal Research Scientist
I A Thesis Supervisor
Accepted by -
MASSa CC,S H (T,S S!PTEu - Frederic R. Morgenthaler
' "(cid:127):"i hairman, Dep rtmental Committee on Graduate Students
APR 0 6 1994

Switched-Capacitor Networks for Image Processing: Analysis,
Synthesis, Response Bounding, and Implementation
by
Mark N. Seidel
Submnitted to the Department of Electrical Engineering and C(omputer Science
on January 29, 1994, in partial fulfillment of the
requirements for the degree of
Doctor of Science
Abstract
This thesis presents aspects of analysis and synthesis of linear and nonlinear steady-
state switched-capacitor (SC) networks. Though the application area stressed is early
vision image processing, the results and strategy apply to other areas involving linear
and nonlinear resistive networks, such as coupled-equation solvers.
Foundational results involve translating between (a) continuous-time networks con-
taining nonlinear capacitors, ideal voltage sources, and nonlinear resistive MOSFET-
based switches, and (b) stable discrete-time systems embodied by ideal SC networks. In
addition, steady-state source transferred charges are shown to be independent of initial
capacitor voltages. Finally, step-response bounds and estimates are found for a large
class of such discrete-time systems; these bounding expressions are presented in direct
and inverted forms, and are shown to tend towards the continuous-time RC-tree bounds
in the appropriate limits.
Resistive equivalent circuits are found for arbitrary passive SC networks in steady-
state, with the emphasis being on element equivalences. These analysis results are com-
pared with currently available analysis techniques, and are used to explain several aspects
of multiple-frequency networks (i.e., SCl networks with multiple clock phases, where the
intention is to control relative conductance values through the control of relative switch-
ing frequencies). In the reverse direction, this thesis includes a general strategy for
synthesizing a SC network given a resistive network comprised of two-terminal resistors,
two-port lossy transformers, multiterminal and multiport lossy generalized circulators,
and several types of resistive constraint boxes.
The analysis and synthesis results are extended to certain classes of nonlinear SC
networks. Analysis of SC networks containing nonlinear capacitors follows the same
conceptual framework as the linear theory, and the class of networks that can be syn-
thesized is broadened to include two-terminal voltage-controlled nonlinear resistors. The
nonlinear analysis and synthesis results are applied to resistive fuse networks for image
smoothing and segmentation.
In the last portion of the thesis, the analysis and synthesis results are discussed in
the context of a designed, fabricated, and tested VLSI circuit implementation of the one-
dimensional coupled depth and slope network for surface reconstruction. This network
combines information from different early vision modules to yield a dense representation
of a surface. The 13-section linear SC network was fabricated in a 2,m double-poly
CMOS process, and includes compensation for parasitic capacitances associated with
both plates of the floating capacitors. The experimental results agree quite closely with
the analysis theory, both for the case of parasitic capacitance compensation as well as
with the compensation disabled. This disabling also demonstrates that the compensation
is effective in approaching the expected results for ideal SC networks. Finally, it is argued
and experimentally demonstrated that compensation for clock feedthrough and channel
charge is unnecessary in the interior of the networks designed, resulting in a more compact
and simpler layout.
Thesis Supervisor: John L. Wyatt, Jr.
Title: Professor
Thesis Supervisor: Thomas F. Knight, Jr.
Title: Principal Research Scientist
Acknowledgments
First, I deeply thank my two thesis supervisors, John Wyatt and Tom Knight. Their
patient tutoring and endless stream of ideas contributed greatly to the content and pre-
sentation of this work. I am thrilled to call each of them advisor and friend. Jacob
White, the third member of the committee, was a constant source of advice, ideas, and
support. Many thanks to all three.
Cam Searle and Marilyn Pierce made the administrative side of things absolutely
painless, allowing me to fully concentrate on the academics and research.
.Jim Roberge deserves a special thanks. Always with a wave and a grin, opinionated
and supportive, never too busy to stop and chat, I count him a treasure.
My office and floor mates are too numerous to mention, but special thanks go to
Miguel, Bob, Ricardo, and Abe.
Hi Mom! Hi Dad! Can you believe it? Thanks for everything.
Robert, Rulthanna, Timothy, and Christina have been so loving to their Daddy. They
teach inme every (lay to stop and savor life. What a gift they are!
Most importantly, I dedicate this thesis to my wife, Katja, my beloved. Throughout
our married life together, she has given of herself to support mine, never being satisfied
with second-best in our marriage, family, and understanding of our life and faith in Christ
.Jesus. Babe, you're the greatest!
This work was supported by the National Science Foundation and the Advanced
Research Projects Agency under NSF Grant MIP-91-17724, NSF and ARPA Contracts
MIP-88-14612, and ARPA Contract N0014-91-.J-1698.

Contents
1 Introduction and Background
1.1 Early Vision Image Processing . ............
1.2 Implementing Image Processing Algorithms
1.2.1 Smoothing and Segmentation .........
1.2.2 The Coupled Depth and Slope Network .
1.3 Other Applications: Coupled-Equation Solvers .
1.4 Switched-Capacitor (SC() Implementation .......
1.4.1 SC Implementation Advantages ........
1.4.2 Basic SC' Resistors ...............
1.4.3 SC Circuits and Discrete-Time (DT) Systems
1.5 Bounding the Network Step-Response . ........
1.5.1 Continuous-Time (CT) Step-Response Bounds
1.5.2 Step-Response Bounds and M-matrices
1.6 Steady-State SC Analysis and Synthesis
1.6.1 Equivalent-(Circuit SC Analysis Techniqlies .
1.6.2 UImminger's Steady-State Networks .
1.6.3 Novel Linear SC Elements .......
1.6.4 Nonlinear SC Elements and Networks .
1.7 Synopsis .....................
2 Foundations: From CT SC Circuits to Stable DT Systems
2.1 Fundamental Questions . ............
2.2 (lharacteristics of SC Networks Studied .
2.2.1 Topological Constraints
2.2.2 SC Network (Classes . ..........
2.3 M ain Results
2.4 Ideal SC Network Clocking and Notation .
2.4.1 Ideal SC Network Clocking Scheme .
2.4.2 Discrete-Time System Notation . .
2.4.3 The Linear Discrete-Time System .
2.5 Ideal Linear SC Network Long-Term Stability
2.5.1 Ideal Linear G(rounded SC Networks
2.5.2 Long-Term Stability Issues of SC' Loops .
CONTENTS
2.5.3 Ideal Linear Bridging SC Networks . .....
2.6 Real SC Network Characteristics . . . . . . . . ..
2.6.1 General Class ..............
2.6.2 Element Descriptions . . . . . . . . . . . . .
2.6.3 Clock Description . . . . . . . . . . . . . . .
2.6.4 Classes of Real SC Networks . . . . . . . . .
2.7 Clock Phase Stability of Real SC Networks . . . . .
2.7.1 Passivity WRT an Operating Point . . . . .
2.7.2 The System Differential Equation ......
2.7.3 Stability of the System . . . . . . . . . . . .
2.7.4 Clock-Phase Uniqueness . . . . . . . . . . .
2.8 Real SC Network Properties . . . . . . . . . . . . .
2.8.1 Replacement with Ideal Switches . . . . . .
2.8.2 Irrelevancy of Switch Closing Times ......
2.8.3 Clock Timing .................
2.8.4 System State ................
2.9 Energy Considerations of Real SC Networks .
2.9.1 Clock-Phase Stability . . . . . . . . . . . . .
2.9.2 Switch Dissipated Energy . . . . . . . . . .
2.9.3 General Energy Expressions and Results . .
2.10 Steady-State Transferred Charge Uniqueness . . . .
2.11 Sum m ary . . . . . . . . . . . . . . . . . . .. . . .
3 Step-Response Bounds for Ideal Linear Grounded SC Networkss 85
3.1 Notation and Definitions .... .. ......... .... 85
3.2 System Formulation . . . . . . ............. . . . . 86
3.3 The M ain Result ................... .... 87
•.. .. , •.. , •
3.4 Some Introductory Examples ............ .... 90
. . ., . . . °..
3.5 Useful Facts and Lemmas .............. ... . 94
3.6 The Reduced-Order Model . . . . . . . . . . . . . . . . . . 98
3.7 Determining Step-Response Bounds . . . . . . . . . . . . . 101
3.7.1 Basic Idea . . . . . . . . . . . . . . . . . . . .... 101
3.7.2 Algorithms for Deriving the Bounds . . . . . . . . . 102
3.7.3 Floor and Ceiling Functions . . . . . . . . . . . . . 104
3.7.4 Determining ni n . .. . . . . . . . . . . . . . .... 105
3.7.5 Determining nmax ............... . . . . 107
3.8 Proof of the Main Result (Bounding Expressions) . . . . . 113
3.9 Inverting the Bounding Expressions . . . . . . . . . . . . . 114
3.9.1 Inverting n(cid:127),in.. ................. .... 114
3.9.2 Inverting nmax. ................. .... 117
3.9.3 Combined Inversion . . . . . . . . . . . . . . . . . . 123
3.10 Proof of the Main Result (Inverted Bounding Expressions) . . . . 124
3.11 Tightening the Bounds .................... ... . 124
3.12 Discrete-Time Bounds in the Limit . . . . . . . . . . . . . . . . . 126
3.13 Designer Bounds ....................... ... . 131
(CONTENTS 9
:3.14 More Examples ....... ............ . . ....... 132
3.14.1 Equal 3-Line Network ................... . . . . 132
:3.14.2 Equal 20-Line Network . ......... ....... ..... 134
3.14.3 Pi 3-Line and 20-Line Networks . . . . .... ..... . . 134
3.14.4 Ratioed 17x 17 Grid Network ...... ............. . 134
3.14.5 Discussion ............... ...... ... . .... 144
4 Analysis of Linear Passive Steady-State SC Networks 147
4.1 Existing Methods for SC Network Analysis .... ... .. ..... . 148
4.2 Single-Capacitor Grounded SC Networks ............ . . . . 148
4.3 Analysis of Ideal Grounded SC Networks ............... .. . 1,49
4.3.1 Basic Transformation Algorithm .. ............... . 151
4.3.2 Elementized Grounded Capacitor Properties . ........... 154
4.4 Analysis of Floating SC Networks . . ............... .. . 158
4.4.1 Basic Transformation Algorithm ... . . . . ..... .. . . 161
4.4.2 Elementized Floating Capacitor Properties ............ . . 164
4.5 Ultterly G(eneral Analysis . . . . . . . . . ......... .. ...... . 166
4.6 (Clomparison with Existing Analysis Methods . ............... 168
4.6.1 Dependent-Source Coupling ... .. . .......... . . 168
4.6.2 Link-Two-Port Coupling ................... .... 169
4.6.3 Generalized Circulator Coupling ........... ...... . . 171
4.6.4 SC Macromodel Analysis . . . . .... ........ ..... 172
4.6.5 IUmminger's Steady-State SC Networks . .............. 172
4.6.6 The New Analysis Method ................... . .. 173
4.7 Network Properties ................... . . . . . . 17:3
4.8 Analysis of Multiple-Frequency Networks . ................. 175
4.8.1 Demystifying Umminger's Examples . ............... 175
4.8.2 Terminal Patterns in Multiple-Frequency Networks .. . . .. . . 176
4.8.3 Analysis of the One-Sided SC Line . ................ 178
4.8.4 Analysis of the Finite Two-sided SC Line . ............. 183
4.9 Summary ..................... ................. 188
5 Synthesis of Passive Linear Steady-State SC Networks 189
5.1 An Overview of the Synthesis Procedure . ................. 189
5.2 Synthesis Classes ................... ........ ... . 192
5.2.1 Two-Terminal Resistor Networks .. . ....... .. ... ... . 192
5.2.2 Two-Port Lossy Transformer Networks ........... . . . . 192
5.2.3 Multiterminal Lossy Generalized Circulator Networks . ...... 195
5.2.4 Multiport Lossy Generalized Circulator Networks . ........ 197
5.2.5 Constraint Box Networks ..... . .. . . .. ...... 197
5.3 Synthesis of Selected Nonreciprocal Subcircuits .. . . . ... ...... 201
5.4 A Synthesis Example .................................... ... 202
5.5 Synthesis, Analysis, and Reciprocity .......... ... ...... .. 208
5.6 Summnary ...... ............ .... ................ 210
10 CONTENTS
6 Analysis and Synthesis of Nonlinear SC Networks 211
6.1 Ideal Nonlinear SC Networks . . . . . . . . . . . . . 212
6.2 Barman's Nonlinear SC Element . . . . . . . . . . . 213
6.2.1 Ideal Operation of the Element . . . . . . . 214
6.2.2 Example: Resistive Fuse Element . . . . . . 216
6.2.3 Limitations of the Element . . . . . . . . . . 217
6.3 Barman's Resistive Fuse Network . . . . . . . . . . 222
6.3.1 Nonlinear Analysis . . . . . . . . . . . . . . 222
6.3.2 A Minor Remark on Transient Networks . . 226
6.4 Nonlinear Synthesis . . . . . . . . . . . . . . . . . . 227
6.4.1 A New Nonlinear SC Element . . . . . . . . 227
6.4.2 Transient Networks . . . . . . . . . . . . . . 227
6.4.3 An Improved SC' Resistive Fuse Network . . 230
6.5 Sum m ary . .. .. .. .. ... .... .. .. ... 233
7 Implementing the Coupled Depth and Slope Netwfork 235
7.1 Coupled Depth and Slope Network Analysis . . . . 235
7.2 Practical SC Implementation Issues . . . . . . . . . 238
. .•
7.2.1 Clock Feedthrough . . . . . . . . . . . . . . 239
7.2.2 Channel Charge ................ 241
7.3 Circuit Design .... .. ........ .. ..... 241
. .
7.4 Layout Issues . .. .. .. ... .. .. .. ..... 243
7.4.1 Grounded Capacitors . . . . . . . . . . . . . 243
7.4.2 Floating Capacitors . . . . . . . . . . . . . . 244
7.5 Chip Layout .. .. .. .. ... .. .. .. .. ... 251
7.6 Sum m ary . .. . . . . .. . . . . . . . . . .. . .. 251
8 Coupled Depth and Slope IC Testing 253
8.1 Device Characterization . . . . . . . . . 253
8.2 Test Environment . . . . . . . . . . . . . 253
8.3 SC Lines . . . . . . . . . . . . . . . . . . 257
8.3.1 1-1 Lines . . . . . . . . . . . . . . 257
8.3.2 4-1 and 16-1 Lines ........ 257
.. .. .. .. .. .. .. .. .. ..
8.3.3 Discussion . ............ 263
. . . . . . . . . .
8.4 Coupled Depth and Slope Network Tests 26:3
8.5 Discussion . . . . . .. . . . .. . . .. . 273
.• . . . . . . . . .
8.6 Summ ary ................. 27:3
. •. . . . . . . . .
9 Conclusions and Future Directions 275
9.1 Conclusions .... ............ . . . . . . . . . . . . . . . . 275
9.2 Future W ork ................ . . . . . . . . . . . . . . . . 276