Study on Zero-Crossing-Based ADCs for Smart Dust Applications

177 Pages·2011·21.36 MB·English

Institutionen för systemteknik
Department of Electrical Engineering
Examensarbete
Study on Zero-Crossing-Based ADCs
for Smart Dust Applications
Examensarbete utfört i Elektroniksystem
vid Tekniska högskolan vid Linköpings universitet
av
Shehryar Khan and Muhammad Asfandyar Awan
LiTH-ISY-EX--11/4491--SE
Linköping 2011
Department of Electrical Engineering Linköpings tekniska högskola
Linköpings universitet Linköpings universitet
SE-581 83 Linköping, Sweden 581 83 Linköping

Study on Zero-Crossing-Based ADCs
for Smart Dust Applications
Examensarbete utfört i Elektroniksystem
vid Tekniska högskolan i Linköping
av
Shehryar Khan and Muhammad Asfandyar Awan
LiTH-ISY-EX--11/4491--SE
Handledare: Supervisor
J Jacob Wikner isy,Linköpings universitet
Examinator: Examiner
J Jacob Wikner isy, Linköpings universitet
Linköping, 18 August, 2011

Avdelning, Institution Datum
Division,Department Date
DivisionofElectronicsSystems
DepartmentofElectricalEngineering
2011-008-18
Linköpingsuniversitet
SE-58183Linköping,Sweden
Språk Rapporttyp ISBN
Language Reportcategory
—
(cid:3)Svenska/Swedish (cid:3)Licentiatavhandling ISRN
(cid:3)(cid:2)Engelska/English (cid:3)(cid:2)Examensarbete LiTH-ISY-EX--11/4491--SE
(cid:3)C-uppsats
Serietitel och serienummer ISSN
(cid:3)D-uppsats Titleofseries,numbering
—
(cid:3) (cid:3)Övrigrapport
(cid:3)
URL för elektronisk version
http://www.es.isy.liu.se
http://www.es.isy.liu.se
Titel
Title StudyonZero-Crossing-BasedADCs
forSmartDustApplications
Författare ShehryarKhanandMuhammadAsfandyarAwan
Author
Sammanfattning
Abstract
The smart dust concept is a fairly recent phenomenon to engineering. It as-
sumes monitoring of a real natural environment in which motes or smart dust
machinesswarmincollectiveandcoordinateinformationamongthemselvesand/
ortoabackendcontrolplatform. Inanalogmixedsignalfieldworkonsuchdevices
isgainingmomentumsuchthatitisconceivedtobeoneoftheemergingfieldsin
technology,andworkwasonlypossibleoncethetechnologyforfabricationtouched
thenanoscaleregions.
Smartdustnetworkinvolvesremotedevicesconnectedinahivesensingbursttype
datumsignalsfromtheenvironmentandrelayinginformationamongstthemselves
inanenergyefficientmannertocoordinateanappropriateresponsetoadetected
stimulus. TheprojectpresumedaRFbasedcommunicationstrategyforcoordina-
tionamongstthedevicesthroughawirelessmedium. Thatislesssusceptibleto
stringentrequirementsofLOSandabasebandprocessingsystemthatcomprised
ofanenvironmentsensor,anAFEmodule,anADC,aDSPandaDAC.
Essentiallya10bit,2MegaHertzMHzpipelinedADCimplementedinaSTM65
nmtechnology. TheADCbenefitsthesmartdustdeviceinallowingittoprocess
data in an energy efficient way and also focusing on reduced complexity as its
design feature. While it differs in the other ADC of the system by operating at
ahigherfrequencyandassumingadifferentdesignphilosophyassumingacoher-
entsystemsensitivetoaclock. Thethesisworkassumesthatvariousfeaturesof
energy harvesting, regulation and power management present in the smart dust
motewouldenablethesystemtocontainsuchadiverseADC. TheADCsoutput
digital datum would be compatible to the rest of the design modules consisting
mainlyofDSPsections. TheADCnoveltyisbasedonthefactthatitremovesthe
necessityofemployingahighpowerconsumingOpAmpwhosedesignparameters
becomemorecomplexastechnologyscalestothenanoscaleeraandfurtherdown.
A systematic, bottom up, test driven approach to design is utilized and various
behavioursofthesystemarecapturedinCadencedesignenvironmentwithverilog
tolayoutmodelsandMATLABandSimulinkmodels.
Nyckelord
Keywords smartdust,ComparatorBasedSwitchedCapacitor(CBSC),ZeroCrossingBased
Circuit(ZCBC),AnalogtoDigitalConverter(ADC)

Abstract
The smart dust concept is a fairly recent phenomenon to engineering. It assumes
monitoring of a real natural environment in which motes or smart dust machines
swarm in collective and coordinate information among themselves and/ or to a
backend control platform. In analog mixed signal field work on such devices is
gaining momentum such that it is conceived to be one of the emerging fields in
technology, and work was only possible once the technology for fabrication touched
the nanoscale regions.
Smart dust network involves remote devices connected in a hive sensing burst type
datum signals from the environment and relaying information amongst themselves
in an energy efficient manner to coordinate an appropriate response to a detected
stimulus. The project presumed a RF based communication strategy for coordina-
tion amongst the devices through a wireless medium. That is less susceptible to
stringent requirements of LOS and a base band processing system that comprised
of an environment sensor, an AFE module, an ADC, a DSP and a DAC.
Essentially a 10 bit, 2 Mega Hertz MHz pipelined ADC implemented in a STM 65
nm technology. The ADC benefits the smart dust device in allowing it to process
data in an energy efficient way and also focusing on reduced complexity as its
design feature. While it differs in the other ADC of the system by operating at a
higher frequency and assuming a different design philosophy assuming a coherent
systemsensitivetoaclock. Thethesisworkassumesthatvariousfeaturesofenergy
harvesting, regulation and power management present in the smart dust mote
would enable the system to contain such a diverse ADC. The ADCs output digital
datum would be compatible to the rest of the design modules consisting mainly of
DSP sections. The ADC novelty is based on the fact that it removes the necessity
of employing a high power consuming OpAmp whose design parameters become
more complex as technology scales to the nanoscale era and further down.
A systematic, bottom up, test driven approach to design is utilized and various
behaviours of the system are captured in Cadence design environment with verilog
to layout models and MATLAB and Simulink models.
v

Acknowledgments
First of all, we would like to Thank the Almighty for helping us sustain our efforts
in weaving together some insights from the mosaic of the rational and irrational
world of Integrated Chip (IC) design.
Secondly, we would like to thank J Jacob Wikner, our supervisor for this thesis
work, a man of supreme inertia with an iconoclastic laser sharp thinking ability in
the realm of mixed signal design who guided our search in understanding the inner
mechanismsofourADCproject. Healsopossessesanalmostpoeticdocumentation
ability which we tried to sample at our best inherent frequency.
Also we would like to thank Venkata Narasimha Manyam and Qazi Syed Wajahat
Ali for their opposition of our thesis, their opposition was fair and gave us solid
material to work on. We would also like to extend a special thank you to Dhruv
Chhetri for his support throughout academics and most fondly for his frequent
invitations to his generous and creative kitchen. And we must remember the
camaraderie shared in the “Signal och Bild” room with Murad Kabir Nipun, Sajib
Roy, Tanvir Ahmad and Mohammad Lababidi.
Also I, Shehryar Khan, would like to thank my mother and my sister, for their
constant support and encouragement throughout my study period and always
cheering me up when things went gloomy. I would also like to thank my friend
Adeel-ur-Rehman who I constantly ignored but he still had a big enough heart
to tolerate such weird behaviour. I would like to thank Waqas Zafar of KTH
university for giving me the tip of coming to Sweden for my masters education.
And lastly, I would like to thank Asfandyar Awan for his magnificent amount of
patience for the length of the thesis.
I hope this thesis work to be a stepping stone for all the nafs-e-la-mutmoena mixed
signal design engineers that are to follow in the yellow brick road leading to the
world of IC design.
vii