Semiconductors : integrated circuit design for manufacturability

236 Pages·2011·5.387 MB·English

by  Artur Balasinki

Electrical Engineering
B
a
la
s
in
s
SEMICONDUCTORS k
i
S
E
Integrated Circuit Design for Manufacturability
M
Because of the continuous evolution of integrated circuit manufacturing I
(ICM) and design for manufacturability (DfM), most books on the subject C
are obsolete before they even go to press. That’s why the field requires a
O
reference that takes the focus off of numbers and concentrates more on
larger economic concepts than on technical details.
N
Semiconductors: Integrated Circuit Design for Manufacturability covers
the gradual evolution of integrated circuit design (ICD) as a basis to D
propose strategies for improving return-on-investment (ROI) for ICD
in manufacturing. Where most books put the spotlight on detailed U
engineering enhancements and their implications for device functionality,
in contrast, this one offers, among other things, crucial, valuable historical C
background and roadmapping, all illustrated with examples.
T

O
Presents actual test cases that illustrate product challenges, examine
possible solution strategies, and demonstrate how to select and
R
implement the right one
S

This book shows that DfM is a powerful generic engineering concept with
potential extending beyond its usual application in automated layout In
enhancements centered on proximity correction and pattern density. This te
g
material explores the concept of ICD for production by breaking down ra
t
its major steps: product definition, design, layout, and manufacturing. e
d
Averting extended discussion of technology, techniques, or specific C
device dimensions, the author also avoids the clumsy chapter architecture irc
u
that can hinder other books on this subject. The result is an extremely it
functional, systematic presentation that simplifies existing approaches D
e
to DfM, outlining a clear set of criteria to help readers assess reliability, sig
functionality, and yield. With careful consideration of the economic and n
f
technical trade-offs involved in ICD for manufacturing, this reference o
r
addresses techniques for physical, electrical, and logical design, keeping M
a
coverage fresh and concise for the designers, manufacturers, and n
u
researchers defining product architecture and research programs. fa
c
t
u
r
a
b
K10888 ilit
y
ISBN: 978-1-4398-1714-8
90000
9 781439 817148
K10888_COVER_final.indd 1 8/2/11 11:38 AM
SEMICONDUCTORS
Integrated Circuit Design
for Manufacturability

Artur Balasinski
CRC Press
Taylor & Francis Group
6000 Broken Sound Parkway NW, Suite 300
Boca Raton, FL 33487-2742
© 2012 by Taylor & Francis Group, LLC
CRC Press is an imprint of Taylor & Francis Group, an Informa business
No claim to original U.S. Government works
Version Date: 20110531
International Standard Book Number-13: 978-1-4398-1715-5 (eBook - PDF)
This book contains information obtained from authentic and highly regarded sources. Reasonable efforts have been made
to publish reliable data and information, but the author and publisher cannot assume responsibility for the validity of all
materials or the consequences of their use. The authors and publishers have attempted to trace the copyright holders of all
material reproduced in this publication and apologize to copyright holders if permission to publish in this form has not
been obtained. If any copyright material has not been acknowledged please write and let us know so we may rectify in any
future reprint.
Except as permitted under U.S. Copyright Law, no part of this book may be reprinted, reproduced, transmitted, or utilized in
any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, micro-
filming, and recording, or in any information storage or retrieval system, without written permission from the publishers.
For permission to photocopy or use material electronically from this work, please access www.copyright.com (http://www.
copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC), 222 Rosewood Drive, Danvers, MA 01923, 978-750-
8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that
have been granted a photocopy license by the CCC, a separate system of payment has been arranged.
Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identi-
fication and explanation without intent to infringe.
Visit the Taylor & Francis Web site at
http://www.taylorandfrancis.com
and the CRC Press Web site at
http://www.crcpress.com
To my son, Chris
When you design your life,
first you have choices, but no
commitments; then commitments,
but no choices. Make it simple:
Commit to a good choice.

Contents
Preface.......................................................................................................................xi
Acknowledgments...............................................................................................xiii
About.the.Author...................................................................................................xv
1 Introduction......................................................................................................1
1.1. Design.for.Manufacturability:.Integrated.Circuit.
Manufacturing.versus.Industry.Legacy.............................................1
1.2. Why.Should.One.Read.This.Book?.....................................................4
1.3. The.2D.Paradigm,.Rules,.and.Optimization......................................5
1.4. Three.DfM.Product.Questions.............................................................7
1.5. Smart.Goals...........................................................................................10
1.5.1. Significant................................................................................10
1.5.2. Measurable...............................................................................10
1.5.2.1. Manufacturing.Yield..............................................10
1.5.3. Attainable.................................................................................11
1.5.4. Relevant....................................................................................11
1.5.5. Timely.......................................................................................12
1.5.5.1. Verification.Methodology......................................12
1.6. DfM:.Is/Is.Not......................................................................................13
1.7. This.Book:.Is/Is.Not.............................................................................16
References........................................................................................................21
2 Migrating Industrial DfM into IC Manufacturing................................23
2.1. Introduction:.Universal.Design.for Manufacturability.
Principles...............................................................................................23
2.1.1. The.Rule.of.10..........................................................................27
2.1.2. Concurrent.Engineering.and.Standardization:.
Design,.Process,.Product.......................................................30
2.2. Design-for-Reliability:.Reliability.First.............................................33
2.2.1. Definitions...............................................................................33
2.2.2. Material-Dependent.IC.Reliability.......................................37
2.2.2.1. Metals........................................................................38
2.2.2.2. Dielectrics.................................................................44
2.2.2.3. Semiconductors.......................................................57
2.3. Design.for.Test......................................................................................66
2.3.1. DfT.Techniques.......................................................................68
2.3.2. Power-Aware.DfT...................................................................71
2.4. Yield.......................................................................................................72
2.4.1. Parametric.Yield......................................................................77
2.4.2. Functional,.Sort,.and.Class.Yield..........................................78
vii
viii Contents
2.5.Summary...................................................................................................85
References........................................................................................................86
3 IC DfM for Devices and Products..............................................................91
3.1. Introduction..........................................................................................91
3.2. DfM.for.MOSFETs.and.Standard.Cells.............................................92
3.2.1. Device.Models.and.Design.Intent........................................96
3.2.1.1. Static.Random.Access.Memory.Cells...................96
3.2.1.2. Stitch.Cells..............................................................102
3.3. DfM.at.Block.and.Die.Levels:.Rules.and.Best.Practices...............103
3.4. 1D,.2D,.3D,.4D.Variability.Compromises........................................105
3.4.1. 1D:.Line/Space.Pitch.............................................................107
3.4.2. 2D:.Pattern.Enhancement.Techniques...............................108
3.4.2.1. OPC.........................................................................110
3.4.2.2. Electrical.Impact....................................................117
3.4.2.3. Inverse.Lithography..............................................124
3.4.2.4. Mask.Manufacturability.......................................126
3.4.3. 3D:.On.and.Off.Die...............................................................134
3.4.3.1. Planarization..........................................................134
3.4.3.2. Etch.Selectivity.Control........................................144
3.4.3.3. Off-Die.Architectures...........................................147
3.4.4. 4D:.Time.and.Voltage.Domains..........................................150
3.5. Summary:.DfM.vs..Process.Variability..........................................152
References......................................................................................................155
4 Fab Implementation: MfD Response......................................................159
4.1. Introduction........................................................................................159
4.2. Lithography.........................................................................................164
4.2.1. MfD.Cost.of.Pattern.Resolution..........................................165
4.2.1.1. Extreme.Ultraviolet.Lithography........................166
4.2.1.2. Nanoimprint.Lithography...................................169
4.2.1.3. Double-Patterning.Techniques............................173
4.2.2. Overlay.Road.Mapping........................................................178
4.3. Planarization.......................................................................................182
4.4. Summary.............................................................................................187
References......................................................................................................188
5 DfM Metrics.................................................................................................191
5.1. Introduction........................................................................................191
5.2. Layout.Quality....................................................................................192
5.2.1. Variability...............................................................................192
5.2.2. Feedback.Loop......................................................................193
5.2.3. Critical.Area...........................................................................193
5.2.4. OPC.Friendliness..................................................................195
5.2.5. Other.DfM.Metrics...............................................................195
Contents ix
5.3. Mask.Ratio..........................................................................................197
5.3.1. Definition...............................................................................198
5.3.2. Execution................................................................................199
5.3.3. Verification:.Model.Accuracy.and.Hot.Spots....................200
5.3.4. Correlation.to.Fab.Yield.......................................................201
5.4. FMEA.and.RoI....................................................................................204
5.4.1. DRC/DfM.Prioritization......................................................207
5.4.2. Time.to.RoI.............................................................................207
5.4.3. FMEA-RoI.Correlation.........................................................211
5.5. Summary.............................................................................................214
References......................................................................................................215
6 Summary and Work Ahead.......................................................................217